diff options
Diffstat (limited to 'arch/m32r/kernel/setup_mappi.c')
-rw-r--r-- | arch/m32r/kernel/setup_mappi.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/m32r/kernel/setup_mappi.c b/arch/m32r/kernel/setup_mappi.c index 00f253209cb3..c268044185f5 100644 --- a/arch/m32r/kernel/setup_mappi.c +++ b/arch/m32r/kernel/setup_mappi.c | |||
@@ -86,7 +86,7 @@ void __init init_IRQ(void) | |||
86 | #ifdef CONFIG_NE2000 | 86 | #ifdef CONFIG_NE2000 |
87 | /* INT0 : LAN controller (RTL8019AS) */ | 87 | /* INT0 : LAN controller (RTL8019AS) */ |
88 | irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; | 88 | irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; |
89 | irq_desc[M32R_IRQ_INT0].handler = &mappi_irq_type; | 89 | irq_desc[M32R_IRQ_INT0].chip = &mappi_irq_type; |
90 | irq_desc[M32R_IRQ_INT0].action = 0; | 90 | irq_desc[M32R_IRQ_INT0].action = 0; |
91 | irq_desc[M32R_IRQ_INT0].depth = 1; | 91 | irq_desc[M32R_IRQ_INT0].depth = 1; |
92 | icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; | 92 | icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; |
@@ -95,7 +95,7 @@ void __init init_IRQ(void) | |||
95 | 95 | ||
96 | /* MFT2 : system timer */ | 96 | /* MFT2 : system timer */ |
97 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; | 97 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; |
98 | irq_desc[M32R_IRQ_MFT2].handler = &mappi_irq_type; | 98 | irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type; |
99 | irq_desc[M32R_IRQ_MFT2].action = 0; | 99 | irq_desc[M32R_IRQ_MFT2].action = 0; |
100 | irq_desc[M32R_IRQ_MFT2].depth = 1; | 100 | irq_desc[M32R_IRQ_MFT2].depth = 1; |
101 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; | 101 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; |
@@ -104,7 +104,7 @@ void __init init_IRQ(void) | |||
104 | #ifdef CONFIG_SERIAL_M32R_SIO | 104 | #ifdef CONFIG_SERIAL_M32R_SIO |
105 | /* SIO0_R : uart receive data */ | 105 | /* SIO0_R : uart receive data */ |
106 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; | 106 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; |
107 | irq_desc[M32R_IRQ_SIO0_R].handler = &mappi_irq_type; | 107 | irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type; |
108 | irq_desc[M32R_IRQ_SIO0_R].action = 0; | 108 | irq_desc[M32R_IRQ_SIO0_R].action = 0; |
109 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; | 109 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; |
110 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; | 110 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; |
@@ -112,7 +112,7 @@ void __init init_IRQ(void) | |||
112 | 112 | ||
113 | /* SIO0_S : uart send data */ | 113 | /* SIO0_S : uart send data */ |
114 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; | 114 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; |
115 | irq_desc[M32R_IRQ_SIO0_S].handler = &mappi_irq_type; | 115 | irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type; |
116 | irq_desc[M32R_IRQ_SIO0_S].action = 0; | 116 | irq_desc[M32R_IRQ_SIO0_S].action = 0; |
117 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; | 117 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; |
118 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; | 118 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; |
@@ -120,7 +120,7 @@ void __init init_IRQ(void) | |||
120 | 120 | ||
121 | /* SIO1_R : uart receive data */ | 121 | /* SIO1_R : uart receive data */ |
122 | irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; | 122 | irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; |
123 | irq_desc[M32R_IRQ_SIO1_R].handler = &mappi_irq_type; | 123 | irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type; |
124 | irq_desc[M32R_IRQ_SIO1_R].action = 0; | 124 | irq_desc[M32R_IRQ_SIO1_R].action = 0; |
125 | irq_desc[M32R_IRQ_SIO1_R].depth = 1; | 125 | irq_desc[M32R_IRQ_SIO1_R].depth = 1; |
126 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; | 126 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; |
@@ -128,7 +128,7 @@ void __init init_IRQ(void) | |||
128 | 128 | ||
129 | /* SIO1_S : uart send data */ | 129 | /* SIO1_S : uart send data */ |
130 | irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; | 130 | irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; |
131 | irq_desc[M32R_IRQ_SIO1_S].handler = &mappi_irq_type; | 131 | irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type; |
132 | irq_desc[M32R_IRQ_SIO1_S].action = 0; | 132 | irq_desc[M32R_IRQ_SIO1_S].action = 0; |
133 | irq_desc[M32R_IRQ_SIO1_S].depth = 1; | 133 | irq_desc[M32R_IRQ_SIO1_S].depth = 1; |
134 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; | 134 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; |
@@ -138,7 +138,7 @@ void __init init_IRQ(void) | |||
138 | #if defined(CONFIG_M32R_PCC) | 138 | #if defined(CONFIG_M32R_PCC) |
139 | /* INT1 : pccard0 interrupt */ | 139 | /* INT1 : pccard0 interrupt */ |
140 | irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED; | 140 | irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED; |
141 | irq_desc[M32R_IRQ_INT1].handler = &mappi_irq_type; | 141 | irq_desc[M32R_IRQ_INT1].chip = &mappi_irq_type; |
142 | irq_desc[M32R_IRQ_INT1].action = 0; | 142 | irq_desc[M32R_IRQ_INT1].action = 0; |
143 | irq_desc[M32R_IRQ_INT1].depth = 1; | 143 | irq_desc[M32R_IRQ_INT1].depth = 1; |
144 | icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; | 144 | icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; |
@@ -146,7 +146,7 @@ void __init init_IRQ(void) | |||
146 | 146 | ||
147 | /* INT2 : pccard1 interrupt */ | 147 | /* INT2 : pccard1 interrupt */ |
148 | irq_desc[M32R_IRQ_INT2].status = IRQ_DISABLED; | 148 | irq_desc[M32R_IRQ_INT2].status = IRQ_DISABLED; |
149 | irq_desc[M32R_IRQ_INT2].handler = &mappi_irq_type; | 149 | irq_desc[M32R_IRQ_INT2].chip = &mappi_irq_type; |
150 | irq_desc[M32R_IRQ_INT2].action = 0; | 150 | irq_desc[M32R_IRQ_INT2].action = 0; |
151 | irq_desc[M32R_IRQ_INT2].depth = 1; | 151 | irq_desc[M32R_IRQ_INT2].depth = 1; |
152 | icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; | 152 | icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; |