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-rw-r--r--arch/m32r/kernel/irq.c91
1 files changed, 91 insertions, 0 deletions
diff --git a/arch/m32r/kernel/irq.c b/arch/m32r/kernel/irq.c
new file mode 100644
index 000000000000..1ce63926a3c0
--- /dev/null
+++ b/arch/m32r/kernel/irq.c
@@ -0,0 +1,91 @@
1/*
2 * linux/arch/m32r/kernel/irq.c
3 *
4 * Copyright (c) 2003, 2004 Hitoshi Yamamoto
5 * Copyright (c) 2004 Hirokazu Takata <takata at linux-m32r.org>
6 */
7
8/*
9 * linux/arch/i386/kernel/irq.c
10 *
11 * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
12 *
13 * This file contains the lowest level m32r-specific interrupt
14 * entry and irq statistics code. All the remaining irq logic is
15 * done by the generic kernel/irq/ code and in the
16 * m32r-specific irq controller code.
17 */
18
19#include <linux/kernel_stat.h>
20#include <linux/interrupt.h>
21#include <linux/seq_file.h>
22#include <linux/module.h>
23#include <asm/uaccess.h>
24
25atomic_t irq_err_count;
26atomic_t irq_mis_count;
27
28/*
29 * Generic, controller-independent functions:
30 */
31
32int show_interrupts(struct seq_file *p, void *v)
33{
34 int i = *(loff_t *) v, j;
35 struct irqaction * action;
36 unsigned long flags;
37
38 if (i == 0) {
39 seq_printf(p, " ");
40 for (j=0; j<NR_CPUS; j++)
41 if (cpu_online(j))
42 seq_printf(p, "CPU%d ",j);
43 seq_putc(p, '\n');
44 }
45
46 if (i < NR_IRQS) {
47 spin_lock_irqsave(&irq_desc[i].lock, flags);
48 action = irq_desc[i].action;
49 if (!action)
50 goto skip;
51 seq_printf(p, "%3d: ",i);
52#ifndef CONFIG_SMP
53 seq_printf(p, "%10u ", kstat_irqs(i));
54#else
55 for (j = 0; j < NR_CPUS; j++)
56 if (cpu_online(j))
57 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
58#endif
59 seq_printf(p, " %14s", irq_desc[i].handler->typename);
60 seq_printf(p, " %s", action->name);
61
62 for (action=action->next; action; action = action->next)
63 seq_printf(p, ", %s", action->name);
64
65 seq_putc(p, '\n');
66skip:
67 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
68 } else if (i == NR_IRQS) {
69 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
70 seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count));
71 }
72 return 0;
73}
74
75/*
76 * do_IRQ handles all normal device IRQ's (the special
77 * SMP cross-CPU interrupts have their own specific
78 * handlers).
79 */
80asmlinkage unsigned int do_IRQ(int irq, struct pt_regs *regs)
81{
82 irq_enter();
83
84#ifdef CONFIG_DEBUG_STACKOVERFLOW
85 /* FIXME M32R */
86#endif
87 __do_IRQ(irq, regs);
88 irq_exit();
89
90 return 1;
91}