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-rw-r--r--arch/m32r/kernel/entry.S55
1 files changed, 22 insertions, 33 deletions
diff --git a/arch/m32r/kernel/entry.S b/arch/m32r/kernel/entry.S
index 3871b65f0c82..920bb742b7a2 100644
--- a/arch/m32r/kernel/entry.S
+++ b/arch/m32r/kernel/entry.S
@@ -20,7 +20,7 @@
20 * Stack layout in 'ret_from_system_call': 20 * Stack layout in 'ret_from_system_call':
21 * ptrace needs to have all regs on the stack. 21 * ptrace needs to have all regs on the stack.
22 * if the order here is changed, it needs to be 22 * if the order here is changed, it needs to be
23 * updated in fork.c:copy_process, signal.c:do_signal, 23 * updated in fork.c:copy_thread, signal.c:do_signal,
24 * ptrace.c and ptrace.h 24 * ptrace.c and ptrace.h
25 * 25 *
26 * M32Rx/M32R2 M32R 26 * M32Rx/M32R2 M32R
@@ -41,18 +41,17 @@
41 * @(0x38,sp) - syscall_nr ditto 41 * @(0x38,sp) - syscall_nr ditto
42 * @(0x3c,sp) - acc0h @(0x3c,sp) - acch 42 * @(0x3c,sp) - acc0h @(0x3c,sp) - acch
43 * @(0x40,sp) - acc0l @(0x40,sp) - accl 43 * @(0x40,sp) - acc0l @(0x40,sp) - accl
44 * @(0x44,sp) - acc1h @(0x44,sp) - psw 44 * @(0x44,sp) - acc1h @(0x44,sp) - dummy_acc1h
45 * @(0x48,sp) - acc1l @(0x48,sp) - bpc 45 * @(0x48,sp) - acc1l @(0x48,sp) - dummy_acc1l
46 * @(0x4c,sp) - psw @(0x4c,sp) - bbpsw 46 * @(0x4c,sp) - psw ditto
47 * @(0x50,sp) - bpc @(0x50,sp) - bbpc 47 * @(0x50,sp) - bpc ditto
48 * @(0x54,sp) - bbpsw @(0x54,sp) - spu (cr3) 48 * @(0x54,sp) - bbpsw ditto
49 * @(0x58,sp) - bbpc @(0x58,sp) - fp (r13) 49 * @(0x58,sp) - bbpc ditto
50 * @(0x5c,sp) - spu (cr3) @(0x5c,sp) - lr (r14) 50 * @(0x5c,sp) - spu (cr3) ditto
51 * @(0x60,sp) - fp (r13) @(0x60,sp) - spi (cr12) 51 * @(0x60,sp) - fp (r13) ditto
52 * @(0x64,sp) - lr (r14) @(0x64,sp) - orig_r0 52 * @(0x64,sp) - lr (r14) ditto
53 * @(0x68,sp) - spi (cr2) 53 * @(0x68,sp) - spi (cr2) ditto
54 * @(0x6c,sp) - orig_r0 54 * @(0x6c,sp) - orig_r0 ditto
55 *
56 */ 55 */
57 56
58#include <linux/config.h> 57#include <linux/config.h>
@@ -102,6 +101,12 @@
102#define ACC0L(reg) @(0x40,reg) 101#define ACC0L(reg) @(0x40,reg)
103#define ACC1H(reg) @(0x44,reg) 102#define ACC1H(reg) @(0x44,reg)
104#define ACC1L(reg) @(0x48,reg) 103#define ACC1L(reg) @(0x48,reg)
104#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
105#define ACCH(reg) @(0x3C,reg)
106#define ACCL(reg) @(0x40,reg)
107#else
108#error unknown isa configuration
109#endif
105#define PSW(reg) @(0x4C,reg) 110#define PSW(reg) @(0x4C,reg)
106#define BPC(reg) @(0x50,reg) 111#define BPC(reg) @(0x50,reg)
107#define BBPSW(reg) @(0x54,reg) 112#define BBPSW(reg) @(0x54,reg)
@@ -111,21 +116,6 @@
111#define LR(reg) @(0x64,reg) 116#define LR(reg) @(0x64,reg)
112#define SP(reg) @(0x68,reg) 117#define SP(reg) @(0x68,reg)
113#define ORIG_R0(reg) @(0x6C,reg) 118#define ORIG_R0(reg) @(0x6C,reg)
114#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
115#define ACCH(reg) @(0x3C,reg)
116#define ACCL(reg) @(0x40,reg)
117#define PSW(reg) @(0x44,reg)
118#define BPC(reg) @(0x48,reg)
119#define BBPSW(reg) @(0x4C,reg)
120#define BBPC(reg) @(0x50,reg)
121#define SPU(reg) @(0x54,reg)
122#define FP(reg) @(0x58,reg) /* FP = R13 */
123#define LR(reg) @(0x5C,reg)
124#define SP(reg) @(0x60,reg)
125#define ORIG_R0(reg) @(0x64,reg)
126#else
127#error unknown isa configuration
128#endif
129 119
130CF_MASK = 0x00000001 120CF_MASK = 0x00000001
131TF_MASK = 0x00000100 121TF_MASK = 0x00000100
@@ -142,7 +132,7 @@ VM_MASK = 0x00020000
142#endif 132#endif
143 133
144ENTRY(ret_from_fork) 134ENTRY(ret_from_fork)
145 ld r0, @sp+ 135 pop r0
146 bl schedule_tail 136 bl schedule_tail
147 GET_THREAD_INFO(r8) 137 GET_THREAD_INFO(r8)
148 bra syscall_exit 138 bra syscall_exit
@@ -231,7 +221,7 @@ restore_all:
231 RESTORE_ALL 221 RESTORE_ALL
232 222
233 # perform work that needs to be done immediately before resumption 223 # perform work that needs to be done immediately before resumption
234 # r9 : frags 224 # r9 : flags
235 ALIGN 225 ALIGN
236work_pending: 226work_pending:
237 and3 r4, r9, #_TIF_NEED_RESCHED 227 and3 r4, r9, #_TIF_NEED_RESCHED
@@ -320,7 +310,7 @@ ENTRY(ei_handler)
320; GET_ICU_STATUS; 310; GET_ICU_STATUS;
321 seth r0, #shigh(M32R_ICU_ISTS_ADDR) 311 seth r0, #shigh(M32R_ICU_ISTS_ADDR)
322 ld r0, @(low(M32R_ICU_ISTS_ADDR),r0) 312 ld r0, @(low(M32R_ICU_ISTS_ADDR),r0)
323 st r0, @-sp 313 push r0
324#if defined(CONFIG_SMP) 314#if defined(CONFIG_SMP)
325 /* 315 /*
326 * If IRQ == 0 --> Nothing to do, Not write IMASK 316 * If IRQ == 0 --> Nothing to do, Not write IMASK
@@ -557,7 +547,7 @@ check_end:
557#endif /* CONFIG_PLAT_M32104UT */ 547#endif /* CONFIG_PLAT_M32104UT */
558 bl do_IRQ 548 bl do_IRQ
559#endif /* CONFIG_SMP */ 549#endif /* CONFIG_SMP */
560 ld r14, @sp+ 550 pop r14
561 seth r0, #shigh(M32R_ICU_IMASK_ADDR) 551 seth r0, #shigh(M32R_ICU_IMASK_ADDR)
562 st r14, @(low(M32R_ICU_IMASK_ADDR),r0) 552 st r14, @(low(M32R_ICU_IMASK_ADDR),r0)
563#else 553#else
@@ -1015,4 +1005,3 @@ ENTRY(sys_call_table)
1015 .long sys_waitid 1005 .long sys_waitid
1016 1006
1017syscall_table_size=(.-sys_call_table) 1007syscall_table_size=(.-sys_call_table)
1018