2 files changed, 4 insertions, 4 deletions

diff --git a/arch/ia64/kernel/pci-dma.c b/arch/ia64/kernel/pci-dma.c
index e4cb443bb988..eb987386f691 100644
--- a/arch/ia64/kernel/pci-dma.c
+++ b/arch/ia64/kernel/pci-dma.c
@@ -37,7 +37,7 @@ int force_iommu __read_mostly;
    to i386. */
 struct device fallback_dev = {
         .init_name = "fallback device",
-        .coherent_dma_mask = DMA_32BIT_MASK,
+        .coherent_dma_mask = DMA_BIT_MASK(32),
         .dma_mask = &fallback_dev.coherent_dma_mask,
 };
 
@@ -75,7 +75,7 @@ int iommu_dma_supported(struct device *dev, u64 mask)
         /* Copied from i386. Doesn't make much sense, because it will
            only work for pci_alloc_coherent.
            The caller just has to use GFP_DMA in this case. */
-        if (mask < DMA_24BIT_MASK)
+        if (mask < DMA_BIT_MASK(24))
                 return 0;
 
         /* Tell the device to use SAC when IOMMU force is on.  This
@@ -90,7 +90,7 @@ int iommu_dma_supported(struct device *dev, u64 mask)
            SAC for these.  Assume all masks <= 40 bits are of this
            type. Normally this doesn't make any difference, but gives
            more gentle handling of IOMMU overflow. */
-        if (iommu_sac_force && (mask >= DMA_40BIT_MASK)) {
+        if (iommu_sac_force && (mask >= DMA_BIT_MASK(40))) {
                 dev_info(dev, "Force SAC with mask %lx\n", mask);
                 return 0;
         }
diff --git a/arch/ia64/sn/pci/pci_dma.c b/arch/ia64/sn/pci/pci_dma.c
index 8c130e8f00e1..d876423e4e75 100644
--- a/arch/ia64/sn/pci/pci_dma.c
+++ b/arch/ia64/sn/pci/pci_dma.c
@@ -349,7 +349,7 @@ static int sn_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 
 u64 sn_dma_get_required_mask(struct device *dev)
 {
-        return DMA_64BIT_MASK;
+        return DMA_BIT_MASK(64);
 }
 EXPORT_SYMBOL_GPL(sn_dma_get_required_mask);