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-rw-r--r--arch/ia64/Kconfig1
-rw-r--r--arch/ia64/hp/sim/hpsim_irq.c31
-rw-r--r--arch/ia64/include/asm/hw_irq.h3
-rw-r--r--arch/ia64/kernel/iosapic.c119
-rw-r--r--arch/ia64/kernel/irq.c73
-rw-r--r--arch/ia64/kernel/irq_ia64.c10
-rw-r--r--arch/ia64/kernel/irq_lsapic.c23
-rw-r--r--arch/ia64/kernel/mca.c4
-rw-r--r--arch/ia64/kernel/msi_ia64.c49
-rw-r--r--arch/ia64/kernel/smpboot.c14
-rw-r--r--arch/ia64/sn/kernel/irq.c97
-rw-r--r--arch/ia64/sn/kernel/msi_sn.c32
-rw-r--r--arch/ia64/xen/irq_xen.c4
13 files changed, 183 insertions, 277 deletions
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index fcf3b437a2d9..c4ea0925cdbd 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -26,6 +26,7 @@ config IA64
26 select GENERIC_IRQ_PROBE 26 select GENERIC_IRQ_PROBE
27 select GENERIC_PENDING_IRQ if SMP 27 select GENERIC_PENDING_IRQ if SMP
28 select IRQ_PER_CPU 28 select IRQ_PER_CPU
29 select GENERIC_IRQ_SHOW
29 default y 30 default y
30 help 31 help
31 The Itanium Processor Family is Intel's 64-bit successor to 32 The Itanium Processor Family is Intel's 64-bit successor to
diff --git a/arch/ia64/hp/sim/hpsim_irq.c b/arch/ia64/hp/sim/hpsim_irq.c
index b272261d77cc..4bd9a63260ee 100644
--- a/arch/ia64/hp/sim/hpsim_irq.c
+++ b/arch/ia64/hp/sim/hpsim_irq.c
@@ -11,42 +11,41 @@
11#include <linux/irq.h> 11#include <linux/irq.h>
12 12
13static unsigned int 13static unsigned int
14hpsim_irq_startup (unsigned int irq) 14hpsim_irq_startup(struct irq_data *data)
15{ 15{
16 return 0; 16 return 0;
17} 17}
18 18
19static void 19static void
20hpsim_irq_noop (unsigned int irq) 20hpsim_irq_noop(struct irq_data *data)
21{ 21{
22} 22}
23 23
24static int 24static int
25hpsim_set_affinity_noop(unsigned int a, const struct cpumask *b) 25hpsim_set_affinity_noop(struct irq_data *d, const struct cpumask *b, bool f)
26{ 26{
27 return 0; 27 return 0;
28} 28}
29 29
30static struct irq_chip irq_type_hp_sim = { 30static struct irq_chip irq_type_hp_sim = {
31 .name = "hpsim", 31 .name = "hpsim",
32 .startup = hpsim_irq_startup, 32 .irq_startup = hpsim_irq_startup,
33 .shutdown = hpsim_irq_noop, 33 .irq_shutdown = hpsim_irq_noop,
34 .enable = hpsim_irq_noop, 34 .irq_enable = hpsim_irq_noop,
35 .disable = hpsim_irq_noop, 35 .irq_disable = hpsim_irq_noop,
36 .ack = hpsim_irq_noop, 36 .irq_ack = hpsim_irq_noop,
37 .end = hpsim_irq_noop, 37 .irq_set_affinity = hpsim_set_affinity_noop,
38 .set_affinity = hpsim_set_affinity_noop,
39}; 38};
40 39
41void __init 40void __init
42hpsim_irq_init (void) 41hpsim_irq_init (void)
43{ 42{
44 struct irq_desc *idesc;
45 int i; 43 int i;
46 44
47 for (i = 0; i < NR_IRQS; ++i) { 45 for_each_active_irq(i) {
48 idesc = irq_desc + i; 46 struct irq_chip *chip = irq_get_chip(i);
49 if (idesc->chip == &no_irq_chip) 47
50 idesc->chip = &irq_type_hp_sim; 48 if (chip == &no_irq_chip)
49 irq_set_chip(i, &irq_type_hp_sim);
51 } 50 }
52} 51}
diff --git a/arch/ia64/include/asm/hw_irq.h b/arch/ia64/include/asm/hw_irq.h
index bf2e37493e04..a681d02cb324 100644
--- a/arch/ia64/include/asm/hw_irq.h
+++ b/arch/ia64/include/asm/hw_irq.h
@@ -151,9 +151,6 @@ static inline void ia64_native_resend_irq(unsigned int vector)
151/* 151/*
152 * Default implementations for the irq-descriptor API: 152 * Default implementations for the irq-descriptor API:
153 */ 153 */
154
155extern struct irq_desc irq_desc[NR_IRQS];
156
157#ifndef CONFIG_IA64_GENERIC 154#ifndef CONFIG_IA64_GENERIC
158static inline ia64_vector __ia64_irq_to_vector(int irq) 155static inline ia64_vector __ia64_irq_to_vector(int irq)
159{ 156{
diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c
index 22c38404f539..b0f9afebb146 100644
--- a/arch/ia64/kernel/iosapic.c
+++ b/arch/ia64/kernel/iosapic.c
@@ -257,7 +257,7 @@ set_rte (unsigned int gsi, unsigned int irq, unsigned int dest, int mask)
257} 257}
258 258
259static void 259static void
260nop (unsigned int irq) 260nop (struct irq_data *data)
261{ 261{
262 /* do nothing... */ 262 /* do nothing... */
263} 263}
@@ -287,8 +287,9 @@ kexec_disable_iosapic(void)
287#endif 287#endif
288 288
289static void 289static void
290mask_irq (unsigned int irq) 290mask_irq (struct irq_data *data)
291{ 291{
292 unsigned int irq = data->irq;
292 u32 low32; 293 u32 low32;
293 int rte_index; 294 int rte_index;
294 struct iosapic_rte_info *rte; 295 struct iosapic_rte_info *rte;
@@ -305,8 +306,9 @@ mask_irq (unsigned int irq)
305} 306}
306 307
307static void 308static void
308unmask_irq (unsigned int irq) 309unmask_irq (struct irq_data *data)
309{ 310{
311 unsigned int irq = data->irq;
310 u32 low32; 312 u32 low32;
311 int rte_index; 313 int rte_index;
312 struct iosapic_rte_info *rte; 314 struct iosapic_rte_info *rte;
@@ -323,9 +325,11 @@ unmask_irq (unsigned int irq)
323 325
324 326
325static int 327static int
326iosapic_set_affinity(unsigned int irq, const struct cpumask *mask) 328iosapic_set_affinity(struct irq_data *data, const struct cpumask *mask,
329 bool force)
327{ 330{
328#ifdef CONFIG_SMP 331#ifdef CONFIG_SMP
332 unsigned int irq = data->irq;
329 u32 high32, low32; 333 u32 high32, low32;
330 int cpu, dest, rte_index; 334 int cpu, dest, rte_index;
331 int redir = (irq & IA64_IRQ_REDIRECTED) ? 1 : 0; 335 int redir = (irq & IA64_IRQ_REDIRECTED) ? 1 : 0;
@@ -379,32 +383,33 @@ iosapic_set_affinity(unsigned int irq, const struct cpumask *mask)
379 */ 383 */
380 384
381static unsigned int 385static unsigned int
382iosapic_startup_level_irq (unsigned int irq) 386iosapic_startup_level_irq (struct irq_data *data)
383{ 387{
384 unmask_irq(irq); 388 unmask_irq(data);
385 return 0; 389 return 0;
386} 390}
387 391
388static void 392static void
389iosapic_unmask_level_irq (unsigned int irq) 393iosapic_unmask_level_irq (struct irq_data *data)
390{ 394{
395 unsigned int irq = data->irq;
391 ia64_vector vec = irq_to_vector(irq); 396 ia64_vector vec = irq_to_vector(irq);
392 struct iosapic_rte_info *rte; 397 struct iosapic_rte_info *rte;
393 int do_unmask_irq = 0; 398 int do_unmask_irq = 0;
394 399
395 irq_complete_move(irq); 400 irq_complete_move(irq);
396 if (unlikely(irq_desc[irq].status & IRQ_MOVE_PENDING)) { 401 if (unlikely(irqd_is_setaffinity_pending(data))) {
397 do_unmask_irq = 1; 402 do_unmask_irq = 1;
398 mask_irq(irq); 403 mask_irq(data);
399 } else 404 } else
400 unmask_irq(irq); 405 unmask_irq(data);
401 406
402 list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) 407 list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list)
403 iosapic_eoi(rte->iosapic->addr, vec); 408 iosapic_eoi(rte->iosapic->addr, vec);
404 409
405 if (unlikely(do_unmask_irq)) { 410 if (unlikely(do_unmask_irq)) {
406 move_masked_irq(irq); 411 irq_move_masked_irq(data);
407 unmask_irq(irq); 412 unmask_irq(data);
408 } 413 }
409} 414}
410 415
@@ -414,15 +419,15 @@ iosapic_unmask_level_irq (unsigned int irq)
414#define iosapic_ack_level_irq nop 419#define iosapic_ack_level_irq nop
415 420
416static struct irq_chip irq_type_iosapic_level = { 421static struct irq_chip irq_type_iosapic_level = {
417 .name = "IO-SAPIC-level", 422 .name = "IO-SAPIC-level",
418 .startup = iosapic_startup_level_irq, 423 .irq_startup = iosapic_startup_level_irq,
419 .shutdown = iosapic_shutdown_level_irq, 424 .irq_shutdown = iosapic_shutdown_level_irq,
420 .enable = iosapic_enable_level_irq, 425 .irq_enable = iosapic_enable_level_irq,
421 .disable = iosapic_disable_level_irq, 426 .irq_disable = iosapic_disable_level_irq,
422 .ack = iosapic_ack_level_irq, 427 .irq_ack = iosapic_ack_level_irq,
423 .mask = mask_irq, 428 .irq_mask = mask_irq,
424 .unmask = iosapic_unmask_level_irq, 429 .irq_unmask = iosapic_unmask_level_irq,
425 .set_affinity = iosapic_set_affinity 430 .irq_set_affinity = iosapic_set_affinity
426}; 431};
427 432
428/* 433/*
@@ -430,9 +435,9 @@ static struct irq_chip irq_type_iosapic_level = {
430 */ 435 */
431 436
432static unsigned int 437static unsigned int
433iosapic_startup_edge_irq (unsigned int irq) 438iosapic_startup_edge_irq (struct irq_data *data)
434{ 439{
435 unmask_irq(irq); 440 unmask_irq(data);
436 /* 441 /*
437 * IOSAPIC simply drops interrupts pended while the 442 * IOSAPIC simply drops interrupts pended while the
438 * corresponding pin was masked, so we can't know if an 443 * corresponding pin was masked, so we can't know if an
@@ -442,37 +447,25 @@ iosapic_startup_edge_irq (unsigned int irq)
442} 447}
443 448
444static void 449static void
445iosapic_ack_edge_irq (unsigned int irq) 450iosapic_ack_edge_irq (struct irq_data *data)
446{ 451{
447 struct irq_desc *idesc = irq_desc + irq; 452 irq_complete_move(data->irq);
448 453 irq_move_irq(data);
449 irq_complete_move(irq);
450 move_native_irq(irq);
451 /*
452 * Once we have recorded IRQ_PENDING already, we can mask the
453 * interrupt for real. This prevents IRQ storms from unhandled
454 * devices.
455 */
456 if ((idesc->status & (IRQ_PENDING|IRQ_DISABLED)) ==
457 (IRQ_PENDING|IRQ_DISABLED))
458 mask_irq(irq);
459} 454}
460 455
461#define iosapic_enable_edge_irq unmask_irq 456#define iosapic_enable_edge_irq unmask_irq
462#define iosapic_disable_edge_irq nop 457#define iosapic_disable_edge_irq nop
463#define iosapic_end_edge_irq nop
464 458
465static struct irq_chip irq_type_iosapic_edge = { 459static struct irq_chip irq_type_iosapic_edge = {
466 .name = "IO-SAPIC-edge", 460 .name = "IO-SAPIC-edge",
467 .startup = iosapic_startup_edge_irq, 461 .irq_startup = iosapic_startup_edge_irq,
468 .shutdown = iosapic_disable_edge_irq, 462 .irq_shutdown = iosapic_disable_edge_irq,
469 .enable = iosapic_enable_edge_irq, 463 .irq_enable = iosapic_enable_edge_irq,
470 .disable = iosapic_disable_edge_irq, 464 .irq_disable = iosapic_disable_edge_irq,
471 .ack = iosapic_ack_edge_irq, 465 .irq_ack = iosapic_ack_edge_irq,
472 .end = iosapic_end_edge_irq, 466 .irq_mask = mask_irq,
473 .mask = mask_irq, 467 .irq_unmask = unmask_irq,
474 .unmask = unmask_irq, 468 .irq_set_affinity = iosapic_set_affinity
475 .set_affinity = iosapic_set_affinity
476}; 469};
477 470
478static unsigned int 471static unsigned int
@@ -562,8 +555,7 @@ static int
562register_intr (unsigned int gsi, int irq, unsigned char delivery, 555register_intr (unsigned int gsi, int irq, unsigned char delivery,
563 unsigned long polarity, unsigned long trigger) 556 unsigned long polarity, unsigned long trigger)
564{ 557{
565 struct irq_desc *idesc; 558 struct irq_chip *chip, *irq_type;
566 struct irq_chip *irq_type;
567 int index; 559 int index;
568 struct iosapic_rte_info *rte; 560 struct iosapic_rte_info *rte;
569 561
@@ -610,19 +602,18 @@ register_intr (unsigned int gsi, int irq, unsigned char delivery,
610 602
611 irq_type = iosapic_get_irq_chip(trigger); 603 irq_type = iosapic_get_irq_chip(trigger);
612 604
613 idesc = irq_desc + irq; 605 chip = irq_get_chip(irq);
614 if (irq_type != NULL && idesc->chip != irq_type) { 606 if (irq_type != NULL && chip != irq_type) {
615 if (idesc->chip != &no_irq_chip) 607 if (chip != &no_irq_chip)
616 printk(KERN_WARNING 608 printk(KERN_WARNING
617 "%s: changing vector %d from %s to %s\n", 609 "%s: changing vector %d from %s to %s\n",
618 __func__, irq_to_vector(irq), 610 __func__, irq_to_vector(irq),
619 idesc->chip->name, irq_type->name); 611 chip->name, irq_type->name);
620 idesc->chip = irq_type; 612 chip = irq_type;
621 } 613 }
622 if (trigger == IOSAPIC_EDGE) 614 __irq_set_chip_handler_name_locked(irq, chip, trigger == IOSAPIC_EDGE ?
623 __set_irq_handler_unlocked(irq, handle_edge_irq); 615 handle_edge_irq : handle_level_irq,
624 else 616 NULL);
625 __set_irq_handler_unlocked(irq, handle_level_irq);
626 return 0; 617 return 0;
627} 618}
628 619
@@ -732,6 +723,7 @@ iosapic_register_intr (unsigned int gsi,
732 struct iosapic_rte_info *rte; 723 struct iosapic_rte_info *rte;
733 u32 low32; 724 u32 low32;
734 unsigned char dmode; 725 unsigned char dmode;
726 struct irq_desc *desc;
735 727
736 /* 728 /*
737 * If this GSI has already been registered (i.e., it's a 729 * If this GSI has already been registered (i.e., it's a
@@ -759,12 +751,13 @@ iosapic_register_intr (unsigned int gsi,
759 goto unlock_iosapic_lock; 751 goto unlock_iosapic_lock;
760 } 752 }
761 753
762 raw_spin_lock(&irq_desc[irq].lock); 754 desc = irq_to_desc(irq);
755 raw_spin_lock(&desc->lock);
763 dest = get_target_cpu(gsi, irq); 756 dest = get_target_cpu(gsi, irq);
764 dmode = choose_dmode(); 757 dmode = choose_dmode();
765 err = register_intr(gsi, irq, dmode, polarity, trigger); 758 err = register_intr(gsi, irq, dmode, polarity, trigger);
766 if (err < 0) { 759 if (err < 0) {
767 raw_spin_unlock(&irq_desc[irq].lock); 760 raw_spin_unlock(&desc->lock);
768 irq = err; 761 irq = err;
769 goto unlock_iosapic_lock; 762 goto unlock_iosapic_lock;
770 } 763 }
@@ -783,7 +776,7 @@ iosapic_register_intr (unsigned int gsi,
783 (polarity == IOSAPIC_POL_HIGH ? "high" : "low"), 776 (polarity == IOSAPIC_POL_HIGH ? "high" : "low"),
784 cpu_logical_id(dest), dest, irq_to_vector(irq)); 777 cpu_logical_id(dest), dest, irq_to_vector(irq));
785 778
786 raw_spin_unlock(&irq_desc[irq].lock); 779 raw_spin_unlock(&desc->lock);
787 unlock_iosapic_lock: 780 unlock_iosapic_lock:
788 spin_unlock_irqrestore(&iosapic_lock, flags); 781 spin_unlock_irqrestore(&iosapic_lock, flags);
789 return irq; 782 return irq;
@@ -794,7 +787,6 @@ iosapic_unregister_intr (unsigned int gsi)
794{ 787{
795 unsigned long flags; 788 unsigned long flags;
796 int irq, index; 789 int irq, index;
797 struct irq_desc *idesc;
798 u32 low32; 790 u32 low32;
799 unsigned long trigger, polarity; 791 unsigned long trigger, polarity;
800 unsigned int dest; 792 unsigned int dest;
@@ -824,7 +816,6 @@ iosapic_unregister_intr (unsigned int gsi)
824 if (--rte->refcnt > 0) 816 if (--rte->refcnt > 0)
825 goto out; 817 goto out;
826 818
827 idesc = irq_desc + irq;
828 rte->refcnt = NO_REF_RTE; 819 rte->refcnt = NO_REF_RTE;
829 820
830 /* Mask the interrupt */ 821 /* Mask the interrupt */
@@ -848,7 +839,7 @@ iosapic_unregister_intr (unsigned int gsi)
848 if (iosapic_intr_info[irq].count == 0) { 839 if (iosapic_intr_info[irq].count == 0) {
849#ifdef CONFIG_SMP 840#ifdef CONFIG_SMP
850 /* Clear affinity */ 841 /* Clear affinity */
851 cpumask_setall(idesc->affinity); 842 cpumask_setall(irq_get_irq_data(irq)->affinity);
852#endif 843#endif
853 /* Clear the interrupt information */ 844 /* Clear the interrupt information */
854 iosapic_intr_info[irq].dest = 0; 845 iosapic_intr_info[irq].dest = 0;
diff --git a/arch/ia64/kernel/irq.c b/arch/ia64/kernel/irq.c
index 94ee9d067cbd..ad69606613eb 100644
--- a/arch/ia64/kernel/irq.c
+++ b/arch/ia64/kernel/irq.c
@@ -53,47 +53,9 @@ atomic_t irq_err_count;
53/* 53/*
54 * /proc/interrupts printing: 54 * /proc/interrupts printing:
55 */ 55 */
56 56int arch_show_interrupts(struct seq_file *p, int prec)
57int show_interrupts(struct seq_file *p, void *v)
58{ 57{
59 int i = *(loff_t *) v, j; 58 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
60 struct irqaction * action;
61 unsigned long flags;
62
63 if (i == 0) {
64 char cpuname[16];
65 seq_printf(p, " ");
66 for_each_online_cpu(j) {
67 snprintf(cpuname, 10, "CPU%d", j);
68 seq_printf(p, "%10s ", cpuname);
69 }
70 seq_putc(p, '\n');
71 }
72
73 if (i < NR_IRQS) {
74 raw_spin_lock_irqsave(&irq_desc[i].lock, flags);
75 action = irq_desc[i].action;
76 if (!action)
77 goto skip;
78 seq_printf(p, "%3d: ",i);
79#ifndef CONFIG_SMP
80 seq_printf(p, "%10u ", kstat_irqs(i));
81#else
82 for_each_online_cpu(j) {
83 seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
84 }
85#endif
86 seq_printf(p, " %14s", irq_desc[i].chip->name);
87 seq_printf(p, " %s", action->name);
88
89 for (action=action->next; action; action = action->next)
90 seq_printf(p, ", %s", action->name);
91
92 seq_putc(p, '\n');
93skip:
94 raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags);
95 } else if (i == NR_IRQS)
96 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
97 return 0; 59 return 0;
98} 60}
99 61
@@ -103,7 +65,7 @@ static char irq_redir [NR_IRQS]; // = { [0 ... NR_IRQS-1] = 1 };
103void set_irq_affinity_info (unsigned int irq, int hwid, int redir) 65void set_irq_affinity_info (unsigned int irq, int hwid, int redir)
104{ 66{
105 if (irq < NR_IRQS) { 67 if (irq < NR_IRQS) {
106 cpumask_copy(irq_desc[irq].affinity, 68 cpumask_copy(irq_get_irq_data(irq)->affinity,
107 cpumask_of(cpu_logical_id(hwid))); 69 cpumask_of(cpu_logical_id(hwid)));
108 irq_redir[irq] = (char) (redir & 0xff); 70 irq_redir[irq] = (char) (redir & 0xff);
109 } 71 }
@@ -130,13 +92,14 @@ unsigned int vectors_in_migration[NR_IRQS];
130 */ 92 */
131static void migrate_irqs(void) 93static void migrate_irqs(void)
132{ 94{
133 struct irq_desc *desc;
134 int irq, new_cpu; 95 int irq, new_cpu;
135 96
136 for (irq=0; irq < NR_IRQS; irq++) { 97 for (irq=0; irq < NR_IRQS; irq++) {
137 desc = irq_desc + irq; 98 struct irq_desc *desc = irq_to_desc(irq);
99 struct irq_data *data = irq_desc_get_irq_data(desc);
100 struct irq_chip *chip = irq_data_get_irq_chip(data);
138 101
139 if (desc->status == IRQ_DISABLED) 102 if (irqd_irq_disabled(data))
140 continue; 103 continue;
141 104
142 /* 105 /*
@@ -145,10 +108,10 @@ static void migrate_irqs(void)
145 * tell CPU not to respond to these local intr sources. 108 * tell CPU not to respond to these local intr sources.
146 * such as ITV,CPEI,MCA etc. 109 * such as ITV,CPEI,MCA etc.
147 */ 110 */
148 if (desc->status == IRQ_PER_CPU) 111 if (irqd_is_per_cpu(data))
149 continue; 112 continue;
150 113
151 if (cpumask_any_and(irq_desc[irq].affinity, cpu_online_mask) 114 if (cpumask_any_and(data->affinity, cpu_online_mask)
152 >= nr_cpu_ids) { 115 >= nr_cpu_ids) {
153 /* 116 /*
154 * Save it for phase 2 processing 117 * Save it for phase 2 processing
@@ -160,16 +123,16 @@ static void migrate_irqs(void)
160 /* 123 /*
161 * Al three are essential, currently WARN_ON.. maybe panic? 124 * Al three are essential, currently WARN_ON.. maybe panic?
162 */ 125 */
163 if (desc->chip && desc->chip->disable && 126 if (chip && chip->irq_disable &&
164 desc->chip->enable && desc->chip->set_affinity) { 127 chip->irq_enable && chip->irq_set_affinity) {
165 desc->chip->disable(irq); 128 chip->irq_disable(data);
166 desc->chip->set_affinity(irq, 129 chip->irq_set_affinity(data,
167 cpumask_of(new_cpu)); 130 cpumask_of(new_cpu), false);
168 desc->chip->enable(irq); 131 chip->irq_enable(data);
169 } else { 132 } else {
170 WARN_ON((!(desc->chip) || !(desc->chip->disable) || 133 WARN_ON((!chip || !chip->irq_disable ||
171 !(desc->chip->enable) || 134 !chip->irq_enable ||
172 !(desc->chip->set_affinity))); 135 !chip->irq_set_affinity));
173 } 136 }
174 } 137 }
175 } 138 }
diff --git a/arch/ia64/kernel/irq_ia64.c b/arch/ia64/kernel/irq_ia64.c
index 38c07b866901..5b704740f160 100644
--- a/arch/ia64/kernel/irq_ia64.c
+++ b/arch/ia64/kernel/irq_ia64.c
@@ -343,7 +343,7 @@ static irqreturn_t smp_irq_move_cleanup_interrupt(int irq, void *dev_id)
343 if (irq < 0) 343 if (irq < 0)
344 continue; 344 continue;
345 345
346 desc = irq_desc + irq; 346 desc = irq_to_desc(irq);
347 cfg = irq_cfg + irq; 347 cfg = irq_cfg + irq;
348 raw_spin_lock(&desc->lock); 348 raw_spin_lock(&desc->lock);
349 if (!cfg->move_cleanup_count) 349 if (!cfg->move_cleanup_count)
@@ -626,17 +626,15 @@ static struct irqaction tlb_irqaction = {
626void 626void
627ia64_native_register_percpu_irq (ia64_vector vec, struct irqaction *action) 627ia64_native_register_percpu_irq (ia64_vector vec, struct irqaction *action)
628{ 628{
629 struct irq_desc *desc;
630 unsigned int irq; 629 unsigned int irq;
631 630
632 irq = vec; 631 irq = vec;
633 BUG_ON(bind_irq_vector(irq, vec, CPU_MASK_ALL)); 632 BUG_ON(bind_irq_vector(irq, vec, CPU_MASK_ALL));
634 desc = irq_desc + irq; 633 irq_set_status_flags(irq, IRQ_PER_CPU);
635 desc->status |= IRQ_PER_CPU; 634 irq_set_chip(irq, &irq_type_ia64_lsapic);
636 set_irq_chip(irq, &irq_type_ia64_lsapic);
637 if (action) 635 if (action)
638 setup_irq(irq, action); 636 setup_irq(irq, action);
639 set_irq_handler(irq, handle_percpu_irq); 637 irq_set_handler(irq, handle_percpu_irq);
640} 638}
641 639
642void __init 640void __init
diff --git a/arch/ia64/kernel/irq_lsapic.c b/arch/ia64/kernel/irq_lsapic.c
index fc1549d4564d..1b3a776e5161 100644
--- a/arch/ia64/kernel/irq_lsapic.c
+++ b/arch/ia64/kernel/irq_lsapic.c
@@ -15,31 +15,30 @@
15#include <linux/irq.h> 15#include <linux/irq.h>
16 16
17static unsigned int 17static unsigned int
18lsapic_noop_startup (unsigned int irq) 18lsapic_noop_startup (struct irq_data *data)
19{ 19{
20 return 0; 20 return 0;
21} 21}
22 22
23static void 23static void
24lsapic_noop (unsigned int irq) 24lsapic_noop (struct irq_data *data)
25{ 25{
26 /* nothing to do... */ 26 /* nothing to do... */
27} 27}
28 28
29static int lsapic_retrigger(unsigned int irq) 29static int lsapic_retrigger(struct irq_data *data)
30{ 30{
31 ia64_resend_irq(irq); 31 ia64_resend_irq(data->irq);
32 32
33 return 1; 33 return 1;
34} 34}
35 35
36struct irq_chip irq_type_ia64_lsapic = { 36struct irq_chip irq_type_ia64_lsapic = {
37 .name = "LSAPIC", 37 .name = "LSAPIC",
38 .startup = lsapic_noop_startup, 38 .irq_startup = lsapic_noop_startup,
39 .shutdown = lsapic_noop, 39 .irq_shutdown = lsapic_noop,
40 .enable = lsapic_noop, 40 .irq_enable = lsapic_noop,
41 .disable = lsapic_noop, 41 .irq_disable = lsapic_noop,
42 .ack = lsapic_noop, 42 .irq_ack = lsapic_noop,
43 .end = lsapic_noop, 43 .irq_retrigger = lsapic_retrigger,
44 .retrigger = lsapic_retrigger,
45}; 44};
diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c
index 80d50b83d419..84fb405eee87 100644
--- a/arch/ia64/kernel/mca.c
+++ b/arch/ia64/kernel/mca.c
@@ -2125,7 +2125,6 @@ ia64_mca_late_init(void)
2125 cpe_poll_timer.function = ia64_mca_cpe_poll; 2125 cpe_poll_timer.function = ia64_mca_cpe_poll;
2126 2126
2127 { 2127 {
2128 struct irq_desc *desc;
2129 unsigned int irq; 2128 unsigned int irq;
2130 2129
2131 if (cpe_vector >= 0) { 2130 if (cpe_vector >= 0) {
@@ -2133,8 +2132,7 @@ ia64_mca_late_init(void)
2133 irq = local_vector_to_irq(cpe_vector); 2132 irq = local_vector_to_irq(cpe_vector);
2134 if (irq > 0) { 2133 if (irq > 0) {
2135 cpe_poll_enabled = 0; 2134 cpe_poll_enabled = 0;
2136 desc = irq_desc + irq; 2135 irq_set_status_flags(irq, IRQ_PER_CPU);
2137 desc->status |= IRQ_PER_CPU;
2138 setup_irq(irq, &mca_cpe_irqaction); 2136 setup_irq(irq, &mca_cpe_irqaction);
2139 ia64_cpe_irq = irq; 2137 ia64_cpe_irq = irq;
2140 ia64_mca_register_cpev(cpe_vector); 2138 ia64_mca_register_cpev(cpe_vector);
diff --git a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c
index 00b19a416eab..009df5434a7a 100644
--- a/arch/ia64/kernel/msi_ia64.c
+++ b/arch/ia64/kernel/msi_ia64.c
@@ -12,12 +12,13 @@
12static struct irq_chip ia64_msi_chip; 12static struct irq_chip ia64_msi_chip;
13 13
14#ifdef CONFIG_SMP 14#ifdef CONFIG_SMP
15static int ia64_set_msi_irq_affinity(unsigned int irq, 15static int ia64_set_msi_irq_affinity(struct irq_data *idata,
16 const cpumask_t *cpu_mask) 16 const cpumask_t *cpu_mask, bool force)
17{ 17{
18 struct msi_msg msg; 18 struct msi_msg msg;
19 u32 addr, data; 19 u32 addr, data;
20 int cpu = first_cpu(*cpu_mask); 20 int cpu = first_cpu(*cpu_mask);
21 unsigned int irq = idata->irq;
21 22
22 if (!cpu_online(cpu)) 23 if (!cpu_online(cpu))
23 return -1; 24 return -1;
@@ -38,7 +39,7 @@ static int ia64_set_msi_irq_affinity(unsigned int irq,
38 msg.data = data; 39 msg.data = data;
39 40
40 write_msi_msg(irq, &msg); 41 write_msi_msg(irq, &msg);
41 cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu)); 42 cpumask_copy(idata->affinity, cpumask_of(cpu));
42 43
43 return 0; 44 return 0;
44} 45}
@@ -55,7 +56,7 @@ int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
55 if (irq < 0) 56 if (irq < 0)
56 return irq; 57 return irq;
57 58
58 set_irq_msi(irq, desc); 59 irq_set_msi_desc(irq, desc);
59 cpus_and(mask, irq_to_domain(irq), cpu_online_map); 60 cpus_and(mask, irq_to_domain(irq), cpu_online_map);
60 dest_phys_id = cpu_physical_id(first_cpu(mask)); 61 dest_phys_id = cpu_physical_id(first_cpu(mask));
61 vector = irq_to_vector(irq); 62 vector = irq_to_vector(irq);
@@ -74,7 +75,7 @@ int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
74 MSI_DATA_VECTOR(vector); 75 MSI_DATA_VECTOR(vector);
75 76
76 write_msi_msg(irq, &msg); 77 write_msi_msg(irq, &msg);
77 set_irq_chip_and_handler(irq, &ia64_msi_chip, handle_edge_irq); 78 irq_set_chip_and_handler(irq, &ia64_msi_chip, handle_edge_irq);
78 79
79 return 0; 80 return 0;
80} 81}
@@ -84,16 +85,16 @@ void ia64_teardown_msi_irq(unsigned int irq)
84 destroy_irq(irq); 85 destroy_irq(irq);
85} 86}
86 87
87static void ia64_ack_msi_irq(unsigned int irq) 88static void ia64_ack_msi_irq(struct irq_data *data)
88{ 89{
89 irq_complete_move(irq); 90 irq_complete_move(data->irq);
90 move_native_irq(irq); 91 irq_move_irq(data);
91 ia64_eoi(); 92 ia64_eoi();
92} 93}
93 94
94static int ia64_msi_retrigger_irq(unsigned int irq) 95static int ia64_msi_retrigger_irq(struct irq_data *data)
95{ 96{
96 unsigned int vector = irq_to_vector(irq); 97 unsigned int vector = irq_to_vector(data->irq);
97 ia64_resend_irq(vector); 98 ia64_resend_irq(vector);
98 99
99 return 1; 100 return 1;
@@ -103,14 +104,14 @@ static int ia64_msi_retrigger_irq(unsigned int irq)
103 * Generic ops used on most IA64 platforms. 104 * Generic ops used on most IA64 platforms.
104 */ 105 */
105static struct irq_chip ia64_msi_chip = { 106static struct irq_chip ia64_msi_chip = {
106 .name = "PCI-MSI", 107 .name = "PCI-MSI",
107 .irq_mask = mask_msi_irq, 108 .irq_mask = mask_msi_irq,
108 .irq_unmask = unmask_msi_irq, 109 .irq_unmask = unmask_msi_irq,
109 .ack = ia64_ack_msi_irq, 110 .irq_ack = ia64_ack_msi_irq,
110#ifdef CONFIG_SMP 111#ifdef CONFIG_SMP
111 .set_affinity = ia64_set_msi_irq_affinity, 112 .irq_set_affinity = ia64_set_msi_irq_affinity,
112#endif 113#endif
113 .retrigger = ia64_msi_retrigger_irq, 114 .irq_retrigger = ia64_msi_retrigger_irq,
114}; 115};
115 116
116 117
@@ -132,8 +133,10 @@ void arch_teardown_msi_irq(unsigned int irq)
132 133
133#ifdef CONFIG_DMAR 134#ifdef CONFIG_DMAR
134#ifdef CONFIG_SMP 135#ifdef CONFIG_SMP
135static int dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) 136static int dmar_msi_set_affinity(struct irq_data *data,
137 const struct cpumask *mask, bool force)
136{ 138{
139 unsigned int irq = data->irq;
137 struct irq_cfg *cfg = irq_cfg + irq; 140 struct irq_cfg *cfg = irq_cfg + irq;
138 struct msi_msg msg; 141 struct msi_msg msg;
139 int cpu = cpumask_first(mask); 142 int cpu = cpumask_first(mask);
@@ -152,7 +155,7 @@ static int dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
152 msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu)); 155 msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));
153 156
154 dmar_msi_write(irq, &msg); 157 dmar_msi_write(irq, &msg);
155 cpumask_copy(irq_desc[irq].affinity, mask); 158 cpumask_copy(data->affinity, mask);
156 159
157 return 0; 160 return 0;
158} 161}
@@ -162,11 +165,11 @@ static struct irq_chip dmar_msi_type = {
162 .name = "DMAR_MSI", 165 .name = "DMAR_MSI",
163 .irq_unmask = dmar_msi_unmask, 166 .irq_unmask = dmar_msi_unmask,
164 .irq_mask = dmar_msi_mask, 167 .irq_mask = dmar_msi_mask,
165 .ack = ia64_ack_msi_irq, 168 .irq_ack = ia64_ack_msi_irq,
166#ifdef CONFIG_SMP 169#ifdef CONFIG_SMP
167 .set_affinity = dmar_msi_set_affinity, 170 .irq_set_affinity = dmar_msi_set_affinity,
168#endif 171#endif
169 .retrigger = ia64_msi_retrigger_irq, 172 .irq_retrigger = ia64_msi_retrigger_irq,
170}; 173};
171 174
172static int 175static int
@@ -203,8 +206,8 @@ int arch_setup_dmar_msi(unsigned int irq)
203 if (ret < 0) 206 if (ret < 0)
204 return ret; 207 return ret;
205 dmar_msi_write(irq, &msg); 208 dmar_msi_write(irq, &msg);
206 set_irq_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq, 209 irq_set_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq,
207 "edge"); 210 "edge");
208 return 0; 211 return 0;
209} 212}
210#endif /* CONFIG_DMAR */ 213#endif /* CONFIG_DMAR */
diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c
index d003b502a432..44f11ee411c0 100644
--- a/arch/ia64/kernel/smpboot.c
+++ b/arch/ia64/kernel/smpboot.c
@@ -677,7 +677,7 @@ extern void fixup_irqs(void);
677int migrate_platform_irqs(unsigned int cpu) 677int migrate_platform_irqs(unsigned int cpu)
678{ 678{
679 int new_cpei_cpu; 679 int new_cpei_cpu;
680 struct irq_desc *desc = NULL; 680 struct irq_data *data = NULL;
681 const struct cpumask *mask; 681 const struct cpumask *mask;
682 int retval = 0; 682 int retval = 0;
683 683
@@ -693,20 +693,20 @@ int migrate_platform_irqs(unsigned int cpu)
693 new_cpei_cpu = any_online_cpu(cpu_online_map); 693 new_cpei_cpu = any_online_cpu(cpu_online_map);
694 mask = cpumask_of(new_cpei_cpu); 694 mask = cpumask_of(new_cpei_cpu);
695 set_cpei_target_cpu(new_cpei_cpu); 695 set_cpei_target_cpu(new_cpei_cpu);
696 desc = irq_desc + ia64_cpe_irq; 696 data = irq_get_irq_data(ia64_cpe_irq);
697 /* 697 /*
698 * Switch for now, immediately, we need to do fake intr 698 * Switch for now, immediately, we need to do fake intr
699 * as other interrupts, but need to study CPEI behaviour with 699 * as other interrupts, but need to study CPEI behaviour with
700 * polling before making changes. 700 * polling before making changes.
701 */ 701 */
702 if (desc) { 702 if (data && data->chip) {
703 desc->chip->disable(ia64_cpe_irq); 703 data->chip->irq_disable(data);
704 desc->chip->set_affinity(ia64_cpe_irq, mask); 704 data->chip->irq_set_affinity(data, mask, false);
705 desc->chip->enable(ia64_cpe_irq); 705 data->chip->irq_enable(data);
706 printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu); 706 printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu);
707 } 707 }
708 } 708 }
709 if (!desc) { 709 if (!data) {
710 printk ("Unable to retarget CPEI, offline cpu [%d] failed\n", cpu); 710 printk ("Unable to retarget CPEI, offline cpu [%d] failed\n", cpu);
711 retval = -EBUSY; 711 retval = -EBUSY;
712 } 712 }
diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c
index 13c15d968098..7f399f9d99c7 100644
--- a/arch/ia64/sn/kernel/irq.c
+++ b/arch/ia64/sn/kernel/irq.c
@@ -23,11 +23,9 @@
23#include <asm/sn/sn_sal.h> 23#include <asm/sn/sn_sal.h>
24#include <asm/sn/sn_feature_sets.h> 24#include <asm/sn/sn_feature_sets.h>
25 25
26static void force_interrupt(int irq);
27static void register_intr_pda(struct sn_irq_info *sn_irq_info); 26static void register_intr_pda(struct sn_irq_info *sn_irq_info);
28static void unregister_intr_pda(struct sn_irq_info *sn_irq_info); 27static void unregister_intr_pda(struct sn_irq_info *sn_irq_info);
29 28
30int sn_force_interrupt_flag = 1;
31extern int sn_ioif_inited; 29extern int sn_ioif_inited;
32struct list_head **sn_irq_lh; 30struct list_head **sn_irq_lh;
33static DEFINE_SPINLOCK(sn_irq_info_lock); /* non-IRQ lock */ 31static DEFINE_SPINLOCK(sn_irq_info_lock); /* non-IRQ lock */
@@ -78,62 +76,40 @@ u64 sn_intr_redirect(nasid_t local_nasid, int local_widget,
78 return ret_stuff.status; 76 return ret_stuff.status;
79} 77}
80 78
81static unsigned int sn_startup_irq(unsigned int irq) 79static unsigned int sn_startup_irq(struct irq_data *data)
82{ 80{
83 return 0; 81 return 0;
84} 82}
85 83
86static void sn_shutdown_irq(unsigned int irq) 84static void sn_shutdown_irq(struct irq_data *data)
87{ 85{
88} 86}
89 87
90extern void ia64_mca_register_cpev(int); 88extern void ia64_mca_register_cpev(int);
91 89
92static void sn_disable_irq(unsigned int irq) 90static void sn_disable_irq(struct irq_data *data)
93{ 91{
94 if (irq == local_vector_to_irq(IA64_CPE_VECTOR)) 92 if (data->irq == local_vector_to_irq(IA64_CPE_VECTOR))
95 ia64_mca_register_cpev(0); 93 ia64_mca_register_cpev(0);
96} 94}
97 95
98static void sn_enable_irq(unsigned int irq) 96static void sn_enable_irq(struct irq_data *data)
99{ 97{
100 if (irq == local_vector_to_irq(IA64_CPE_VECTOR)) 98 if (data->irq == local_vector_to_irq(IA64_CPE_VECTOR))
101 ia64_mca_register_cpev(irq); 99 ia64_mca_register_cpev(data->irq);
102} 100}
103 101
104static void sn_ack_irq(unsigned int irq) 102static void sn_ack_irq(struct irq_data *data)
105{ 103{
106 u64 event_occurred, mask; 104 u64 event_occurred, mask;
105 unsigned int irq = data->irq & 0xff;
107 106
108 irq = irq & 0xff;
109 event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED)); 107 event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED));
110 mask = event_occurred & SH_ALL_INT_MASK; 108 mask = event_occurred & SH_ALL_INT_MASK;
111 HUB_S((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), mask); 109 HUB_S((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), mask);
112 __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs); 110 __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs);
113 111
114 move_native_irq(irq); 112 irq_move_irq(data);
115}
116
117static void sn_end_irq(unsigned int irq)
118{
119 int ivec;
120 u64 event_occurred;
121
122 ivec = irq & 0xff;
123 if (ivec == SGI_UART_VECTOR) {
124 event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR (SH_EVENT_OCCURRED));
125 /* If the UART bit is set here, we may have received an
126 * interrupt from the UART that the driver missed. To
127 * make sure, we IPI ourselves to force us to look again.
128 */
129 if (event_occurred & SH_EVENT_OCCURRED_UART_INT_MASK) {
130 platform_send_ipi(smp_processor_id(), SGI_UART_VECTOR,
131 IA64_IPI_DM_INT, 0);
132 }
133 }
134 __clear_bit(ivec, (volatile void *)pda->sn_in_service_ivecs);
135 if (sn_force_interrupt_flag)
136 force_interrupt(irq);
137} 113}
138 114
139static void sn_irq_info_free(struct rcu_head *head); 115static void sn_irq_info_free(struct rcu_head *head);
@@ -228,9 +204,11 @@ finish_up:
228 return new_irq_info; 204 return new_irq_info;
229} 205}
230 206
231static int sn_set_affinity_irq(unsigned int irq, const struct cpumask *mask) 207static int sn_set_affinity_irq(struct irq_data *data,
208 const struct cpumask *mask, bool force)
232{ 209{
233 struct sn_irq_info *sn_irq_info, *sn_irq_info_safe; 210 struct sn_irq_info *sn_irq_info, *sn_irq_info_safe;
211 unsigned int irq = data->irq;
234 nasid_t nasid; 212 nasid_t nasid;
235 int slice; 213 int slice;
236 214
@@ -259,26 +237,25 @@ void sn_set_err_irq_affinity(unsigned int irq) { }
259#endif 237#endif
260 238
261static void 239static void
262sn_mask_irq(unsigned int irq) 240sn_mask_irq(struct irq_data *data)
263{ 241{
264} 242}
265 243
266static void 244static void
267sn_unmask_irq(unsigned int irq) 245sn_unmask_irq(struct irq_data *data)
268{ 246{
269} 247}
270 248
271struct irq_chip irq_type_sn = { 249struct irq_chip irq_type_sn = {
272 .name = "SN hub", 250 .name = "SN hub",
273 .startup = sn_startup_irq, 251 .irq_startup = sn_startup_irq,
274 .shutdown = sn_shutdown_irq, 252 .irq_shutdown = sn_shutdown_irq,
275 .enable = sn_enable_irq, 253 .irq_enable = sn_enable_irq,
276 .disable = sn_disable_irq, 254 .irq_disable = sn_disable_irq,
277 .ack = sn_ack_irq, 255 .irq_ack = sn_ack_irq,
278 .end = sn_end_irq, 256 .irq_mask = sn_mask_irq,
279 .mask = sn_mask_irq, 257 .irq_unmask = sn_unmask_irq,
280 .unmask = sn_unmask_irq, 258 .irq_set_affinity = sn_set_affinity_irq
281 .set_affinity = sn_set_affinity_irq
282}; 259};
283 260
284ia64_vector sn_irq_to_vector(int irq) 261ia64_vector sn_irq_to_vector(int irq)
@@ -296,15 +273,13 @@ unsigned int sn_local_vector_to_irq(u8 vector)
296void sn_irq_init(void) 273void sn_irq_init(void)
297{ 274{
298 int i; 275 int i;
299 struct irq_desc *base_desc = irq_desc;
300 276
301 ia64_first_device_vector = IA64_SN2_FIRST_DEVICE_VECTOR; 277 ia64_first_device_vector = IA64_SN2_FIRST_DEVICE_VECTOR;
302 ia64_last_device_vector = IA64_SN2_LAST_DEVICE_VECTOR; 278 ia64_last_device_vector = IA64_SN2_LAST_DEVICE_VECTOR;
303 279
304 for (i = 0; i < NR_IRQS; i++) { 280 for (i = 0; i < NR_IRQS; i++) {
305 if (base_desc[i].chip == &no_irq_chip) { 281 if (irq_get_chip(i) == &no_irq_chip)
306 base_desc[i].chip = &irq_type_sn; 282 irq_set_chip(i, &irq_type_sn);
307 }
308 } 283 }
309} 284}
310 285
@@ -378,7 +353,6 @@ void sn_irq_fixup(struct pci_dev *pci_dev, struct sn_irq_info *sn_irq_info)
378 int cpu = nasid_slice_to_cpuid(nasid, slice); 353 int cpu = nasid_slice_to_cpuid(nasid, slice);
379#ifdef CONFIG_SMP 354#ifdef CONFIG_SMP
380 int cpuphys; 355 int cpuphys;
381 struct irq_desc *desc;
382#endif 356#endif
383 357
384 pci_dev_get(pci_dev); 358 pci_dev_get(pci_dev);
@@ -395,12 +369,11 @@ void sn_irq_fixup(struct pci_dev *pci_dev, struct sn_irq_info *sn_irq_info)
395#ifdef CONFIG_SMP 369#ifdef CONFIG_SMP
396 cpuphys = cpu_physical_id(cpu); 370 cpuphys = cpu_physical_id(cpu);
397 set_irq_affinity_info(sn_irq_info->irq_irq, cpuphys, 0); 371 set_irq_affinity_info(sn_irq_info->irq_irq, cpuphys, 0);
398 desc = irq_to_desc(sn_irq_info->irq_irq);
399 /* 372 /*
400 * Affinity was set by the PROM, prevent it from 373 * Affinity was set by the PROM, prevent it from
401 * being reset by the request_irq() path. 374 * being reset by the request_irq() path.
402 */ 375 */
403 desc->status |= IRQ_AFFINITY_SET; 376 irqd_mark_affinity_was_set(irq_get_irq_data(sn_irq_info->irq_irq));
404#endif 377#endif
405} 378}
406 379
@@ -439,25 +412,11 @@ sn_call_force_intr_provider(struct sn_irq_info *sn_irq_info)
439 pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type]; 412 pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type];
440 413
441 /* Don't force an interrupt if the irq has been disabled */ 414 /* Don't force an interrupt if the irq has been disabled */
442 if (!(irq_desc[sn_irq_info->irq_irq].status & IRQ_DISABLED) && 415 if (!irqd_irq_disabled(sn_irq_info->irq_irq) &&
443 pci_provider && pci_provider->force_interrupt) 416 pci_provider && pci_provider->force_interrupt)
444 (*pci_provider->force_interrupt)(sn_irq_info); 417 (*pci_provider->force_interrupt)(sn_irq_info);
445} 418}
446 419
447static void force_interrupt(int irq)
448{
449 struct sn_irq_info *sn_irq_info;
450
451 if (!sn_ioif_inited)
452 return;
453
454 rcu_read_lock();
455 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[irq], list)
456 sn_call_force_intr_provider(sn_irq_info);
457
458 rcu_read_unlock();
459}
460
461/* 420/*
462 * Check for lost interrupts. If the PIC int_status reg. says that 421 * Check for lost interrupts. If the PIC int_status reg. says that
463 * an interrupt has been sent, but not handled, and the interrupt 422 * an interrupt has been sent, but not handled, and the interrupt
diff --git a/arch/ia64/sn/kernel/msi_sn.c b/arch/ia64/sn/kernel/msi_sn.c
index a5e500f02853..2b98b9e088de 100644
--- a/arch/ia64/sn/kernel/msi_sn.c
+++ b/arch/ia64/sn/kernel/msi_sn.c
@@ -144,16 +144,16 @@ int sn_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *entry)
144 */ 144 */
145 msg.data = 0x100 + irq; 145 msg.data = 0x100 + irq;
146 146
147 set_irq_msi(irq, entry); 147 irq_set_msi_desc(irq, entry);
148 write_msi_msg(irq, &msg); 148 write_msi_msg(irq, &msg);
149 set_irq_chip_and_handler(irq, &sn_msi_chip, handle_edge_irq); 149 irq_set_chip_and_handler(irq, &sn_msi_chip, handle_edge_irq);
150 150
151 return 0; 151 return 0;
152} 152}
153 153
154#ifdef CONFIG_SMP 154#ifdef CONFIG_SMP
155static int sn_set_msi_irq_affinity(unsigned int irq, 155static int sn_set_msi_irq_affinity(struct irq_data *data,
156 const struct cpumask *cpu_mask) 156 const struct cpumask *cpu_mask, bool force)
157{ 157{
158 struct msi_msg msg; 158 struct msi_msg msg;
159 int slice; 159 int slice;
@@ -164,7 +164,7 @@ static int sn_set_msi_irq_affinity(unsigned int irq,
164 struct sn_irq_info *sn_irq_info; 164 struct sn_irq_info *sn_irq_info;
165 struct sn_irq_info *new_irq_info; 165 struct sn_irq_info *new_irq_info;
166 struct sn_pcibus_provider *provider; 166 struct sn_pcibus_provider *provider;
167 unsigned int cpu; 167 unsigned int cpu, irq = data->irq;
168 168
169 cpu = cpumask_first(cpu_mask); 169 cpu = cpumask_first(cpu_mask);
170 sn_irq_info = sn_msi_info[irq].sn_irq_info; 170 sn_irq_info = sn_msi_info[irq].sn_irq_info;
@@ -206,33 +206,33 @@ static int sn_set_msi_irq_affinity(unsigned int irq,
206 msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff); 206 msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff);
207 207
208 write_msi_msg(irq, &msg); 208 write_msi_msg(irq, &msg);
209 cpumask_copy(irq_desc[irq].affinity, cpu_mask); 209 cpumask_copy(data->affinity, cpu_mask);
210 210
211 return 0; 211 return 0;
212} 212}
213#endif /* CONFIG_SMP */ 213#endif /* CONFIG_SMP */
214 214
215static void sn_ack_msi_irq(unsigned int irq) 215static void sn_ack_msi_irq(struct irq_data *data)
216{ 216{
217 move_native_irq(irq); 217 irq_move_irq(data);
218 ia64_eoi(); 218 ia64_eoi();
219} 219}
220 220
221static int sn_msi_retrigger_irq(unsigned int irq) 221static int sn_msi_retrigger_irq(struct irq_data *data)
222{ 222{
223 unsigned int vector = irq; 223 unsigned int vector = data->irq;
224 ia64_resend_irq(vector); 224 ia64_resend_irq(vector);
225 225
226 return 1; 226 return 1;
227} 227}
228 228
229static struct irq_chip sn_msi_chip = { 229static struct irq_chip sn_msi_chip = {
230 .name = "PCI-MSI", 230 .name = "PCI-MSI",
231 .irq_mask = mask_msi_irq, 231 .irq_mask = mask_msi_irq,
232 .irq_unmask = unmask_msi_irq, 232 .irq_unmask = unmask_msi_irq,
233 .ack = sn_ack_msi_irq, 233 .irq_ack = sn_ack_msi_irq,
234#ifdef CONFIG_SMP 234#ifdef CONFIG_SMP
235 .set_affinity = sn_set_msi_irq_affinity, 235 .irq_set_affinity = sn_set_msi_irq_affinity,
236#endif 236#endif
237 .retrigger = sn_msi_retrigger_irq, 237 .irq_retrigger = sn_msi_retrigger_irq,
238}; 238};
diff --git a/arch/ia64/xen/irq_xen.c b/arch/ia64/xen/irq_xen.c
index a3fb7cf9ae1d..108bb858acf2 100644
--- a/arch/ia64/xen/irq_xen.c
+++ b/arch/ia64/xen/irq_xen.c
@@ -138,7 +138,6 @@ static void
138__xen_register_percpu_irq(unsigned int cpu, unsigned int vec, 138__xen_register_percpu_irq(unsigned int cpu, unsigned int vec,
139 struct irqaction *action, int save) 139 struct irqaction *action, int save)
140{ 140{
141 struct irq_desc *desc;
142 int irq = 0; 141 int irq = 0;
143 142
144 if (xen_slab_ready) { 143 if (xen_slab_ready) {
@@ -223,8 +222,7 @@ __xen_register_percpu_irq(unsigned int cpu, unsigned int vec,
223 * mark the interrupt for migrations and trigger it 222 * mark the interrupt for migrations and trigger it
224 * on cpu hotplug. 223 * on cpu hotplug.
225 */ 224 */
226 desc = irq_desc + irq; 225 irq_set_status_flags(irq, IRQ_PER_CPU);
227 desc->status |= IRQ_PER_CPU;
228 } 226 }
229 } 227 }
230 228