1 files changed, 1 insertions, 1 deletions
diff --git a/arch/ia64/sn/pci/tioce_provider.c b/arch/ia64/sn/pci/tioce_provider.c
index cee9379d44e0..e1a3e19d3d9c 100644
--- a/arch/ia64/sn/pci/tioce_provider.c
+++ b/arch/ia64/sn/pci/tioce_provider.c
@@ -41,7 +41,7 @@
 *      } else
 *              do desired mmr access
 *
- * According to hw, we can use reads instead of writes to the above addres
+ * According to hw, we can use reads instead of writes to the above address
 *
 * Note this WAR can only to be used for accessing internal MMR's in the
 * TIOCE Coretalk Address Range 0x0 - 0x07ff_ffff.  This includes the

diff --git a/arch/ia64/sn/pci/tioce_provider.c b/arch/ia64/sn/pci/tioce_provider.c index cee9379d44e0..e1a3e19d3d9c 100644 --- a/arch/ia64/sn/pci/tioce_provider.c +++ b/arch/ia64/sn/pci/tioce_provider.c
@@ -41,7 +41,7 @@
41	* } else	41	* } else
42	* do desired mmr access	42	* do desired mmr access
43	*	43	*
44	* According to hw, we can use reads instead of writes to the above addres	44	* According to hw, we can use reads instead of writes to the above address
45	*	45	*
46	* Note this WAR can only to be used for accessing internal MMR's in the	46	* Note this WAR can only to be used for accessing internal MMR's in the
47	* TIOCE Coretalk Address Range 0x0 - 0x07ff_ffff. This includes the	47	* TIOCE Coretalk Address Range 0x0 - 0x07ff_ffff. This includes the