diff options
Diffstat (limited to 'arch/ia64/sn/pci/tioce_provider.c')
-rw-r--r-- | arch/ia64/sn/pci/tioce_provider.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/ia64/sn/pci/tioce_provider.c b/arch/ia64/sn/pci/tioce_provider.c index e1a3e19d3d9c..999f14f986e2 100644 --- a/arch/ia64/sn/pci/tioce_provider.c +++ b/arch/ia64/sn/pci/tioce_provider.c | |||
@@ -752,13 +752,13 @@ tioce_kern_init(struct tioce_common *tioce_common) | |||
752 | * Determine the secondary bus number of the port2 logical PPB. | 752 | * Determine the secondary bus number of the port2 logical PPB. |
753 | * This is used to decide whether a given pci device resides on | 753 | * This is used to decide whether a given pci device resides on |
754 | * port1 or port2. Note: We don't have enough plumbing set up | 754 | * port1 or port2. Note: We don't have enough plumbing set up |
755 | * here to use pci_read_config_xxx() so use the raw_pci_ops vector. | 755 | * here to use pci_read_config_xxx() so use raw_pci_read(). |
756 | */ | 756 | */ |
757 | 757 | ||
758 | seg = tioce_common->ce_pcibus.bs_persist_segment; | 758 | seg = tioce_common->ce_pcibus.bs_persist_segment; |
759 | bus = tioce_common->ce_pcibus.bs_persist_busnum; | 759 | bus = tioce_common->ce_pcibus.bs_persist_busnum; |
760 | 760 | ||
761 | raw_pci_ops->read(seg, bus, PCI_DEVFN(2, 0), PCI_SECONDARY_BUS, 1,&tmp); | 761 | raw_pci_read(seg, bus, PCI_DEVFN(2, 0), PCI_SECONDARY_BUS, 1,&tmp); |
762 | tioce_kern->ce_port1_secondary = (u8) tmp; | 762 | tioce_kern->ce_port1_secondary = (u8) tmp; |
763 | 763 | ||
764 | /* | 764 | /* |
@@ -799,11 +799,11 @@ tioce_kern_init(struct tioce_common *tioce_common) | |||
799 | 799 | ||
800 | /* mem base/limit */ | 800 | /* mem base/limit */ |
801 | 801 | ||
802 | raw_pci_ops->read(seg, bus, PCI_DEVFN(dev, 0), | 802 | raw_pci_read(seg, bus, PCI_DEVFN(dev, 0), |
803 | PCI_MEMORY_BASE, 2, &tmp); | 803 | PCI_MEMORY_BASE, 2, &tmp); |
804 | base = (u64)tmp << 16; | 804 | base = (u64)tmp << 16; |
805 | 805 | ||
806 | raw_pci_ops->read(seg, bus, PCI_DEVFN(dev, 0), | 806 | raw_pci_read(seg, bus, PCI_DEVFN(dev, 0), |
807 | PCI_MEMORY_LIMIT, 2, &tmp); | 807 | PCI_MEMORY_LIMIT, 2, &tmp); |
808 | limit = (u64)tmp << 16; | 808 | limit = (u64)tmp << 16; |
809 | limit |= 0xfffffUL; | 809 | limit |= 0xfffffUL; |
@@ -817,21 +817,21 @@ tioce_kern_init(struct tioce_common *tioce_common) | |||
817 | * attributes. | 817 | * attributes. |
818 | */ | 818 | */ |
819 | 819 | ||
820 | raw_pci_ops->read(seg, bus, PCI_DEVFN(dev, 0), | 820 | raw_pci_read(seg, bus, PCI_DEVFN(dev, 0), |
821 | PCI_PREF_MEMORY_BASE, 2, &tmp); | 821 | PCI_PREF_MEMORY_BASE, 2, &tmp); |
822 | base = ((u64)tmp & PCI_PREF_RANGE_MASK) << 16; | 822 | base = ((u64)tmp & PCI_PREF_RANGE_MASK) << 16; |
823 | 823 | ||
824 | raw_pci_ops->read(seg, bus, PCI_DEVFN(dev, 0), | 824 | raw_pci_read(seg, bus, PCI_DEVFN(dev, 0), |
825 | PCI_PREF_BASE_UPPER32, 4, &tmp); | 825 | PCI_PREF_BASE_UPPER32, 4, &tmp); |
826 | base |= (u64)tmp << 32; | 826 | base |= (u64)tmp << 32; |
827 | 827 | ||
828 | raw_pci_ops->read(seg, bus, PCI_DEVFN(dev, 0), | 828 | raw_pci_read(seg, bus, PCI_DEVFN(dev, 0), |
829 | PCI_PREF_MEMORY_LIMIT, 2, &tmp); | 829 | PCI_PREF_MEMORY_LIMIT, 2, &tmp); |
830 | 830 | ||
831 | limit = ((u64)tmp & PCI_PREF_RANGE_MASK) << 16; | 831 | limit = ((u64)tmp & PCI_PREF_RANGE_MASK) << 16; |
832 | limit |= 0xfffffUL; | 832 | limit |= 0xfffffUL; |
833 | 833 | ||
834 | raw_pci_ops->read(seg, bus, PCI_DEVFN(dev, 0), | 834 | raw_pci_read(seg, bus, PCI_DEVFN(dev, 0), |
835 | PCI_PREF_LIMIT_UPPER32, 4, &tmp); | 835 | PCI_PREF_LIMIT_UPPER32, 4, &tmp); |
836 | limit |= (u64)tmp << 32; | 836 | limit |= (u64)tmp << 32; |
837 | 837 | ||