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-rw-r--r--arch/ia64/mm/init.c15
1 files changed, 12 insertions, 3 deletions
diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c
index 65f9958db9f0..1281c609ee98 100644
--- a/arch/ia64/mm/init.c
+++ b/arch/ia64/mm/init.c
@@ -382,13 +382,22 @@ ia64_mmu_init (void *my_cpu_data)
382 382
383 if (impl_va_bits < 51 || impl_va_bits > 61) 383 if (impl_va_bits < 51 || impl_va_bits > 61)
384 panic("CPU has bogus IMPL_VA_MSB value of %lu!\n", impl_va_bits - 1); 384 panic("CPU has bogus IMPL_VA_MSB value of %lu!\n", impl_va_bits - 1);
385 /*
386 * mapped_space_bits - PAGE_SHIFT is the total number of ptes we need,
387 * which must fit into "vmlpt_bits - pte_bits" slots. Second half of
388 * the test makes sure that our mapped space doesn't overlap the
389 * unimplemented hole in the middle of the region.
390 */
391 if ((mapped_space_bits - PAGE_SHIFT > vmlpt_bits - pte_bits) ||
392 (mapped_space_bits > impl_va_bits - 1))
393 panic("Cannot build a big enough virtual-linear page table"
394 " to cover mapped address space.\n"
395 " Try using a smaller page size.\n");
396
385 397
386 /* place the VMLPT at the end of each page-table mapped region: */ 398 /* place the VMLPT at the end of each page-table mapped region: */
387 pta = POW2(61) - POW2(vmlpt_bits); 399 pta = POW2(61) - POW2(vmlpt_bits);
388 400
389 if (POW2(mapped_space_bits) >= pta)
390 panic("mm/init: overlap between virtually mapped linear page table and "
391 "mapped kernel space!");
392 /* 401 /*
393 * Set the (virtually mapped linear) page table address. Bit 402 * Set the (virtually mapped linear) page table address. Bit
394 * 8 selects between the short and long format, bits 2-7 the 403 * 8 selects between the short and long format, bits 2-7 the