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-rw-r--r--arch/ia64/kernel/efi.c2
-rw-r--r--arch/ia64/kernel/setup.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/ia64/kernel/efi.c b/arch/ia64/kernel/efi.c
index 003cd09b0732..d45f215bc8fc 100644
--- a/arch/ia64/kernel/efi.c
+++ b/arch/ia64/kernel/efi.c
@@ -436,7 +436,7 @@ static void __init handle_palo(unsigned long palo_phys)
436 return; 436 return;
437 } 437 }
438 438
439 setup_ptcg_sem(palo->max_tlb_purges, 1); 439 setup_ptcg_sem(palo->max_tlb_purges, NPTCG_FROM_PALO);
440} 440}
441 441
442void 442void
diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
index 1cbd26340d87..f798c0769d36 100644
--- a/arch/ia64/kernel/setup.c
+++ b/arch/ia64/kernel/setup.c
@@ -949,7 +949,7 @@ cpu_init (void)
949 /* set ia64_ctx.max_rid to the maximum RID that is supported by all CPUs: */ 949 /* set ia64_ctx.max_rid to the maximum RID that is supported by all CPUs: */
950 if (ia64_pal_vm_summary(NULL, &vmi) == 0) { 950 if (ia64_pal_vm_summary(NULL, &vmi) == 0) {
951 max_ctx = (1U << (vmi.pal_vm_info_2_s.rid_size - 3)) - 1; 951 max_ctx = (1U << (vmi.pal_vm_info_2_s.rid_size - 3)) - 1;
952 setup_ptcg_sem(vmi.pal_vm_info_2_s.max_purges, 0); 952 setup_ptcg_sem(vmi.pal_vm_info_2_s.max_purges, NPTCG_FROM_PAL);
953 } else { 953 } else {
954 printk(KERN_WARNING "cpu_init: PAL VM summary failed, assuming 18 RID bits\n"); 954 printk(KERN_WARNING "cpu_init: PAL VM summary failed, assuming 18 RID bits\n");
955 max_ctx = (1U << 15) - 1; /* use architected minimum */ 955 max_ctx = (1U << 15) - 1; /* use architected minimum */