aboutsummaryrefslogtreecommitdiffstats
path: root/arch/ia64/kernel/unaligned.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/ia64/kernel/unaligned.c')
-rw-r--r--arch/ia64/kernel/unaligned.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/ia64/kernel/unaligned.c b/arch/ia64/kernel/unaligned.c
index 52f70bbc192a..6903361d11a5 100644
--- a/arch/ia64/kernel/unaligned.c
+++ b/arch/ia64/kernel/unaligned.c
@@ -28,7 +28,7 @@ extern int die_if_kernel(char *str, struct pt_regs *regs, long err);
28#undef DEBUG_UNALIGNED_TRAP 28#undef DEBUG_UNALIGNED_TRAP
29 29
30#ifdef DEBUG_UNALIGNED_TRAP 30#ifdef DEBUG_UNALIGNED_TRAP
31# define DPRINT(a...) do { printk("%s %u: ", __FUNCTION__, __LINE__); printk (a); } while (0) 31# define DPRINT(a...) do { printk("%s %u: ", __func__, __LINE__); printk (a); } while (0)
32# define DDUMP(str,vp,len) dump(str, vp, len) 32# define DDUMP(str,vp,len) dump(str, vp, len)
33 33
34static void 34static void
@@ -674,7 +674,7 @@ emulate_load_updates (update_t type, load_store_t ld, struct pt_regs *regs, unsi
674 * just in case. 674 * just in case.
675 */ 675 */
676 if (ld.x6_op == 1 || ld.x6_op == 3) { 676 if (ld.x6_op == 1 || ld.x6_op == 3) {
677 printk(KERN_ERR "%s: register update on speculative load, error\n", __FUNCTION__); 677 printk(KERN_ERR "%s: register update on speculative load, error\n", __func__);
678 if (die_if_kernel("unaligned reference on speculative load with register update\n", 678 if (die_if_kernel("unaligned reference on speculative load with register update\n",
679 regs, 30)) 679 regs, 30))
680 return; 680 return;
@@ -1104,7 +1104,7 @@ emulate_load_floatpair (unsigned long ifa, load_store_t ld, struct pt_regs *regs
1104 */ 1104 */
1105 if (ld.x6_op == 1 || ld.x6_op == 3) 1105 if (ld.x6_op == 1 || ld.x6_op == 3)
1106 printk(KERN_ERR "%s: register update on speculative load pair, error\n", 1106 printk(KERN_ERR "%s: register update on speculative load pair, error\n",
1107 __FUNCTION__); 1107 __func__);
1108 1108
1109 setreg(ld.r3, ifa, 0, regs); 1109 setreg(ld.r3, ifa, 0, regs);
1110 } 1110 }