diff options
Diffstat (limited to 'arch/ia64/kernel/iosapic.c')
-rw-r--r-- | arch/ia64/kernel/iosapic.c | 119 |
1 files changed, 55 insertions, 64 deletions
diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c index 22c38404f539..b0f9afebb146 100644 --- a/arch/ia64/kernel/iosapic.c +++ b/arch/ia64/kernel/iosapic.c | |||
@@ -257,7 +257,7 @@ set_rte (unsigned int gsi, unsigned int irq, unsigned int dest, int mask) | |||
257 | } | 257 | } |
258 | 258 | ||
259 | static void | 259 | static void |
260 | nop (unsigned int irq) | 260 | nop (struct irq_data *data) |
261 | { | 261 | { |
262 | /* do nothing... */ | 262 | /* do nothing... */ |
263 | } | 263 | } |
@@ -287,8 +287,9 @@ kexec_disable_iosapic(void) | |||
287 | #endif | 287 | #endif |
288 | 288 | ||
289 | static void | 289 | static void |
290 | mask_irq (unsigned int irq) | 290 | mask_irq (struct irq_data *data) |
291 | { | 291 | { |
292 | unsigned int irq = data->irq; | ||
292 | u32 low32; | 293 | u32 low32; |
293 | int rte_index; | 294 | int rte_index; |
294 | struct iosapic_rte_info *rte; | 295 | struct iosapic_rte_info *rte; |
@@ -305,8 +306,9 @@ mask_irq (unsigned int irq) | |||
305 | } | 306 | } |
306 | 307 | ||
307 | static void | 308 | static void |
308 | unmask_irq (unsigned int irq) | 309 | unmask_irq (struct irq_data *data) |
309 | { | 310 | { |
311 | unsigned int irq = data->irq; | ||
310 | u32 low32; | 312 | u32 low32; |
311 | int rte_index; | 313 | int rte_index; |
312 | struct iosapic_rte_info *rte; | 314 | struct iosapic_rte_info *rte; |
@@ -323,9 +325,11 @@ unmask_irq (unsigned int irq) | |||
323 | 325 | ||
324 | 326 | ||
325 | static int | 327 | static int |
326 | iosapic_set_affinity(unsigned int irq, const struct cpumask *mask) | 328 | iosapic_set_affinity(struct irq_data *data, const struct cpumask *mask, |
329 | bool force) | ||
327 | { | 330 | { |
328 | #ifdef CONFIG_SMP | 331 | #ifdef CONFIG_SMP |
332 | unsigned int irq = data->irq; | ||
329 | u32 high32, low32; | 333 | u32 high32, low32; |
330 | int cpu, dest, rte_index; | 334 | int cpu, dest, rte_index; |
331 | int redir = (irq & IA64_IRQ_REDIRECTED) ? 1 : 0; | 335 | int redir = (irq & IA64_IRQ_REDIRECTED) ? 1 : 0; |
@@ -379,32 +383,33 @@ iosapic_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
379 | */ | 383 | */ |
380 | 384 | ||
381 | static unsigned int | 385 | static unsigned int |
382 | iosapic_startup_level_irq (unsigned int irq) | 386 | iosapic_startup_level_irq (struct irq_data *data) |
383 | { | 387 | { |
384 | unmask_irq(irq); | 388 | unmask_irq(data); |
385 | return 0; | 389 | return 0; |
386 | } | 390 | } |
387 | 391 | ||
388 | static void | 392 | static void |
389 | iosapic_unmask_level_irq (unsigned int irq) | 393 | iosapic_unmask_level_irq (struct irq_data *data) |
390 | { | 394 | { |
395 | unsigned int irq = data->irq; | ||
391 | ia64_vector vec = irq_to_vector(irq); | 396 | ia64_vector vec = irq_to_vector(irq); |
392 | struct iosapic_rte_info *rte; | 397 | struct iosapic_rte_info *rte; |
393 | int do_unmask_irq = 0; | 398 | int do_unmask_irq = 0; |
394 | 399 | ||
395 | irq_complete_move(irq); | 400 | irq_complete_move(irq); |
396 | if (unlikely(irq_desc[irq].status & IRQ_MOVE_PENDING)) { | 401 | if (unlikely(irqd_is_setaffinity_pending(data))) { |
397 | do_unmask_irq = 1; | 402 | do_unmask_irq = 1; |
398 | mask_irq(irq); | 403 | mask_irq(data); |
399 | } else | 404 | } else |
400 | unmask_irq(irq); | 405 | unmask_irq(data); |
401 | 406 | ||
402 | list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) | 407 | list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) |
403 | iosapic_eoi(rte->iosapic->addr, vec); | 408 | iosapic_eoi(rte->iosapic->addr, vec); |
404 | 409 | ||
405 | if (unlikely(do_unmask_irq)) { | 410 | if (unlikely(do_unmask_irq)) { |
406 | move_masked_irq(irq); | 411 | irq_move_masked_irq(data); |
407 | unmask_irq(irq); | 412 | unmask_irq(data); |
408 | } | 413 | } |
409 | } | 414 | } |
410 | 415 | ||
@@ -414,15 +419,15 @@ iosapic_unmask_level_irq (unsigned int irq) | |||
414 | #define iosapic_ack_level_irq nop | 419 | #define iosapic_ack_level_irq nop |
415 | 420 | ||
416 | static struct irq_chip irq_type_iosapic_level = { | 421 | static struct irq_chip irq_type_iosapic_level = { |
417 | .name = "IO-SAPIC-level", | 422 | .name = "IO-SAPIC-level", |
418 | .startup = iosapic_startup_level_irq, | 423 | .irq_startup = iosapic_startup_level_irq, |
419 | .shutdown = iosapic_shutdown_level_irq, | 424 | .irq_shutdown = iosapic_shutdown_level_irq, |
420 | .enable = iosapic_enable_level_irq, | 425 | .irq_enable = iosapic_enable_level_irq, |
421 | .disable = iosapic_disable_level_irq, | 426 | .irq_disable = iosapic_disable_level_irq, |
422 | .ack = iosapic_ack_level_irq, | 427 | .irq_ack = iosapic_ack_level_irq, |
423 | .mask = mask_irq, | 428 | .irq_mask = mask_irq, |
424 | .unmask = iosapic_unmask_level_irq, | 429 | .irq_unmask = iosapic_unmask_level_irq, |
425 | .set_affinity = iosapic_set_affinity | 430 | .irq_set_affinity = iosapic_set_affinity |
426 | }; | 431 | }; |
427 | 432 | ||
428 | /* | 433 | /* |
@@ -430,9 +435,9 @@ static struct irq_chip irq_type_iosapic_level = { | |||
430 | */ | 435 | */ |
431 | 436 | ||
432 | static unsigned int | 437 | static unsigned int |
433 | iosapic_startup_edge_irq (unsigned int irq) | 438 | iosapic_startup_edge_irq (struct irq_data *data) |
434 | { | 439 | { |
435 | unmask_irq(irq); | 440 | unmask_irq(data); |
436 | /* | 441 | /* |
437 | * IOSAPIC simply drops interrupts pended while the | 442 | * IOSAPIC simply drops interrupts pended while the |
438 | * corresponding pin was masked, so we can't know if an | 443 | * corresponding pin was masked, so we can't know if an |
@@ -442,37 +447,25 @@ iosapic_startup_edge_irq (unsigned int irq) | |||
442 | } | 447 | } |
443 | 448 | ||
444 | static void | 449 | static void |
445 | iosapic_ack_edge_irq (unsigned int irq) | 450 | iosapic_ack_edge_irq (struct irq_data *data) |
446 | { | 451 | { |
447 | struct irq_desc *idesc = irq_desc + irq; | 452 | irq_complete_move(data->irq); |
448 | 453 | irq_move_irq(data); | |
449 | irq_complete_move(irq); | ||
450 | move_native_irq(irq); | ||
451 | /* | ||
452 | * Once we have recorded IRQ_PENDING already, we can mask the | ||
453 | * interrupt for real. This prevents IRQ storms from unhandled | ||
454 | * devices. | ||
455 | */ | ||
456 | if ((idesc->status & (IRQ_PENDING|IRQ_DISABLED)) == | ||
457 | (IRQ_PENDING|IRQ_DISABLED)) | ||
458 | mask_irq(irq); | ||
459 | } | 454 | } |
460 | 455 | ||
461 | #define iosapic_enable_edge_irq unmask_irq | 456 | #define iosapic_enable_edge_irq unmask_irq |
462 | #define iosapic_disable_edge_irq nop | 457 | #define iosapic_disable_edge_irq nop |
463 | #define iosapic_end_edge_irq nop | ||
464 | 458 | ||
465 | static struct irq_chip irq_type_iosapic_edge = { | 459 | static struct irq_chip irq_type_iosapic_edge = { |
466 | .name = "IO-SAPIC-edge", | 460 | .name = "IO-SAPIC-edge", |
467 | .startup = iosapic_startup_edge_irq, | 461 | .irq_startup = iosapic_startup_edge_irq, |
468 | .shutdown = iosapic_disable_edge_irq, | 462 | .irq_shutdown = iosapic_disable_edge_irq, |
469 | .enable = iosapic_enable_edge_irq, | 463 | .irq_enable = iosapic_enable_edge_irq, |
470 | .disable = iosapic_disable_edge_irq, | 464 | .irq_disable = iosapic_disable_edge_irq, |
471 | .ack = iosapic_ack_edge_irq, | 465 | .irq_ack = iosapic_ack_edge_irq, |
472 | .end = iosapic_end_edge_irq, | 466 | .irq_mask = mask_irq, |
473 | .mask = mask_irq, | 467 | .irq_unmask = unmask_irq, |
474 | .unmask = unmask_irq, | 468 | .irq_set_affinity = iosapic_set_affinity |
475 | .set_affinity = iosapic_set_affinity | ||
476 | }; | 469 | }; |
477 | 470 | ||
478 | static unsigned int | 471 | static unsigned int |
@@ -562,8 +555,7 @@ static int | |||
562 | register_intr (unsigned int gsi, int irq, unsigned char delivery, | 555 | register_intr (unsigned int gsi, int irq, unsigned char delivery, |
563 | unsigned long polarity, unsigned long trigger) | 556 | unsigned long polarity, unsigned long trigger) |
564 | { | 557 | { |
565 | struct irq_desc *idesc; | 558 | struct irq_chip *chip, *irq_type; |
566 | struct irq_chip *irq_type; | ||
567 | int index; | 559 | int index; |
568 | struct iosapic_rte_info *rte; | 560 | struct iosapic_rte_info *rte; |
569 | 561 | ||
@@ -610,19 +602,18 @@ register_intr (unsigned int gsi, int irq, unsigned char delivery, | |||
610 | 602 | ||
611 | irq_type = iosapic_get_irq_chip(trigger); | 603 | irq_type = iosapic_get_irq_chip(trigger); |
612 | 604 | ||
613 | idesc = irq_desc + irq; | 605 | chip = irq_get_chip(irq); |
614 | if (irq_type != NULL && idesc->chip != irq_type) { | 606 | if (irq_type != NULL && chip != irq_type) { |
615 | if (idesc->chip != &no_irq_chip) | 607 | if (chip != &no_irq_chip) |
616 | printk(KERN_WARNING | 608 | printk(KERN_WARNING |
617 | "%s: changing vector %d from %s to %s\n", | 609 | "%s: changing vector %d from %s to %s\n", |
618 | __func__, irq_to_vector(irq), | 610 | __func__, irq_to_vector(irq), |
619 | idesc->chip->name, irq_type->name); | 611 | chip->name, irq_type->name); |
620 | idesc->chip = irq_type; | 612 | chip = irq_type; |
621 | } | 613 | } |
622 | if (trigger == IOSAPIC_EDGE) | 614 | __irq_set_chip_handler_name_locked(irq, chip, trigger == IOSAPIC_EDGE ? |
623 | __set_irq_handler_unlocked(irq, handle_edge_irq); | 615 | handle_edge_irq : handle_level_irq, |
624 | else | 616 | NULL); |
625 | __set_irq_handler_unlocked(irq, handle_level_irq); | ||
626 | return 0; | 617 | return 0; |
627 | } | 618 | } |
628 | 619 | ||
@@ -732,6 +723,7 @@ iosapic_register_intr (unsigned int gsi, | |||
732 | struct iosapic_rte_info *rte; | 723 | struct iosapic_rte_info *rte; |
733 | u32 low32; | 724 | u32 low32; |
734 | unsigned char dmode; | 725 | unsigned char dmode; |
726 | struct irq_desc *desc; | ||
735 | 727 | ||
736 | /* | 728 | /* |
737 | * If this GSI has already been registered (i.e., it's a | 729 | * If this GSI has already been registered (i.e., it's a |
@@ -759,12 +751,13 @@ iosapic_register_intr (unsigned int gsi, | |||
759 | goto unlock_iosapic_lock; | 751 | goto unlock_iosapic_lock; |
760 | } | 752 | } |
761 | 753 | ||
762 | raw_spin_lock(&irq_desc[irq].lock); | 754 | desc = irq_to_desc(irq); |
755 | raw_spin_lock(&desc->lock); | ||
763 | dest = get_target_cpu(gsi, irq); | 756 | dest = get_target_cpu(gsi, irq); |
764 | dmode = choose_dmode(); | 757 | dmode = choose_dmode(); |
765 | err = register_intr(gsi, irq, dmode, polarity, trigger); | 758 | err = register_intr(gsi, irq, dmode, polarity, trigger); |
766 | if (err < 0) { | 759 | if (err < 0) { |
767 | raw_spin_unlock(&irq_desc[irq].lock); | 760 | raw_spin_unlock(&desc->lock); |
768 | irq = err; | 761 | irq = err; |
769 | goto unlock_iosapic_lock; | 762 | goto unlock_iosapic_lock; |
770 | } | 763 | } |
@@ -783,7 +776,7 @@ iosapic_register_intr (unsigned int gsi, | |||
783 | (polarity == IOSAPIC_POL_HIGH ? "high" : "low"), | 776 | (polarity == IOSAPIC_POL_HIGH ? "high" : "low"), |
784 | cpu_logical_id(dest), dest, irq_to_vector(irq)); | 777 | cpu_logical_id(dest), dest, irq_to_vector(irq)); |
785 | 778 | ||
786 | raw_spin_unlock(&irq_desc[irq].lock); | 779 | raw_spin_unlock(&desc->lock); |
787 | unlock_iosapic_lock: | 780 | unlock_iosapic_lock: |
788 | spin_unlock_irqrestore(&iosapic_lock, flags); | 781 | spin_unlock_irqrestore(&iosapic_lock, flags); |
789 | return irq; | 782 | return irq; |
@@ -794,7 +787,6 @@ iosapic_unregister_intr (unsigned int gsi) | |||
794 | { | 787 | { |
795 | unsigned long flags; | 788 | unsigned long flags; |
796 | int irq, index; | 789 | int irq, index; |
797 | struct irq_desc *idesc; | ||
798 | u32 low32; | 790 | u32 low32; |
799 | unsigned long trigger, polarity; | 791 | unsigned long trigger, polarity; |
800 | unsigned int dest; | 792 | unsigned int dest; |
@@ -824,7 +816,6 @@ iosapic_unregister_intr (unsigned int gsi) | |||
824 | if (--rte->refcnt > 0) | 816 | if (--rte->refcnt > 0) |
825 | goto out; | 817 | goto out; |
826 | 818 | ||
827 | idesc = irq_desc + irq; | ||
828 | rte->refcnt = NO_REF_RTE; | 819 | rte->refcnt = NO_REF_RTE; |
829 | 820 | ||
830 | /* Mask the interrupt */ | 821 | /* Mask the interrupt */ |
@@ -848,7 +839,7 @@ iosapic_unregister_intr (unsigned int gsi) | |||
848 | if (iosapic_intr_info[irq].count == 0) { | 839 | if (iosapic_intr_info[irq].count == 0) { |
849 | #ifdef CONFIG_SMP | 840 | #ifdef CONFIG_SMP |
850 | /* Clear affinity */ | 841 | /* Clear affinity */ |
851 | cpumask_setall(idesc->affinity); | 842 | cpumask_setall(irq_get_irq_data(irq)->affinity); |
852 | #endif | 843 | #endif |
853 | /* Clear the interrupt information */ | 844 | /* Clear the interrupt information */ |
854 | iosapic_intr_info[irq].dest = 0; | 845 | iosapic_intr_info[irq].dest = 0; |