diff options
Diffstat (limited to 'arch/ia64/include/asm/xen')
| -rw-r--r-- | arch/ia64/include/asm/xen/events.h | 41 | ||||
| -rw-r--r-- | arch/ia64/include/asm/xen/hypercall.h | 265 | ||||
| -rw-r--r-- | arch/ia64/include/asm/xen/hypervisor.h | 61 | ||||
| -rw-r--r-- | arch/ia64/include/asm/xen/inst.h | 486 | ||||
| -rw-r--r-- | arch/ia64/include/asm/xen/interface.h | 363 | ||||
| -rw-r--r-- | arch/ia64/include/asm/xen/irq.h | 44 | ||||
| -rw-r--r-- | arch/ia64/include/asm/xen/minstate.h | 143 | ||||
| -rw-r--r-- | arch/ia64/include/asm/xen/page-coherent.h | 38 | ||||
| -rw-r--r-- | arch/ia64/include/asm/xen/page.h | 65 | ||||
| -rw-r--r-- | arch/ia64/include/asm/xen/patchlist.h | 38 | ||||
| -rw-r--r-- | arch/ia64/include/asm/xen/privop.h | 135 | ||||
| -rw-r--r-- | arch/ia64/include/asm/xen/xcom_hcall.h | 51 | ||||
| -rw-r--r-- | arch/ia64/include/asm/xen/xencomm.h | 42 |
13 files changed, 0 insertions, 1772 deletions
diff --git a/arch/ia64/include/asm/xen/events.h b/arch/ia64/include/asm/xen/events.h deleted file mode 100644 index baa74c82aa71..000000000000 --- a/arch/ia64/include/asm/xen/events.h +++ /dev/null | |||
| @@ -1,41 +0,0 @@ | |||
| 1 | /****************************************************************************** | ||
| 2 | * arch/ia64/include/asm/xen/events.h | ||
| 3 | * | ||
| 4 | * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp> | ||
| 5 | * VA Linux Systems Japan K.K. | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | * | ||
| 12 | * This program is distributed in the hope that it will be useful, | ||
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 15 | * GNU General Public License for more details. | ||
| 16 | * | ||
| 17 | * You should have received a copy of the GNU General Public License | ||
| 18 | * along with this program; if not, write to the Free Software | ||
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 20 | * | ||
| 21 | */ | ||
| 22 | #ifndef _ASM_IA64_XEN_EVENTS_H | ||
| 23 | #define _ASM_IA64_XEN_EVENTS_H | ||
| 24 | |||
| 25 | enum ipi_vector { | ||
| 26 | XEN_RESCHEDULE_VECTOR, | ||
| 27 | XEN_IPI_VECTOR, | ||
| 28 | XEN_CMCP_VECTOR, | ||
| 29 | XEN_CPEP_VECTOR, | ||
| 30 | |||
| 31 | XEN_NR_IPIS, | ||
| 32 | }; | ||
| 33 | |||
| 34 | static inline int xen_irqs_disabled(struct pt_regs *regs) | ||
| 35 | { | ||
| 36 | return !(ia64_psr(regs)->i); | ||
| 37 | } | ||
| 38 | |||
| 39 | #define irq_ctx_init(cpu) do { } while (0) | ||
| 40 | |||
| 41 | #endif /* _ASM_IA64_XEN_EVENTS_H */ | ||
diff --git a/arch/ia64/include/asm/xen/hypercall.h b/arch/ia64/include/asm/xen/hypercall.h deleted file mode 100644 index ed28bcd5bb85..000000000000 --- a/arch/ia64/include/asm/xen/hypercall.h +++ /dev/null | |||
| @@ -1,265 +0,0 @@ | |||
| 1 | /****************************************************************************** | ||
| 2 | * hypercall.h | ||
| 3 | * | ||
| 4 | * Linux-specific hypervisor handling. | ||
| 5 | * | ||
| 6 | * Copyright (c) 2002-2004, K A Fraser | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or | ||
| 9 | * modify it under the terms of the GNU General Public License version 2 | ||
| 10 | * as published by the Free Software Foundation; or, when distributed | ||
| 11 | * separately from the Linux kernel or incorporated into other | ||
| 12 | * software packages, subject to the following license: | ||
| 13 | * | ||
| 14 | * Permission is hereby granted, free of charge, to any person obtaining a copy | ||
| 15 | * of this source file (the "Software"), to deal in the Software without | ||
| 16 | * restriction, including without limitation the rights to use, copy, modify, | ||
| 17 | * merge, publish, distribute, sublicense, and/or sell copies of the Software, | ||
| 18 | * and to permit persons to whom the Software is furnished to do so, subject to | ||
| 19 | * the following conditions: | ||
| 20 | * | ||
| 21 | * The above copyright notice and this permission notice shall be included in | ||
| 22 | * all copies or substantial portions of the Software. | ||
| 23 | * | ||
| 24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
| 25 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
| 26 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE | ||
| 27 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
| 28 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
| 29 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | ||
| 30 | * IN THE SOFTWARE. | ||
| 31 | */ | ||
| 32 | |||
| 33 | #ifndef _ASM_IA64_XEN_HYPERCALL_H | ||
| 34 | #define _ASM_IA64_XEN_HYPERCALL_H | ||
| 35 | |||
| 36 | #include <xen/interface/xen.h> | ||
| 37 | #include <xen/interface/physdev.h> | ||
| 38 | #include <xen/interface/sched.h> | ||
| 39 | #include <asm/xen/xcom_hcall.h> | ||
| 40 | struct xencomm_handle; | ||
| 41 | extern unsigned long __hypercall(unsigned long a1, unsigned long a2, | ||
| 42 | unsigned long a3, unsigned long a4, | ||
| 43 | unsigned long a5, unsigned long cmd); | ||
| 44 | |||
| 45 | /* | ||
| 46 | * Assembler stubs for hyper-calls. | ||
| 47 | */ | ||
| 48 | |||
| 49 | #define _hypercall0(type, name) \ | ||
| 50 | ({ \ | ||
| 51 | long __res; \ | ||
| 52 | __res = __hypercall(0, 0, 0, 0, 0, __HYPERVISOR_##name);\ | ||
| 53 | (type)__res; \ | ||
| 54 | }) | ||
| 55 | |||
| 56 | #define _hypercall1(type, name, a1) \ | ||
| 57 | ({ \ | ||
| 58 | long __res; \ | ||
| 59 | __res = __hypercall((unsigned long)a1, \ | ||
| 60 | 0, 0, 0, 0, __HYPERVISOR_##name); \ | ||
| 61 | (type)__res; \ | ||
| 62 | }) | ||
| 63 | |||
| 64 | #define _hypercall2(type, name, a1, a2) \ | ||
| 65 | ({ \ | ||
| 66 | long __res; \ | ||
| 67 | __res = __hypercall((unsigned long)a1, \ | ||
| 68 | (unsigned long)a2, \ | ||
| 69 | 0, 0, 0, __HYPERVISOR_##name); \ | ||
| 70 | (type)__res; \ | ||
| 71 | }) | ||
| 72 | |||
| 73 | #define _hypercall3(type, name, a1, a2, a3) \ | ||
| 74 | ({ \ | ||
| 75 | long __res; \ | ||
| 76 | __res = __hypercall((unsigned long)a1, \ | ||
| 77 | (unsigned long)a2, \ | ||
| 78 | (unsigned long)a3, \ | ||
| 79 | 0, 0, __HYPERVISOR_##name); \ | ||
| 80 | (type)__res; \ | ||
| 81 | }) | ||
| 82 | |||
| 83 | #define _hypercall4(type, name, a1, a2, a3, a4) \ | ||
| 84 | ({ \ | ||
| 85 | long __res; \ | ||
| 86 | __res = __hypercall((unsigned long)a1, \ | ||
| 87 | (unsigned long)a2, \ | ||
| 88 | (unsigned long)a3, \ | ||
| 89 | (unsigned long)a4, \ | ||
| 90 | 0, __HYPERVISOR_##name); \ | ||
| 91 | (type)__res; \ | ||
| 92 | }) | ||
| 93 | |||
| 94 | #define _hypercall5(type, name, a1, a2, a3, a4, a5) \ | ||
| 95 | ({ \ | ||
| 96 | long __res; \ | ||
| 97 | __res = __hypercall((unsigned long)a1, \ | ||
| 98 | (unsigned long)a2, \ | ||
| 99 | (unsigned long)a3, \ | ||
| 100 | (unsigned long)a4, \ | ||
| 101 | (unsigned long)a5, \ | ||
| 102 | __HYPERVISOR_##name); \ | ||
| 103 | (type)__res; \ | ||
| 104 | }) | ||
| 105 | |||
| 106 | |||
| 107 | static inline int | ||
| 108 | xencomm_arch_hypercall_sched_op(int cmd, struct xencomm_handle *arg) | ||
| 109 | { | ||
| 110 | return _hypercall2(int, sched_op, cmd, arg); | ||
| 111 | } | ||
| 112 | |||
| 113 | static inline long | ||
| 114 | HYPERVISOR_set_timer_op(u64 timeout) | ||
| 115 | { | ||
| 116 | unsigned long timeout_hi = (unsigned long)(timeout >> 32); | ||
| 117 | unsigned long timeout_lo = (unsigned long)timeout; | ||
| 118 | return _hypercall2(long, set_timer_op, timeout_lo, timeout_hi); | ||
| 119 | } | ||
| 120 | |||
| 121 | static inline int | ||
| 122 | xencomm_arch_hypercall_multicall(struct xencomm_handle *call_list, | ||
| 123 | int nr_calls) | ||
| 124 | { | ||
| 125 | return _hypercall2(int, multicall, call_list, nr_calls); | ||
| 126 | } | ||
| 127 | |||
| 128 | static inline int | ||
| 129 | xencomm_arch_hypercall_memory_op(unsigned int cmd, struct xencomm_handle *arg) | ||
| 130 | { | ||
| 131 | return _hypercall2(int, memory_op, cmd, arg); | ||
| 132 | } | ||
| 133 | |||
| 134 | static inline int | ||
| 135 | xencomm_arch_hypercall_event_channel_op(int cmd, struct xencomm_handle *arg) | ||
| 136 | { | ||
| 137 | return _hypercall2(int, event_channel_op, cmd, arg); | ||
| 138 | } | ||
| 139 | |||
| 140 | static inline int | ||
| 141 | xencomm_arch_hypercall_xen_version(int cmd, struct xencomm_handle *arg) | ||
| 142 | { | ||
| 143 | return _hypercall2(int, xen_version, cmd, arg); | ||
| 144 | } | ||
| 145 | |||
| 146 | static inline int | ||
| 147 | xencomm_arch_hypercall_console_io(int cmd, int count, | ||
| 148 | struct xencomm_handle *str) | ||
| 149 | { | ||
| 150 | return _hypercall3(int, console_io, cmd, count, str); | ||
| 151 | } | ||
| 152 | |||
| 153 | static inline int | ||
| 154 | xencomm_arch_hypercall_physdev_op(int cmd, struct xencomm_handle *arg) | ||
| 155 | { | ||
| 156 | return _hypercall2(int, physdev_op, cmd, arg); | ||
| 157 | } | ||
| 158 | |||
| 159 | static inline int | ||
| 160 | xencomm_arch_hypercall_grant_table_op(unsigned int cmd, | ||
| 161 | struct xencomm_handle *uop, | ||
| 162 | unsigned int count) | ||
| 163 | { | ||
| 164 | return _hypercall3(int, grant_table_op, cmd, uop, count); | ||
| 165 | } | ||
| 166 | |||
| 167 | int HYPERVISOR_grant_table_op(unsigned int cmd, void *uop, unsigned int count); | ||
| 168 | |||
| 169 | extern int xencomm_arch_hypercall_suspend(struct xencomm_handle *arg); | ||
| 170 | |||
| 171 | static inline int | ||
| 172 | xencomm_arch_hypercall_callback_op(int cmd, struct xencomm_handle *arg) | ||
| 173 | { | ||
| 174 | return _hypercall2(int, callback_op, cmd, arg); | ||
| 175 | } | ||
| 176 | |||
| 177 | static inline long | ||
| 178 | xencomm_arch_hypercall_vcpu_op(int cmd, int cpu, void *arg) | ||
| 179 | { | ||
| 180 | return _hypercall3(long, vcpu_op, cmd, cpu, arg); | ||
| 181 | } | ||
| 182 | |||
| 183 | static inline int | ||
| 184 | HYPERVISOR_physdev_op(int cmd, void *arg) | ||
| 185 | { | ||
| 186 | switch (cmd) { | ||
| 187 | case PHYSDEVOP_eoi: | ||
| 188 | return _hypercall1(int, ia64_fast_eoi, | ||
| 189 | ((struct physdev_eoi *)arg)->irq); | ||
| 190 | default: | ||
| 191 | return xencomm_hypercall_physdev_op(cmd, arg); | ||
| 192 | } | ||
| 193 | } | ||
| 194 | |||
| 195 | static inline long | ||
| 196 | xencomm_arch_hypercall_opt_feature(struct xencomm_handle *arg) | ||
| 197 | { | ||
| 198 | return _hypercall1(long, opt_feature, arg); | ||
| 199 | } | ||
| 200 | |||
| 201 | /* for balloon driver */ | ||
| 202 | #define HYPERVISOR_update_va_mapping(va, new_val, flags) (0) | ||
| 203 | |||
| 204 | /* Use xencomm to do hypercalls. */ | ||
| 205 | #define HYPERVISOR_sched_op xencomm_hypercall_sched_op | ||
| 206 | #define HYPERVISOR_event_channel_op xencomm_hypercall_event_channel_op | ||
| 207 | #define HYPERVISOR_callback_op xencomm_hypercall_callback_op | ||
| 208 | #define HYPERVISOR_multicall xencomm_hypercall_multicall | ||
| 209 | #define HYPERVISOR_xen_version xencomm_hypercall_xen_version | ||
| 210 | #define HYPERVISOR_console_io xencomm_hypercall_console_io | ||
| 211 | #define HYPERVISOR_memory_op xencomm_hypercall_memory_op | ||
| 212 | #define HYPERVISOR_suspend xencomm_hypercall_suspend | ||
| 213 | #define HYPERVISOR_vcpu_op xencomm_hypercall_vcpu_op | ||
| 214 | #define HYPERVISOR_opt_feature xencomm_hypercall_opt_feature | ||
| 215 | |||
| 216 | /* to compile gnttab_copy_grant_page() in drivers/xen/core/gnttab.c */ | ||
| 217 | #define HYPERVISOR_mmu_update(req, count, success_count, domid) ({ BUG(); 0; }) | ||
| 218 | |||
| 219 | static inline int | ||
| 220 | HYPERVISOR_shutdown( | ||
| 221 | unsigned int reason) | ||
| 222 | { | ||
| 223 | struct sched_shutdown sched_shutdown = { | ||
| 224 | .reason = reason | ||
| 225 | }; | ||
| 226 | |||
| 227 | int rc = HYPERVISOR_sched_op(SCHEDOP_shutdown, &sched_shutdown); | ||
| 228 | |||
| 229 | return rc; | ||
| 230 | } | ||
| 231 | |||
| 232 | /* for netfront.c, netback.c */ | ||
| 233 | #define MULTI_UVMFLAGS_INDEX 0 /* XXX any value */ | ||
| 234 | |||
| 235 | static inline void | ||
| 236 | MULTI_update_va_mapping( | ||
| 237 | struct multicall_entry *mcl, unsigned long va, | ||
| 238 | pte_t new_val, unsigned long flags) | ||
| 239 | { | ||
| 240 | mcl->op = __HYPERVISOR_update_va_mapping; | ||
| 241 | mcl->result = 0; | ||
| 242 | } | ||
| 243 | |||
| 244 | static inline void | ||
| 245 | MULTI_grant_table_op(struct multicall_entry *mcl, unsigned int cmd, | ||
| 246 | void *uop, unsigned int count) | ||
| 247 | { | ||
| 248 | mcl->op = __HYPERVISOR_grant_table_op; | ||
| 249 | mcl->args[0] = cmd; | ||
| 250 | mcl->args[1] = (unsigned long)uop; | ||
| 251 | mcl->args[2] = count; | ||
| 252 | } | ||
| 253 | |||
| 254 | static inline void | ||
| 255 | MULTI_mmu_update(struct multicall_entry *mcl, struct mmu_update *req, | ||
| 256 | int count, int *success_count, domid_t domid) | ||
| 257 | { | ||
| 258 | mcl->op = __HYPERVISOR_mmu_update; | ||
| 259 | mcl->args[0] = (unsigned long)req; | ||
| 260 | mcl->args[1] = count; | ||
| 261 | mcl->args[2] = (unsigned long)success_count; | ||
| 262 | mcl->args[3] = domid; | ||
| 263 | } | ||
| 264 | |||
| 265 | #endif /* _ASM_IA64_XEN_HYPERCALL_H */ | ||
diff --git a/arch/ia64/include/asm/xen/hypervisor.h b/arch/ia64/include/asm/xen/hypervisor.h deleted file mode 100644 index 67455c2ed2b1..000000000000 --- a/arch/ia64/include/asm/xen/hypervisor.h +++ /dev/null | |||
| @@ -1,61 +0,0 @@ | |||
| 1 | /****************************************************************************** | ||
| 2 | * hypervisor.h | ||
| 3 | * | ||
| 4 | * Linux-specific hypervisor handling. | ||
| 5 | * | ||
| 6 | * Copyright (c) 2002-2004, K A Fraser | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or | ||
| 9 | * modify it under the terms of the GNU General Public License version 2 | ||
| 10 | * as published by the Free Software Foundation; or, when distributed | ||
| 11 | * separately from the Linux kernel or incorporated into other | ||
| 12 | * software packages, subject to the following license: | ||
| 13 | * | ||
| 14 | * Permission is hereby granted, free of charge, to any person obtaining a copy | ||
| 15 | * of this source file (the "Software"), to deal in the Software without | ||
| 16 | * restriction, including without limitation the rights to use, copy, modify, | ||
| 17 | * merge, publish, distribute, sublicense, and/or sell copies of the Software, | ||
| 18 | * and to permit persons to whom the Software is furnished to do so, subject to | ||
| 19 | * the following conditions: | ||
| 20 | * | ||
| 21 | * The above copyright notice and this permission notice shall be included in | ||
| 22 | * all copies or substantial portions of the Software. | ||
| 23 | * | ||
| 24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
| 25 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
| 26 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE | ||
| 27 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
| 28 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
| 29 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | ||
| 30 | * IN THE SOFTWARE. | ||
| 31 | */ | ||
| 32 | |||
| 33 | #ifndef _ASM_IA64_XEN_HYPERVISOR_H | ||
| 34 | #define _ASM_IA64_XEN_HYPERVISOR_H | ||
| 35 | |||
| 36 | #include <linux/err.h> | ||
| 37 | #include <xen/interface/xen.h> | ||
| 38 | #include <xen/interface/version.h> /* to compile feature.c */ | ||
| 39 | #include <xen/features.h> /* to comiple xen-netfront.c */ | ||
| 40 | #include <xen/xen.h> | ||
| 41 | #include <asm/xen/hypercall.h> | ||
| 42 | |||
| 43 | #ifdef CONFIG_XEN | ||
| 44 | extern struct shared_info *HYPERVISOR_shared_info; | ||
| 45 | extern struct start_info *xen_start_info; | ||
| 46 | |||
| 47 | void __init xen_setup_vcpu_info_placement(void); | ||
| 48 | void force_evtchn_callback(void); | ||
| 49 | |||
| 50 | /* for drivers/xen/balloon/balloon.c */ | ||
| 51 | #ifdef CONFIG_XEN_SCRUB_PAGES | ||
| 52 | #define scrub_pages(_p, _n) memset((void *)(_p), 0, (_n) << PAGE_SHIFT) | ||
| 53 | #else | ||
| 54 | #define scrub_pages(_p, _n) ((void)0) | ||
| 55 | #endif | ||
| 56 | |||
| 57 | /* For setup_arch() in arch/ia64/kernel/setup.c */ | ||
| 58 | void xen_ia64_enable_opt_feature(void); | ||
| 59 | #endif | ||
| 60 | |||
| 61 | #endif /* _ASM_IA64_XEN_HYPERVISOR_H */ | ||
diff --git a/arch/ia64/include/asm/xen/inst.h b/arch/ia64/include/asm/xen/inst.h deleted file mode 100644 index c53a47611208..000000000000 --- a/arch/ia64/include/asm/xen/inst.h +++ /dev/null | |||
| @@ -1,486 +0,0 @@ | |||
| 1 | /****************************************************************************** | ||
| 2 | * arch/ia64/include/asm/xen/inst.h | ||
| 3 | * | ||
| 4 | * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp> | ||
| 5 | * VA Linux Systems Japan K.K. | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | * | ||
| 12 | * This program is distributed in the hope that it will be useful, | ||
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 15 | * GNU General Public License for more details. | ||
| 16 | * | ||
| 17 | * You should have received a copy of the GNU General Public License | ||
| 18 | * along with this program; if not, write to the Free Software | ||
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 20 | * | ||
| 21 | */ | ||
| 22 | |||
| 23 | #include <asm/xen/privop.h> | ||
| 24 | |||
| 25 | #define ia64_ivt xen_ivt | ||
| 26 | #define DO_SAVE_MIN XEN_DO_SAVE_MIN | ||
| 27 | |||
| 28 | #define __paravirt_switch_to xen_switch_to | ||
| 29 | #define __paravirt_leave_syscall xen_leave_syscall | ||
| 30 | #define __paravirt_work_processed_syscall xen_work_processed_syscall | ||
| 31 | #define __paravirt_leave_kernel xen_leave_kernel | ||
| 32 | #define __paravirt_pending_syscall_end xen_work_pending_syscall_end | ||
| 33 | #define __paravirt_work_processed_syscall_target \ | ||
| 34 | xen_work_processed_syscall | ||
| 35 | |||
| 36 | #define paravirt_fsyscall_table xen_fsyscall_table | ||
| 37 | #define paravirt_fsys_bubble_down xen_fsys_bubble_down | ||
| 38 | |||
| 39 | #define MOV_FROM_IFA(reg) \ | ||
| 40 | movl reg = XSI_IFA; \ | ||
| 41 | ;; \ | ||
| 42 | ld8 reg = [reg] | ||
| 43 | |||
| 44 | #define MOV_FROM_ITIR(reg) \ | ||
| 45 | movl reg = XSI_ITIR; \ | ||
| 46 | ;; \ | ||
| 47 | ld8 reg = [reg] | ||
| 48 | |||
| 49 | #define MOV_FROM_ISR(reg) \ | ||
| 50 | movl reg = XSI_ISR; \ | ||
| 51 | ;; \ | ||
| 52 | ld8 reg = [reg] | ||
| 53 | |||
| 54 | #define MOV_FROM_IHA(reg) \ | ||
| 55 | movl reg = XSI_IHA; \ | ||
| 56 | ;; \ | ||
| 57 | ld8 reg = [reg] | ||
| 58 | |||
| 59 | #define MOV_FROM_IPSR(pred, reg) \ | ||
| 60 | (pred) movl reg = XSI_IPSR; \ | ||
| 61 | ;; \ | ||
| 62 | (pred) ld8 reg = [reg] | ||
| 63 | |||
| 64 | #define MOV_FROM_IIM(reg) \ | ||
| 65 | movl reg = XSI_IIM; \ | ||
| 66 | ;; \ | ||
| 67 | ld8 reg = [reg] | ||
| 68 | |||
| 69 | #define MOV_FROM_IIP(reg) \ | ||
| 70 | movl reg = XSI_IIP; \ | ||
| 71 | ;; \ | ||
| 72 | ld8 reg = [reg] | ||
| 73 | |||
| 74 | .macro __MOV_FROM_IVR reg, clob | ||
| 75 | .ifc "\reg", "r8" | ||
| 76 | XEN_HYPER_GET_IVR | ||
| 77 | .exitm | ||
| 78 | .endif | ||
| 79 | .ifc "\clob", "r8" | ||
| 80 | XEN_HYPER_GET_IVR | ||
| 81 | ;; | ||
| 82 | mov \reg = r8 | ||
| 83 | .exitm | ||
| 84 | .endif | ||
| 85 | |||
| 86 | mov \clob = r8 | ||
| 87 | ;; | ||
| 88 | XEN_HYPER_GET_IVR | ||
| 89 | ;; | ||
| 90 | mov \reg = r8 | ||
| 91 | ;; | ||
| 92 | mov r8 = \clob | ||
| 93 | .endm | ||
| 94 | #define MOV_FROM_IVR(reg, clob) __MOV_FROM_IVR reg, clob | ||
| 95 | |||
| 96 | .macro __MOV_FROM_PSR pred, reg, clob | ||
| 97 | .ifc "\reg", "r8" | ||
| 98 | (\pred) XEN_HYPER_GET_PSR; | ||
| 99 | .exitm | ||
| 100 | .endif | ||
| 101 | .ifc "\clob", "r8" | ||
| 102 | (\pred) XEN_HYPER_GET_PSR | ||
| 103 | ;; | ||
| 104 | (\pred) mov \reg = r8 | ||
| 105 | .exitm | ||
| 106 | .endif | ||
| 107 | |||
| 108 | (\pred) mov \clob = r8 | ||
| 109 | (\pred) XEN_HYPER_GET_PSR | ||
| 110 | ;; | ||
| 111 | (\pred) mov \reg = r8 | ||
| 112 | (\pred) mov r8 = \clob | ||
| 113 | .endm | ||
| 114 | #define MOV_FROM_PSR(pred, reg, clob) __MOV_FROM_PSR pred, reg, clob | ||
| 115 | |||
| 116 | /* assuming ar.itc is read with interrupt disabled. */ | ||
| 117 | #define MOV_FROM_ITC(pred, pred_clob, reg, clob) \ | ||
| 118 | (pred) movl clob = XSI_ITC_OFFSET; \ | ||
| 119 | ;; \ | ||
| 120 | (pred) ld8 clob = [clob]; \ | ||
| 121 | (pred) mov reg = ar.itc; \ | ||
| 122 | ;; \ | ||
| 123 | (pred) add reg = reg, clob; \ | ||
| 124 | ;; \ | ||
| 125 | (pred) movl clob = XSI_ITC_LAST; \ | ||
| 126 | ;; \ | ||
| 127 | (pred) ld8 clob = [clob]; \ | ||
| 128 | ;; \ | ||
| 129 | (pred) cmp.geu.unc pred_clob, p0 = clob, reg; \ | ||
| 130 | ;; \ | ||
| 131 | (pred_clob) add reg = 1, clob; \ | ||
| 132 | ;; \ | ||
| 133 | (pred) movl clob = XSI_ITC_LAST; \ | ||
| 134 | ;; \ | ||
| 135 | (pred) st8 [clob] = reg | ||
| 136 | |||
| 137 | |||
| 138 | #define MOV_TO_IFA(reg, clob) \ | ||
| 139 | movl clob = XSI_IFA; \ | ||
| 140 | ;; \ | ||
| 141 | st8 [clob] = reg \ | ||
| 142 | |||
| 143 | #define MOV_TO_ITIR(pred, reg, clob) \ | ||
| 144 | (pred) movl clob = XSI_ITIR; \ | ||
| 145 | ;; \ | ||
| 146 | (pred) st8 [clob] = reg | ||
| 147 | |||
| 148 | #define MOV_TO_IHA(pred, reg, clob) \ | ||
| 149 | (pred) movl clob = XSI_IHA; \ | ||
| 150 | ;; \ | ||
| 151 | (pred) st8 [clob] = reg | ||
| 152 | |||
| 153 | #define MOV_TO_IPSR(pred, reg, clob) \ | ||
| 154 | (pred) movl clob = XSI_IPSR; \ | ||
| 155 | ;; \ | ||
| 156 | (pred) st8 [clob] = reg; \ | ||
| 157 | ;; | ||
| 158 | |||
| 159 | #define MOV_TO_IFS(pred, reg, clob) \ | ||
| 160 | (pred) movl clob = XSI_IFS; \ | ||
| 161 | ;; \ | ||
| 162 | (pred) st8 [clob] = reg; \ | ||
| 163 | ;; | ||
| 164 | |||
| 165 | #define MOV_TO_IIP(reg, clob) \ | ||
| 166 | movl clob = XSI_IIP; \ | ||
| 167 | ;; \ | ||
| 168 | st8 [clob] = reg | ||
| 169 | |||
| 170 | .macro ____MOV_TO_KR kr, reg, clob0, clob1 | ||
| 171 | .ifc "\clob0", "r9" | ||
| 172 | .error "clob0 \clob0 must not be r9" | ||
| 173 | .endif | ||
| 174 | .ifc "\clob1", "r8" | ||
| 175 | .error "clob1 \clob1 must not be r8" | ||
| 176 | .endif | ||
| 177 | |||
| 178 | .ifnc "\reg", "r9" | ||
| 179 | .ifnc "\clob1", "r9" | ||
| 180 | mov \clob1 = r9 | ||
| 181 | .endif | ||
| 182 | mov r9 = \reg | ||
| 183 | .endif | ||
| 184 | .ifnc "\clob0", "r8" | ||
| 185 | mov \clob0 = r8 | ||
| 186 | .endif | ||
| 187 | mov r8 = \kr | ||
| 188 | ;; | ||
| 189 | XEN_HYPER_SET_KR | ||
| 190 | |||
| 191 | .ifnc "\reg", "r9" | ||
| 192 | .ifnc "\clob1", "r9" | ||
| 193 | mov r9 = \clob1 | ||
| 194 | .endif | ||
| 195 | .endif | ||
| 196 | .ifnc "\clob0", "r8" | ||
| 197 | mov r8 = \clob0 | ||
| 198 | .endif | ||
| 199 | .endm | ||
| 200 | |||
| 201 | .macro __MOV_TO_KR kr, reg, clob0, clob1 | ||
| 202 | .ifc "\clob0", "r9" | ||
| 203 | ____MOV_TO_KR \kr, \reg, \clob1, \clob0 | ||
| 204 | .exitm | ||
| 205 | .endif | ||
| 206 | .ifc "\clob1", "r8" | ||
| 207 | ____MOV_TO_KR \kr, \reg, \clob1, \clob0 | ||
| 208 | .exitm | ||
| 209 | .endif | ||
| 210 | |||
| 211 | ____MOV_TO_KR \kr, \reg, \clob0, \clob1 | ||
| 212 | .endm | ||
| 213 | |||
| 214 | #define MOV_TO_KR(kr, reg, clob0, clob1) \ | ||
| 215 | __MOV_TO_KR IA64_KR_ ## kr, reg, clob0, clob1 | ||
| 216 | |||
| 217 | |||
| 218 | .macro __ITC_I pred, reg, clob | ||
| 219 | .ifc "\reg", "r8" | ||
| 220 | (\pred) XEN_HYPER_ITC_I | ||
| 221 | .exitm | ||
| 222 | .endif | ||
| 223 | .ifc "\clob", "r8" | ||
| 224 | (\pred) mov r8 = \reg | ||
| 225 | ;; | ||
| 226 | (\pred) XEN_HYPER_ITC_I | ||
| 227 | .exitm | ||
| 228 | .endif | ||
| 229 | |||
| 230 | (\pred) mov \clob = r8 | ||
| 231 | (\pred) mov r8 = \reg | ||
| 232 | ;; | ||
| 233 | (\pred) XEN_HYPER_ITC_I | ||
| 234 | ;; | ||
| 235 | (\pred) mov r8 = \clob | ||
| 236 | ;; | ||
| 237 | .endm | ||
| 238 | #define ITC_I(pred, reg, clob) __ITC_I pred, reg, clob | ||
| 239 | |||
| 240 | .macro __ITC_D pred, reg, clob | ||
| 241 | .ifc "\reg", "r8" | ||
| 242 | (\pred) XEN_HYPER_ITC_D | ||
| 243 | ;; | ||
| 244 | .exitm | ||
| 245 | .endif | ||
| 246 | .ifc "\clob", "r8" | ||
| 247 | (\pred) mov r8 = \reg | ||
| 248 | ;; | ||
| 249 | (\pred) XEN_HYPER_ITC_D | ||
| 250 | ;; | ||
| 251 | .exitm | ||
| 252 | .endif | ||
| 253 | |||
| 254 | (\pred) mov \clob = r8 | ||
| 255 | (\pred) mov r8 = \reg | ||
| 256 | ;; | ||
| 257 | (\pred) XEN_HYPER_ITC_D | ||
| 258 | ;; | ||
| 259 | (\pred) mov r8 = \clob | ||
| 260 | ;; | ||
| 261 | .endm | ||
| 262 | #define ITC_D(pred, reg, clob) __ITC_D pred, reg, clob | ||
| 263 | |||
| 264 | .macro __ITC_I_AND_D pred_i, pred_d, reg, clob | ||
| 265 | .ifc "\reg", "r8" | ||
| 266 | (\pred_i)XEN_HYPER_ITC_I | ||
| 267 | ;; | ||
| 268 | (\pred_d)XEN_HYPER_ITC_D | ||
| 269 | ;; | ||
| 270 | .exitm | ||
| 271 | .endif | ||
| 272 | .ifc "\clob", "r8" | ||
| 273 | mov r8 = \reg | ||
| 274 | ;; | ||
| 275 | (\pred_i)XEN_HYPER_ITC_I | ||
| 276 | ;; | ||
| 277 | (\pred_d)XEN_HYPER_ITC_D | ||
| 278 | ;; | ||
| 279 | .exitm | ||
| 280 | .endif | ||
| 281 | |||
| 282 | mov \clob = r8 | ||
| 283 | mov r8 = \reg | ||
| 284 | ;; | ||
| 285 | (\pred_i)XEN_HYPER_ITC_I | ||
| 286 | ;; | ||
| 287 | (\pred_d)XEN_HYPER_ITC_D | ||
| 288 | ;; | ||
| 289 | mov r8 = \clob | ||
| 290 | ;; | ||
| 291 | .endm | ||
| 292 | #define ITC_I_AND_D(pred_i, pred_d, reg, clob) \ | ||
| 293 | __ITC_I_AND_D pred_i, pred_d, reg, clob | ||
| 294 | |||
| 295 | .macro __THASH pred, reg0, reg1, clob | ||
| 296 | .ifc "\reg0", "r8" | ||
| 297 | (\pred) mov r8 = \reg1 | ||
| 298 | (\pred) XEN_HYPER_THASH | ||
| 299 | .exitm | ||
| 300 | .endc | ||
| 301 | .ifc "\reg1", "r8" | ||
| 302 | (\pred) XEN_HYPER_THASH | ||
| 303 | ;; | ||
| 304 | (\pred) mov \reg0 = r8 | ||
| 305 | ;; | ||
| 306 | .exitm | ||
| 307 | .endif | ||
| 308 | .ifc "\clob", "r8" | ||
| 309 | (\pred) mov r8 = \reg1 | ||
| 310 | (\pred) XEN_HYPER_THASH | ||
| 311 | ;; | ||
| 312 | (\pred) mov \reg0 = r8 | ||
| 313 | ;; | ||
| 314 | .exitm | ||
| 315 | .endif | ||
| 316 | |||
| 317 | (\pred) mov \clob = r8 | ||
| 318 | (\pred) mov r8 = \reg1 | ||
| 319 | (\pred) XEN_HYPER_THASH | ||
| 320 | ;; | ||
| 321 | (\pred) mov \reg0 = r8 | ||
| 322 | (\pred) mov r8 = \clob | ||
| 323 | ;; | ||
| 324 | .endm | ||
| 325 | #define THASH(pred, reg0, reg1, clob) __THASH pred, reg0, reg1, clob | ||
| 326 | |||
| 327 | #define SSM_PSR_IC_AND_DEFAULT_BITS_AND_SRLZ_I(clob0, clob1) \ | ||
| 328 | mov clob0 = 1; \ | ||
| 329 | movl clob1 = XSI_PSR_IC; \ | ||
| 330 | ;; \ | ||
| 331 | st4 [clob1] = clob0 \ | ||
| 332 | ;; | ||
| 333 | |||
| 334 | #define SSM_PSR_IC_AND_SRLZ_D(clob0, clob1) \ | ||
| 335 | ;; \ | ||
| 336 | srlz.d; \ | ||
| 337 | mov clob1 = 1; \ | ||
| 338 | movl clob0 = XSI_PSR_IC; \ | ||
| 339 | ;; \ | ||
| 340 | st4 [clob0] = clob1 | ||
| 341 | |||
| 342 | #define RSM_PSR_IC(clob) \ | ||
| 343 | movl clob = XSI_PSR_IC; \ | ||
| 344 | ;; \ | ||
| 345 | st4 [clob] = r0; \ | ||
| 346 | ;; | ||
| 347 | |||
| 348 | /* pred will be clobbered */ | ||
| 349 | #define MASK_TO_PEND_OFS (-1) | ||
| 350 | #define SSM_PSR_I(pred, pred_clob, clob) \ | ||
| 351 | (pred) movl clob = XSI_PSR_I_ADDR \ | ||
| 352 | ;; \ | ||
| 353 | (pred) ld8 clob = [clob] \ | ||
| 354 | ;; \ | ||
| 355 | /* if (pred) vpsr.i = 1 */ \ | ||
| 356 | /* if (pred) (vcpu->vcpu_info->evtchn_upcall_mask)=0 */ \ | ||
| 357 | (pred) st1 [clob] = r0, MASK_TO_PEND_OFS \ | ||
| 358 | ;; \ | ||
| 359 | /* if (vcpu->vcpu_info->evtchn_upcall_pending) */ \ | ||
| 360 | (pred) ld1 clob = [clob] \ | ||
| 361 | ;; \ | ||
| 362 | (pred) cmp.ne.unc pred_clob, p0 = clob, r0 \ | ||
| 363 | ;; \ | ||
| 364 | (pred_clob)XEN_HYPER_SSM_I /* do areal ssm psr.i */ | ||
| 365 | |||
| 366 | #define RSM_PSR_I(pred, clob0, clob1) \ | ||
| 367 | movl clob0 = XSI_PSR_I_ADDR; \ | ||
| 368 | mov clob1 = 1; \ | ||
| 369 | ;; \ | ||
| 370 | ld8 clob0 = [clob0]; \ | ||
| 371 | ;; \ | ||
| 372 | (pred) st1 [clob0] = clob1 | ||
| 373 | |||
| 374 | #define RSM_PSR_I_IC(clob0, clob1, clob2) \ | ||
| 375 | movl clob0 = XSI_PSR_I_ADDR; \ | ||
| 376 | movl clob1 = XSI_PSR_IC; \ | ||
| 377 | ;; \ | ||
| 378 | ld8 clob0 = [clob0]; \ | ||
| 379 | mov clob2 = 1; \ | ||
| 380 | ;; \ | ||
| 381 | /* note: clears both vpsr.i and vpsr.ic! */ \ | ||
| 382 | st1 [clob0] = clob2; \ | ||
| 383 | st4 [clob1] = r0; \ | ||
| 384 | ;; | ||
| 385 | |||
| 386 | #define RSM_PSR_DT \ | ||
| 387 | XEN_HYPER_RSM_PSR_DT | ||
| 388 | |||
| 389 | #define RSM_PSR_BE_I(clob0, clob1) \ | ||
| 390 | RSM_PSR_I(p0, clob0, clob1); \ | ||
| 391 | rum psr.be | ||
| 392 | |||
| 393 | #define SSM_PSR_DT_AND_SRLZ_I \ | ||
| 394 | XEN_HYPER_SSM_PSR_DT | ||
| 395 | |||
| 396 | #define BSW_0(clob0, clob1, clob2) \ | ||
| 397 | ;; \ | ||
| 398 | /* r16-r31 all now hold bank1 values */ \ | ||
| 399 | mov clob2 = ar.unat; \ | ||
| 400 | movl clob0 = XSI_BANK1_R16; \ | ||
| 401 | movl clob1 = XSI_BANK1_R16 + 8; \ | ||
| 402 | ;; \ | ||
| 403 | .mem.offset 0, 0; st8.spill [clob0] = r16, 16; \ | ||
| 404 | .mem.offset 8, 0; st8.spill [clob1] = r17, 16; \ | ||
| 405 | ;; \ | ||
| 406 | .mem.offset 0, 0; st8.spill [clob0] = r18, 16; \ | ||
| 407 | .mem.offset 8, 0; st8.spill [clob1] = r19, 16; \ | ||
| 408 | ;; \ | ||
| 409 | .mem.offset 0, 0; st8.spill [clob0] = r20, 16; \ | ||
| 410 | .mem.offset 8, 0; st8.spill [clob1] = r21, 16; \ | ||
| 411 | ;; \ | ||
| 412 | .mem.offset 0, 0; st8.spill [clob0] = r22, 16; \ | ||
| 413 | .mem.offset 8, 0; st8.spill [clob1] = r23, 16; \ | ||
| 414 | ;; \ | ||
| 415 | .mem.offset 0, 0; st8.spill [clob0] = r24, 16; \ | ||
| 416 | .mem.offset 8, 0; st8.spill [clob1] = r25, 16; \ | ||
| 417 | ;; \ | ||
| 418 | .mem.offset 0, 0; st8.spill [clob0] = r26, 16; \ | ||
| 419 | .mem.offset 8, 0; st8.spill [clob1] = r27, 16; \ | ||
| 420 | ;; \ | ||
| 421 | .mem.offset 0, 0; st8.spill [clob0] = r28, 16; \ | ||
| 422 | .mem.offset 8, 0; st8.spill [clob1] = r29, 16; \ | ||
| 423 | ;; \ | ||
| 424 | .mem.offset 0, 0; st8.spill [clob0] = r30, 16; \ | ||
| 425 | .mem.offset 8, 0; st8.spill [clob1] = r31, 16; \ | ||
| 426 | ;; \ | ||
| 427 | mov clob1 = ar.unat; \ | ||
| 428 | movl clob0 = XSI_B1NAT; \ | ||
| 429 | ;; \ | ||
| 430 | st8 [clob0] = clob1; \ | ||
| 431 | mov ar.unat = clob2; \ | ||
| 432 | movl clob0 = XSI_BANKNUM; \ | ||
| 433 | ;; \ | ||
| 434 | st4 [clob0] = r0 | ||
| 435 | |||
| 436 | |||
| 437 | /* FIXME: THIS CODE IS NOT NaT SAFE! */ | ||
| 438 | #define XEN_BSW_1(clob) \ | ||
| 439 | mov clob = ar.unat; \ | ||
| 440 | movl r30 = XSI_B1NAT; \ | ||
| 441 | ;; \ | ||
| 442 | ld8 r30 = [r30]; \ | ||
| 443 | mov r31 = 1; \ | ||
| 444 | ;; \ | ||
| 445 | mov ar.unat = r30; \ | ||
| 446 | movl r30 = XSI_BANKNUM; \ | ||
| 447 | ;; \ | ||
| 448 | st4 [r30] = r31; \ | ||
| 449 | movl r30 = XSI_BANK1_R16; \ | ||
| 450 | movl r31 = XSI_BANK1_R16+8; \ | ||
| 451 | ;; \ | ||
| 452 | ld8.fill r16 = [r30], 16; \ | ||
| 453 | ld8.fill r17 = [r31], 16; \ | ||
| 454 | ;; \ | ||
| 455 | ld8.fill r18 = [r30], 16; \ | ||
| 456 | ld8.fill r19 = [r31], 16; \ | ||
| 457 | ;; \ | ||
| 458 | ld8.fill r20 = [r30], 16; \ | ||
| 459 | ld8.fill r21 = [r31], 16; \ | ||
| 460 | ;; \ | ||
| 461 | ld8.fill r22 = [r30], 16; \ | ||
| 462 | ld8.fill r23 = [r31], 16; \ | ||
| 463 | ;; \ | ||
| 464 | ld8.fill r24 = [r30], 16; \ | ||
| 465 | ld8.fill r25 = [r31], 16; \ | ||
| 466 | ;; \ | ||
| 467 | ld8.fill r26 = [r30], 16; \ | ||
| 468 | ld8.fill r27 = [r31], 16; \ | ||
| 469 | ;; \ | ||
| 470 | ld8.fill r28 = [r30], 16; \ | ||
| 471 | ld8.fill r29 = [r31], 16; \ | ||
| 472 | ;; \ | ||
| 473 | ld8.fill r30 = [r30]; \ | ||
| 474 | ld8.fill r31 = [r31]; \ | ||
| 475 | ;; \ | ||
| 476 | mov ar.unat = clob | ||
| 477 | |||
| 478 | #define BSW_1(clob0, clob1) XEN_BSW_1(clob1) | ||
| 479 | |||
| 480 | |||
| 481 | #define COVER \ | ||
| 482 | XEN_HYPER_COVER | ||
| 483 | |||
| 484 | #define RFI \ | ||
| 485 | XEN_HYPER_RFI; \ | ||
| 486 | dv_serialize_data | ||
diff --git a/arch/ia64/include/asm/xen/interface.h b/arch/ia64/include/asm/xen/interface.h deleted file mode 100644 index e88c5de27410..000000000000 --- a/arch/ia64/include/asm/xen/interface.h +++ /dev/null | |||
| @@ -1,363 +0,0 @@ | |||
| 1 | /****************************************************************************** | ||
| 2 | * arch-ia64/hypervisor-if.h | ||
| 3 | * | ||
| 4 | * Guest OS interface to IA64 Xen. | ||
| 5 | * | ||
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | ||
| 7 | * of this software and associated documentation files (the "Software"), to | ||
| 8 | * deal in the Software without restriction, including without limitation the | ||
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or | ||
| 10 | * sell copies of the Software, and to permit persons to whom the Software is | ||
| 11 | * furnished to do so, subject to the following conditions: | ||
| 12 | * | ||
| 13 | * The above copyright notice and this permission notice shall be included in | ||
| 14 | * all copies or substantial portions of the Software. | ||
| 15 | * | ||
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE | ||
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
| 21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
| 22 | * DEALINGS IN THE SOFTWARE. | ||
| 23 | * | ||
| 24 | * Copyright by those who contributed. (in alphabetical order) | ||
| 25 | * | ||
| 26 | * Anthony Xu <anthony.xu@intel.com> | ||
| 27 | * Eddie Dong <eddie.dong@intel.com> | ||
| 28 | * Fred Yang <fred.yang@intel.com> | ||
| 29 | * Kevin Tian <kevin.tian@intel.com> | ||
| 30 | * Alex Williamson <alex.williamson@hp.com> | ||
| 31 | * Chris Wright <chrisw@sous-sol.org> | ||
| 32 | * Christian Limpach <Christian.Limpach@cl.cam.ac.uk> | ||
| 33 | * Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com> | ||
| 34 | * Hollis Blanchard <hollisb@us.ibm.com> | ||
| 35 | * Isaku Yamahata <yamahata@valinux.co.jp> | ||
| 36 | * Jan Beulich <jbeulich@novell.com> | ||
| 37 | * John Levon <john.levon@sun.com> | ||
| 38 | * Kazuhiro Suzuki <kaz@jp.fujitsu.com> | ||
| 39 | * Keir Fraser <keir.fraser@citrix.com> | ||
| 40 | * Kouya Shimura <kouya@jp.fujitsu.com> | ||
| 41 | * Masaki Kanno <kanno.masaki@jp.fujitsu.com> | ||
| 42 | * Matt Chapman <matthewc@hp.com> | ||
| 43 | * Matthew Chapman <matthewc@hp.com> | ||
| 44 | * Samuel Thibault <samuel.thibault@eu.citrix.com> | ||
| 45 | * Tomonari Horikoshi <t.horikoshi@jp.fujitsu.com> | ||
| 46 | * Tristan Gingold <tgingold@free.fr> | ||
| 47 | * Tsunehisa Doi <Doi.Tsunehisa@jp.fujitsu.com> | ||
| 48 | * Yutaka Ezaki <yutaka.ezaki@jp.fujitsu.com> | ||
| 49 | * Zhang Xin <xing.z.zhang@intel.com> | ||
| 50 | * Zhang xiantao <xiantao.zhang@intel.com> | ||
| 51 | * dan.magenheimer@hp.com | ||
| 52 | * ian.pratt@cl.cam.ac.uk | ||
| 53 | * michael.fetterman@cl.cam.ac.uk | ||
| 54 | */ | ||
| 55 | |||
| 56 | #ifndef _ASM_IA64_XEN_INTERFACE_H | ||
| 57 | #define _ASM_IA64_XEN_INTERFACE_H | ||
| 58 | |||
| 59 | #define __DEFINE_GUEST_HANDLE(name, type) \ | ||
| 60 | typedef struct { type *p; } __guest_handle_ ## name | ||
| 61 | |||
| 62 | #define DEFINE_GUEST_HANDLE_STRUCT(name) \ | ||
| 63 | __DEFINE_GUEST_HANDLE(name, struct name) | ||
| 64 | #define DEFINE_GUEST_HANDLE(name) __DEFINE_GUEST_HANDLE(name, name) | ||
| 65 | #define GUEST_HANDLE(name) __guest_handle_ ## name | ||
| 66 | #define GUEST_HANDLE_64(name) GUEST_HANDLE(name) | ||
| 67 | #define set_xen_guest_handle(hnd, val) do { (hnd).p = val; } while (0) | ||
| 68 | |||
| 69 | #ifndef __ASSEMBLY__ | ||
| 70 | /* Explicitly size integers that represent pfns in the public interface | ||
| 71 | * with Xen so that we could have one ABI that works for 32 and 64 bit | ||
| 72 | * guests. */ | ||
| 73 | typedef unsigned long xen_pfn_t; | ||
| 74 | typedef unsigned long xen_ulong_t; | ||
| 75 | /* Guest handles for primitive C types. */ | ||
| 76 | __DEFINE_GUEST_HANDLE(uchar, unsigned char); | ||
| 77 | __DEFINE_GUEST_HANDLE(uint, unsigned int); | ||
| 78 | __DEFINE_GUEST_HANDLE(ulong, unsigned long); | ||
| 79 | |||
| 80 | DEFINE_GUEST_HANDLE(char); | ||
| 81 | DEFINE_GUEST_HANDLE(int); | ||
| 82 | DEFINE_GUEST_HANDLE(long); | ||
| 83 | DEFINE_GUEST_HANDLE(void); | ||
| 84 | DEFINE_GUEST_HANDLE(uint64_t); | ||
| 85 | DEFINE_GUEST_HANDLE(uint32_t); | ||
| 86 | |||
| 87 | DEFINE_GUEST_HANDLE(xen_pfn_t); | ||
| 88 | #define PRI_xen_pfn "lx" | ||
| 89 | #endif | ||
| 90 | |||
| 91 | /* Arch specific VIRQs definition */ | ||
| 92 | #define VIRQ_ITC VIRQ_ARCH_0 /* V. Virtual itc timer */ | ||
| 93 | #define VIRQ_MCA_CMC VIRQ_ARCH_1 /* MCA cmc interrupt */ | ||
| 94 | #define VIRQ_MCA_CPE VIRQ_ARCH_2 /* MCA cpe interrupt */ | ||
| 95 | |||
| 96 | /* Maximum number of virtual CPUs in multi-processor guests. */ | ||
| 97 | /* keep sizeof(struct shared_page) <= PAGE_SIZE. | ||
| 98 | * this is checked in arch/ia64/xen/hypervisor.c. */ | ||
| 99 | #define MAX_VIRT_CPUS 64 | ||
| 100 | |||
| 101 | #ifndef __ASSEMBLY__ | ||
| 102 | |||
| 103 | #define INVALID_MFN (~0UL) | ||
| 104 | |||
| 105 | union vac { | ||
| 106 | unsigned long value; | ||
| 107 | struct { | ||
| 108 | int a_int:1; | ||
| 109 | int a_from_int_cr:1; | ||
| 110 | int a_to_int_cr:1; | ||
| 111 | int a_from_psr:1; | ||
| 112 | int a_from_cpuid:1; | ||
| 113 | int a_cover:1; | ||
| 114 | int a_bsw:1; | ||
| 115 | long reserved:57; | ||
| 116 | }; | ||
| 117 | }; | ||
| 118 | |||
| 119 | union vdc { | ||
| 120 | unsigned long value; | ||
| 121 | struct { | ||
| 122 | int d_vmsw:1; | ||
| 123 | int d_extint:1; | ||
| 124 | int d_ibr_dbr:1; | ||
| 125 | int d_pmc:1; | ||
| 126 | int d_to_pmd:1; | ||
| 127 | int d_itm:1; | ||
| 128 | long reserved:58; | ||
| 129 | }; | ||
| 130 | }; | ||
| 131 | |||
| 132 | struct mapped_regs { | ||
| 133 | union vac vac; | ||
| 134 | union vdc vdc; | ||
| 135 | unsigned long virt_env_vaddr; | ||
| 136 | unsigned long reserved1[29]; | ||
| 137 | unsigned long vhpi; | ||
| 138 | unsigned long reserved2[95]; | ||
| 139 | union { | ||
| 140 | unsigned long vgr[16]; | ||
| 141 | unsigned long bank1_regs[16]; /* bank1 regs (r16-r31) | ||
| 142 | when bank0 active */ | ||
| 143 | }; | ||
| 144 | union { | ||
| 145 | unsigned long vbgr[16]; | ||
| 146 | unsigned long bank0_regs[16]; /* bank0 regs (r16-r31) | ||
| 147 | when bank1 active */ | ||
| 148 | }; | ||
| 149 | unsigned long vnat; | ||
| 150 | unsigned long vbnat; | ||
| 151 | unsigned long vcpuid[5]; | ||
| 152 | unsigned long reserved3[11]; | ||
| 153 | unsigned long vpsr; | ||
| 154 | unsigned long vpr; | ||
| 155 | unsigned long reserved4[76]; | ||
| 156 | union { | ||
| 157 | unsigned long vcr[128]; | ||
| 158 | struct { | ||
| 159 | unsigned long dcr; /* CR0 */ | ||
| 160 | unsigned long itm; | ||
| 161 | unsigned long iva; | ||
| 162 | unsigned long rsv1[5]; | ||
| 163 | unsigned long pta; /* CR8 */ | ||
| 164 | unsigned long rsv2[7]; | ||
| 165 | unsigned long ipsr; /* CR16 */ | ||
| 166 | unsigned long isr; | ||
| 167 | unsigned long rsv3; | ||
| 168 | unsigned long iip; | ||
| 169 | unsigned long ifa; | ||
| 170 | unsigned long itir; | ||
| 171 | unsigned long iipa; | ||
| 172 | unsigned long ifs; | ||
| 173 | unsigned long iim; /* CR24 */ | ||
| 174 | unsigned long iha; | ||
| 175 | unsigned long rsv4[38]; | ||
| 176 | unsigned long lid; /* CR64 */ | ||
| 177 | unsigned long ivr; | ||
| 178 | unsigned long tpr; | ||
| 179 | unsigned long eoi; | ||
| 180 | unsigned long irr[4]; | ||
| 181 | unsigned long itv; /* CR72 */ | ||
| 182 | unsigned long pmv; | ||
| 183 | unsigned long cmcv; | ||
| 184 | unsigned long rsv5[5]; | ||
| 185 | unsigned long lrr0; /* CR80 */ | ||
| 186 | unsigned long lrr1; | ||
| 187 | unsigned long rsv6[46]; | ||
| 188 | }; | ||
| 189 | }; | ||
| 190 | union { | ||
| 191 | unsigned long reserved5[128]; | ||
| 192 | struct { | ||
| 193 | unsigned long precover_ifs; | ||
| 194 | unsigned long unat; /* not sure if this is needed | ||
| 195 | until NaT arch is done */ | ||
| 196 | int interrupt_collection_enabled; /* virtual psr.ic */ | ||
| 197 | |||
| 198 | /* virtual interrupt deliverable flag is | ||
| 199 | * evtchn_upcall_mask in shared info area now. | ||
| 200 | * interrupt_mask_addr is the address | ||
| 201 | * of evtchn_upcall_mask for current vcpu | ||
| 202 | */ | ||
| 203 | unsigned char *interrupt_mask_addr; | ||
| 204 | int pending_interruption; | ||
| 205 | unsigned char vpsr_pp; | ||
| 206 | unsigned char vpsr_dfh; | ||
| 207 | unsigned char hpsr_dfh; | ||
| 208 | unsigned char hpsr_mfh; | ||
| 209 | unsigned long reserved5_1[4]; | ||
| 210 | int metaphysical_mode; /* 1 = use metaphys mapping | ||
| 211 | 0 = use virtual */ | ||
| 212 | int banknum; /* 0 or 1, which virtual | ||
| 213 | register bank is active */ | ||
| 214 | unsigned long rrs[8]; /* region registers */ | ||
| 215 | unsigned long krs[8]; /* kernel registers */ | ||
| 216 | unsigned long tmp[16]; /* temp registers | ||
| 217 | (e.g. for hyperprivops) */ | ||
| 218 | |||
| 219 | /* itc paravirtualization | ||
| 220 | * vAR.ITC = mAR.ITC + itc_offset | ||
| 221 | * itc_last is one which was lastly passed to | ||
| 222 | * the guest OS in order to prevent it from | ||
| 223 | * going backwords. | ||
| 224 | */ | ||
| 225 | unsigned long itc_offset; | ||
| 226 | unsigned long itc_last; | ||
| 227 | }; | ||
| 228 | }; | ||
| 229 | }; | ||
| 230 | |||
| 231 | struct arch_vcpu_info { | ||
| 232 | /* nothing */ | ||
| 233 | }; | ||
| 234 | |||
| 235 | /* | ||
| 236 | * This structure is used for magic page in domain pseudo physical address | ||
| 237 | * space and the result of XENMEM_machine_memory_map. | ||
| 238 | * As the XENMEM_machine_memory_map result, | ||
| 239 | * xen_memory_map::nr_entries indicates the size in bytes | ||
| 240 | * including struct xen_ia64_memmap_info. Not the number of entries. | ||
| 241 | */ | ||
| 242 | struct xen_ia64_memmap_info { | ||
| 243 | uint64_t efi_memmap_size; /* size of EFI memory map */ | ||
| 244 | uint64_t efi_memdesc_size; /* size of an EFI memory map | ||
| 245 | * descriptor */ | ||
| 246 | uint32_t efi_memdesc_version; /* memory descriptor version */ | ||
| 247 | void *memdesc[0]; /* array of efi_memory_desc_t */ | ||
| 248 | }; | ||
| 249 | |||
| 250 | struct arch_shared_info { | ||
| 251 | /* PFN of the start_info page. */ | ||
| 252 | unsigned long start_info_pfn; | ||
| 253 | |||
| 254 | /* Interrupt vector for event channel. */ | ||
| 255 | int evtchn_vector; | ||
| 256 | |||
| 257 | /* PFN of memmap_info page */ | ||
| 258 | unsigned int memmap_info_num_pages; /* currently only = 1 case is | ||
| 259 | supported. */ | ||
| 260 | unsigned long memmap_info_pfn; | ||
| 261 | |||
| 262 | uint64_t pad[31]; | ||
| 263 | }; | ||
| 264 | |||
| 265 | struct xen_callback { | ||
| 266 | unsigned long ip; | ||
| 267 | }; | ||
| 268 | typedef struct xen_callback xen_callback_t; | ||
| 269 | |||
| 270 | #endif /* !__ASSEMBLY__ */ | ||
| 271 | |||
| 272 | #include <asm/pvclock-abi.h> | ||
| 273 | |||
| 274 | /* Size of the shared_info area (this is not related to page size). */ | ||
| 275 | #define XSI_SHIFT 14 | ||
| 276 | #define XSI_SIZE (1 << XSI_SHIFT) | ||
| 277 | /* Log size of mapped_regs area (64 KB - only 4KB is used). */ | ||
| 278 | #define XMAPPEDREGS_SHIFT 12 | ||
| 279 | #define XMAPPEDREGS_SIZE (1 << XMAPPEDREGS_SHIFT) | ||
| 280 | /* Offset of XASI (Xen arch shared info) wrt XSI_BASE. */ | ||
| 281 | #define XMAPPEDREGS_OFS XSI_SIZE | ||
| 282 | |||
| 283 | /* Hyperprivops. */ | ||
| 284 | #define HYPERPRIVOP_START 0x1 | ||
| 285 | #define HYPERPRIVOP_RFI (HYPERPRIVOP_START + 0x0) | ||
| 286 | #define HYPERPRIVOP_RSM_DT (HYPERPRIVOP_START + 0x1) | ||
| 287 | #define HYPERPRIVOP_SSM_DT (HYPERPRIVOP_START + 0x2) | ||
| 288 | #define HYPERPRIVOP_COVER (HYPERPRIVOP_START + 0x3) | ||
| 289 | #define HYPERPRIVOP_ITC_D (HYPERPRIVOP_START + 0x4) | ||
| 290 | #define HYPERPRIVOP_ITC_I (HYPERPRIVOP_START + 0x5) | ||
| 291 | #define HYPERPRIVOP_SSM_I (HYPERPRIVOP_START + 0x6) | ||
| 292 | #define HYPERPRIVOP_GET_IVR (HYPERPRIVOP_START + 0x7) | ||
| 293 | #define HYPERPRIVOP_GET_TPR (HYPERPRIVOP_START + 0x8) | ||
| 294 | #define HYPERPRIVOP_SET_TPR (HYPERPRIVOP_START + 0x9) | ||
| 295 | #define HYPERPRIVOP_EOI (HYPERPRIVOP_START + 0xa) | ||
| 296 | #define HYPERPRIVOP_SET_ITM (HYPERPRIVOP_START + 0xb) | ||
| 297 | #define HYPERPRIVOP_THASH (HYPERPRIVOP_START + 0xc) | ||
| 298 | #define HYPERPRIVOP_PTC_GA (HYPERPRIVOP_START + 0xd) | ||
| 299 | #define HYPERPRIVOP_ITR_D (HYPERPRIVOP_START + 0xe) | ||
| 300 | #define HYPERPRIVOP_GET_RR (HYPERPRIVOP_START + 0xf) | ||
| 301 | #define HYPERPRIVOP_SET_RR (HYPERPRIVOP_START + 0x10) | ||
| 302 | #define HYPERPRIVOP_SET_KR (HYPERPRIVOP_START + 0x11) | ||
| 303 | #define HYPERPRIVOP_FC (HYPERPRIVOP_START + 0x12) | ||
| 304 | #define HYPERPRIVOP_GET_CPUID (HYPERPRIVOP_START + 0x13) | ||
| 305 | #define HYPERPRIVOP_GET_PMD (HYPERPRIVOP_START + 0x14) | ||
| 306 | #define HYPERPRIVOP_GET_EFLAG (HYPERPRIVOP_START + 0x15) | ||
| 307 | #define HYPERPRIVOP_SET_EFLAG (HYPERPRIVOP_START + 0x16) | ||
| 308 | #define HYPERPRIVOP_RSM_BE (HYPERPRIVOP_START + 0x17) | ||
| 309 | #define HYPERPRIVOP_GET_PSR (HYPERPRIVOP_START + 0x18) | ||
| 310 | #define HYPERPRIVOP_SET_RR0_TO_RR4 (HYPERPRIVOP_START + 0x19) | ||
| 311 | #define HYPERPRIVOP_MAX (0x1a) | ||
| 312 | |||
| 313 | /* Fast and light hypercalls. */ | ||
| 314 | #define __HYPERVISOR_ia64_fast_eoi __HYPERVISOR_arch_1 | ||
| 315 | |||
| 316 | /* Xencomm macros. */ | ||
| 317 | #define XENCOMM_INLINE_MASK 0xf800000000000000UL | ||
| 318 | #define XENCOMM_INLINE_FLAG 0x8000000000000000UL | ||
| 319 | |||
| 320 | #ifndef __ASSEMBLY__ | ||
| 321 | |||
| 322 | /* | ||
| 323 | * Optimization features. | ||
| 324 | * The hypervisor may do some special optimizations for guests. This hypercall | ||
| 325 | * can be used to switch on/of these special optimizations. | ||
| 326 | */ | ||
| 327 | #define __HYPERVISOR_opt_feature 0x700UL | ||
| 328 | |||
| 329 | #define XEN_IA64_OPTF_OFF 0x0 | ||
| 330 | #define XEN_IA64_OPTF_ON 0x1 | ||
| 331 | |||
| 332 | /* | ||
| 333 | * If this feature is switched on, the hypervisor inserts the | ||
| 334 | * tlb entries without calling the guests traphandler. | ||
| 335 | * This is useful in guests using region 7 for identity mapping | ||
| 336 | * like the linux kernel does. | ||
| 337 | */ | ||
| 338 | #define XEN_IA64_OPTF_IDENT_MAP_REG7 1 | ||
| 339 | |||
| 340 | /* Identity mapping of region 4 addresses in HVM. */ | ||
| 341 | #define XEN_IA64_OPTF_IDENT_MAP_REG4 2 | ||
| 342 | |||
| 343 | /* Identity mapping of region 5 addresses in HVM. */ | ||
| 344 | #define XEN_IA64_OPTF_IDENT_MAP_REG5 3 | ||
| 345 | |||
| 346 | #define XEN_IA64_OPTF_IDENT_MAP_NOT_SET (0) | ||
| 347 | |||
| 348 | struct xen_ia64_opt_feature { | ||
| 349 | unsigned long cmd; /* Which feature */ | ||
| 350 | unsigned char on; /* Switch feature on/off */ | ||
| 351 | union { | ||
| 352 | struct { | ||
| 353 | /* The page protection bit mask of the pte. | ||
| 354 | * This will be or'ed with the pte. */ | ||
| 355 | unsigned long pgprot; | ||
| 356 | unsigned long key; /* A protection key for itir.*/ | ||
| 357 | }; | ||
| 358 | }; | ||
| 359 | }; | ||
| 360 | |||
| 361 | #endif /* __ASSEMBLY__ */ | ||
| 362 | |||
| 363 | #endif /* _ASM_IA64_XEN_INTERFACE_H */ | ||
diff --git a/arch/ia64/include/asm/xen/irq.h b/arch/ia64/include/asm/xen/irq.h deleted file mode 100644 index a90450983003..000000000000 --- a/arch/ia64/include/asm/xen/irq.h +++ /dev/null | |||
| @@ -1,44 +0,0 @@ | |||
| 1 | /****************************************************************************** | ||
| 2 | * arch/ia64/include/asm/xen/irq.h | ||
| 3 | * | ||
| 4 | * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp> | ||
| 5 | * VA Linux Systems Japan K.K. | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | * | ||
| 12 | * This program is distributed in the hope that it will be useful, | ||
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 15 | * GNU General Public License for more details. | ||
| 16 | * | ||
| 17 | * You should have received a copy of the GNU General Public License | ||
| 18 | * along with this program; if not, write to the Free Software | ||
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 20 | * | ||
| 21 | */ | ||
| 22 | |||
| 23 | #ifndef _ASM_IA64_XEN_IRQ_H | ||
| 24 | #define _ASM_IA64_XEN_IRQ_H | ||
| 25 | |||
| 26 | /* | ||
| 27 | * The flat IRQ space is divided into two regions: | ||
| 28 | * 1. A one-to-one mapping of real physical IRQs. This space is only used | ||
| 29 | * if we have physical device-access privilege. This region is at the | ||
| 30 | * start of the IRQ space so that existing device drivers do not need | ||
| 31 | * to be modified to translate physical IRQ numbers into our IRQ space. | ||
| 32 | * 3. A dynamic mapping of inter-domain and Xen-sourced virtual IRQs. These | ||
| 33 | * are bound using the provided bind/unbind functions. | ||
| 34 | */ | ||
| 35 | |||
| 36 | #define XEN_PIRQ_BASE 0 | ||
| 37 | #define XEN_NR_PIRQS 256 | ||
| 38 | |||
| 39 | #define XEN_DYNIRQ_BASE (XEN_PIRQ_BASE + XEN_NR_PIRQS) | ||
| 40 | #define XEN_NR_DYNIRQS (NR_CPUS * 8) | ||
| 41 | |||
| 42 | #define XEN_NR_IRQS (XEN_NR_PIRQS + XEN_NR_DYNIRQS) | ||
| 43 | |||
| 44 | #endif /* _ASM_IA64_XEN_IRQ_H */ | ||
diff --git a/arch/ia64/include/asm/xen/minstate.h b/arch/ia64/include/asm/xen/minstate.h deleted file mode 100644 index 00cf03e0cb82..000000000000 --- a/arch/ia64/include/asm/xen/minstate.h +++ /dev/null | |||
| @@ -1,143 +0,0 @@ | |||
| 1 | |||
| 2 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE | ||
| 3 | /* read ar.itc in advance, and use it before leaving bank 0 */ | ||
| 4 | #define XEN_ACCOUNT_GET_STAMP \ | ||
| 5 | MOV_FROM_ITC(pUStk, p6, r20, r2); | ||
| 6 | #else | ||
| 7 | #define XEN_ACCOUNT_GET_STAMP | ||
| 8 | #endif | ||
| 9 | |||
| 10 | /* | ||
| 11 | * DO_SAVE_MIN switches to the kernel stacks (if necessary) and saves | ||
| 12 | * the minimum state necessary that allows us to turn psr.ic back | ||
| 13 | * on. | ||
| 14 | * | ||
| 15 | * Assumed state upon entry: | ||
| 16 | * psr.ic: off | ||
| 17 | * r31: contains saved predicates (pr) | ||
| 18 | * | ||
| 19 | * Upon exit, the state is as follows: | ||
| 20 | * psr.ic: off | ||
| 21 | * r2 = points to &pt_regs.r16 | ||
| 22 | * r8 = contents of ar.ccv | ||
| 23 | * r9 = contents of ar.csd | ||
| 24 | * r10 = contents of ar.ssd | ||
| 25 | * r11 = FPSR_DEFAULT | ||
| 26 | * r12 = kernel sp (kernel virtual address) | ||
| 27 | * r13 = points to current task_struct (kernel virtual address) | ||
| 28 | * p15 = TRUE if psr.i is set in cr.ipsr | ||
| 29 | * predicate registers (other than p2, p3, and p15), b6, r3, r14, r15: | ||
| 30 | * preserved | ||
| 31 | * CONFIG_XEN note: p6/p7 are not preserved | ||
| 32 | * | ||
| 33 | * Note that psr.ic is NOT turned on by this macro. This is so that | ||
| 34 | * we can pass interruption state as arguments to a handler. | ||
| 35 | */ | ||
| 36 | #define XEN_DO_SAVE_MIN(__COVER,SAVE_IFS,EXTRA,WORKAROUND) \ | ||
| 37 | mov r16=IA64_KR(CURRENT); /* M */ \ | ||
| 38 | mov r27=ar.rsc; /* M */ \ | ||
| 39 | mov r20=r1; /* A */ \ | ||
| 40 | mov r25=ar.unat; /* M */ \ | ||
| 41 | MOV_FROM_IPSR(p0,r29); /* M */ \ | ||
| 42 | MOV_FROM_IIP(r28); /* M */ \ | ||
| 43 | mov r21=ar.fpsr; /* M */ \ | ||
| 44 | mov r26=ar.pfs; /* I */ \ | ||
| 45 | __COVER; /* B;; (or nothing) */ \ | ||
| 46 | adds r16=IA64_TASK_THREAD_ON_USTACK_OFFSET,r16; \ | ||
| 47 | ;; \ | ||
| 48 | ld1 r17=[r16]; /* load current->thread.on_ustack flag */ \ | ||
| 49 | st1 [r16]=r0; /* clear current->thread.on_ustack flag */ \ | ||
| 50 | adds r1=-IA64_TASK_THREAD_ON_USTACK_OFFSET,r16 \ | ||
| 51 | /* switch from user to kernel RBS: */ \ | ||
| 52 | ;; \ | ||
| 53 | invala; /* M */ \ | ||
| 54 | /* SAVE_IFS;*/ /* see xen special handling below */ \ | ||
| 55 | cmp.eq pKStk,pUStk=r0,r17; /* are we in kernel mode already? */ \ | ||
| 56 | ;; \ | ||
| 57 | (pUStk) mov ar.rsc=0; /* set enforced lazy mode, pl 0, little-endian, loadrs=0 */ \ | ||
| 58 | ;; \ | ||
| 59 | (pUStk) mov.m r24=ar.rnat; \ | ||
| 60 | (pUStk) addl r22=IA64_RBS_OFFSET,r1; /* compute base of RBS */ \ | ||
| 61 | (pKStk) mov r1=sp; /* get sp */ \ | ||
| 62 | ;; \ | ||
| 63 | (pUStk) lfetch.fault.excl.nt1 [r22]; \ | ||
| 64 | (pUStk) addl r1=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r1; /* compute base of memory stack */ \ | ||
| 65 | (pUStk) mov r23=ar.bspstore; /* save ar.bspstore */ \ | ||
| 66 | ;; \ | ||
| 67 | (pUStk) mov ar.bspstore=r22; /* switch to kernel RBS */ \ | ||
| 68 | (pKStk) addl r1=-IA64_PT_REGS_SIZE,r1; /* if in kernel mode, use sp (r12) */ \ | ||
| 69 | ;; \ | ||
| 70 | (pUStk) mov r18=ar.bsp; \ | ||
| 71 | (pUStk) mov ar.rsc=0x3; /* set eager mode, pl 0, little-endian, loadrs=0 */ \ | ||
| 72 | adds r17=2*L1_CACHE_BYTES,r1; /* really: biggest cache-line size */ \ | ||
| 73 | adds r16=PT(CR_IPSR),r1; \ | ||
| 74 | ;; \ | ||
| 75 | lfetch.fault.excl.nt1 [r17],L1_CACHE_BYTES; \ | ||
| 76 | st8 [r16]=r29; /* save cr.ipsr */ \ | ||
| 77 | ;; \ | ||
| 78 | lfetch.fault.excl.nt1 [r17]; \ | ||
| 79 | tbit.nz p15,p0=r29,IA64_PSR_I_BIT; \ | ||
| 80 | mov r29=b0 \ | ||
| 81 | ;; \ | ||
| 82 | WORKAROUND; \ | ||
| 83 | adds r16=PT(R8),r1; /* initialize first base pointer */ \ | ||
| 84 | adds r17=PT(R9),r1; /* initialize second base pointer */ \ | ||
| 85 | (pKStk) mov r18=r0; /* make sure r18 isn't NaT */ \ | ||
| 86 | ;; \ | ||
| 87 | .mem.offset 0,0; st8.spill [r16]=r8,16; \ | ||
| 88 | .mem.offset 8,0; st8.spill [r17]=r9,16; \ | ||
| 89 | ;; \ | ||
| 90 | .mem.offset 0,0; st8.spill [r16]=r10,24; \ | ||
| 91 | movl r8=XSI_PRECOVER_IFS; \ | ||
| 92 | .mem.offset 8,0; st8.spill [r17]=r11,24; \ | ||
| 93 | ;; \ | ||
| 94 | /* xen special handling for possibly lazy cover */ \ | ||
| 95 | /* SAVE_MIN case in dispatch_ia32_handler: mov r30=r0 */ \ | ||
| 96 | ld8 r30=[r8]; \ | ||
| 97 | (pUStk) sub r18=r18,r22; /* r18=RSE.ndirty*8 */ \ | ||
| 98 | st8 [r16]=r28,16; /* save cr.iip */ \ | ||
| 99 | ;; \ | ||
| 100 | st8 [r17]=r30,16; /* save cr.ifs */ \ | ||
| 101 | mov r8=ar.ccv; \ | ||
| 102 | mov r9=ar.csd; \ | ||
| 103 | mov r10=ar.ssd; \ | ||
| 104 | movl r11=FPSR_DEFAULT; /* L-unit */ \ | ||
| 105 | ;; \ | ||
| 106 | st8 [r16]=r25,16; /* save ar.unat */ \ | ||
| 107 | st8 [r17]=r26,16; /* save ar.pfs */ \ | ||
| 108 | shl r18=r18,16; /* compute ar.rsc to be used for "loadrs" */ \ | ||
| 109 | ;; \ | ||
| 110 | st8 [r16]=r27,16; /* save ar.rsc */ \ | ||
| 111 | (pUStk) st8 [r17]=r24,16; /* save ar.rnat */ \ | ||
| 112 | (pKStk) adds r17=16,r17; /* skip over ar_rnat field */ \ | ||
| 113 | ;; /* avoid RAW on r16 & r17 */ \ | ||
| 114 | (pUStk) st8 [r16]=r23,16; /* save ar.bspstore */ \ | ||
| 115 | st8 [r17]=r31,16; /* save predicates */ \ | ||
| 116 | (pKStk) adds r16=16,r16; /* skip over ar_bspstore field */ \ | ||
| 117 | ;; \ | ||
| 118 | st8 [r16]=r29,16; /* save b0 */ \ | ||
| 119 | st8 [r17]=r18,16; /* save ar.rsc value for "loadrs" */ \ | ||
| 120 | cmp.eq pNonSys,pSys=r0,r0 /* initialize pSys=0, pNonSys=1 */ \ | ||
| 121 | ;; \ | ||
| 122 | .mem.offset 0,0; st8.spill [r16]=r20,16; /* save original r1 */ \ | ||
| 123 | .mem.offset 8,0; st8.spill [r17]=r12,16; \ | ||
| 124 | adds r12=-16,r1; /* switch to kernel memory stack (with 16 bytes of scratch) */ \ | ||
| 125 | ;; \ | ||
| 126 | .mem.offset 0,0; st8.spill [r16]=r13,16; \ | ||
| 127 | .mem.offset 8,0; st8.spill [r17]=r21,16; /* save ar.fpsr */ \ | ||
| 128 | mov r13=IA64_KR(CURRENT); /* establish `current' */ \ | ||
| 129 | ;; \ | ||
| 130 | .mem.offset 0,0; st8.spill [r16]=r15,16; \ | ||
| 131 | .mem.offset 8,0; st8.spill [r17]=r14,16; \ | ||
| 132 | ;; \ | ||
| 133 | .mem.offset 0,0; st8.spill [r16]=r2,16; \ | ||
| 134 | .mem.offset 8,0; st8.spill [r17]=r3,16; \ | ||
| 135 | XEN_ACCOUNT_GET_STAMP \ | ||
| 136 | adds r2=IA64_PT_REGS_R16_OFFSET,r1; \ | ||
| 137 | ;; \ | ||
| 138 | EXTRA; \ | ||
| 139 | movl r1=__gp; /* establish kernel global pointer */ \ | ||
| 140 | ;; \ | ||
| 141 | ACCOUNT_SYS_ENTER \ | ||
| 142 | BSW_1(r3,r14); /* switch back to bank 1 (must be last in insn group) */ \ | ||
| 143 | ;; | ||
diff --git a/arch/ia64/include/asm/xen/page-coherent.h b/arch/ia64/include/asm/xen/page-coherent.h deleted file mode 100644 index 96e42f97fa1f..000000000000 --- a/arch/ia64/include/asm/xen/page-coherent.h +++ /dev/null | |||
| @@ -1,38 +0,0 @@ | |||
| 1 | #ifndef _ASM_IA64_XEN_PAGE_COHERENT_H | ||
| 2 | #define _ASM_IA64_XEN_PAGE_COHERENT_H | ||
| 3 | |||
| 4 | #include <asm/page.h> | ||
| 5 | #include <linux/dma-attrs.h> | ||
| 6 | #include <linux/dma-mapping.h> | ||
| 7 | |||
| 8 | static inline void *xen_alloc_coherent_pages(struct device *hwdev, size_t size, | ||
| 9 | dma_addr_t *dma_handle, gfp_t flags, | ||
| 10 | struct dma_attrs *attrs) | ||
| 11 | { | ||
| 12 | void *vstart = (void*)__get_free_pages(flags, get_order(size)); | ||
| 13 | *dma_handle = virt_to_phys(vstart); | ||
| 14 | return vstart; | ||
| 15 | } | ||
| 16 | |||
| 17 | static inline void xen_free_coherent_pages(struct device *hwdev, size_t size, | ||
| 18 | void *cpu_addr, dma_addr_t dma_handle, | ||
| 19 | struct dma_attrs *attrs) | ||
| 20 | { | ||
| 21 | free_pages((unsigned long) cpu_addr, get_order(size)); | ||
| 22 | } | ||
| 23 | |||
| 24 | static inline void xen_dma_map_page(struct device *hwdev, struct page *page, | ||
| 25 | unsigned long offset, size_t size, enum dma_data_direction dir, | ||
| 26 | struct dma_attrs *attrs) { } | ||
| 27 | |||
| 28 | static inline void xen_dma_unmap_page(struct device *hwdev, dma_addr_t handle, | ||
| 29 | size_t size, enum dma_data_direction dir, | ||
| 30 | struct dma_attrs *attrs) { } | ||
| 31 | |||
| 32 | static inline void xen_dma_sync_single_for_cpu(struct device *hwdev, | ||
| 33 | dma_addr_t handle, size_t size, enum dma_data_direction dir) { } | ||
| 34 | |||
| 35 | static inline void xen_dma_sync_single_for_device(struct device *hwdev, | ||
| 36 | dma_addr_t handle, size_t size, enum dma_data_direction dir) { } | ||
| 37 | |||
| 38 | #endif /* _ASM_IA64_XEN_PAGE_COHERENT_H */ | ||
diff --git a/arch/ia64/include/asm/xen/page.h b/arch/ia64/include/asm/xen/page.h deleted file mode 100644 index 03441a780b5b..000000000000 --- a/arch/ia64/include/asm/xen/page.h +++ /dev/null | |||
| @@ -1,65 +0,0 @@ | |||
| 1 | /****************************************************************************** | ||
| 2 | * arch/ia64/include/asm/xen/page.h | ||
| 3 | * | ||
| 4 | * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp> | ||
| 5 | * VA Linux Systems Japan K.K. | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | * | ||
| 12 | * This program is distributed in the hope that it will be useful, | ||
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 15 | * GNU General Public License for more details. | ||
| 16 | * | ||
| 17 | * You should have received a copy of the GNU General Public License | ||
| 18 | * along with this program; if not, write to the Free Software | ||
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 20 | * | ||
| 21 | */ | ||
| 22 | |||
| 23 | #ifndef _ASM_IA64_XEN_PAGE_H | ||
| 24 | #define _ASM_IA64_XEN_PAGE_H | ||
| 25 | |||
| 26 | #define INVALID_P2M_ENTRY (~0UL) | ||
| 27 | |||
| 28 | static inline unsigned long mfn_to_pfn(unsigned long mfn) | ||
| 29 | { | ||
| 30 | return mfn; | ||
| 31 | } | ||
| 32 | |||
| 33 | static inline unsigned long pfn_to_mfn(unsigned long pfn) | ||
| 34 | { | ||
| 35 | return pfn; | ||
| 36 | } | ||
| 37 | |||
| 38 | #define phys_to_machine_mapping_valid(_x) (1) | ||
| 39 | |||
| 40 | static inline void *mfn_to_virt(unsigned long mfn) | ||
| 41 | { | ||
| 42 | return __va(mfn << PAGE_SHIFT); | ||
| 43 | } | ||
| 44 | |||
| 45 | static inline unsigned long virt_to_mfn(void *virt) | ||
| 46 | { | ||
| 47 | return __pa(virt) >> PAGE_SHIFT; | ||
| 48 | } | ||
| 49 | |||
| 50 | /* for tpmfront.c */ | ||
| 51 | static inline unsigned long virt_to_machine(void *virt) | ||
| 52 | { | ||
| 53 | return __pa(virt); | ||
| 54 | } | ||
| 55 | |||
| 56 | static inline void set_phys_to_machine(unsigned long pfn, unsigned long mfn) | ||
| 57 | { | ||
| 58 | /* nothing */ | ||
| 59 | } | ||
| 60 | |||
| 61 | #define pte_mfn(_x) pte_pfn(_x) | ||
| 62 | #define mfn_pte(_x, _y) __pte_ma(0) /* unmodified use */ | ||
| 63 | #define __pte_ma(_x) ((pte_t) {(_x)}) /* unmodified use */ | ||
| 64 | |||
| 65 | #endif /* _ASM_IA64_XEN_PAGE_H */ | ||
diff --git a/arch/ia64/include/asm/xen/patchlist.h b/arch/ia64/include/asm/xen/patchlist.h deleted file mode 100644 index eae944e88846..000000000000 --- a/arch/ia64/include/asm/xen/patchlist.h +++ /dev/null | |||
| @@ -1,38 +0,0 @@ | |||
| 1 | /****************************************************************************** | ||
| 2 | * arch/ia64/include/asm/xen/patchlist.h | ||
| 3 | * | ||
| 4 | * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp> | ||
| 5 | * VA Linux Systems Japan K.K. | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | * | ||
| 12 | * This program is distributed in the hope that it will be useful, | ||
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 15 | * GNU General Public License for more details. | ||
| 16 | * | ||
| 17 | * You should have received a copy of the GNU General Public License | ||
| 18 | * along with this program; if not, write to the Free Software | ||
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 20 | * | ||
| 21 | */ | ||
| 22 | |||
| 23 | #define __paravirt_start_gate_fsyscall_patchlist \ | ||
| 24 | __xen_start_gate_fsyscall_patchlist | ||
| 25 | #define __paravirt_end_gate_fsyscall_patchlist \ | ||
| 26 | __xen_end_gate_fsyscall_patchlist | ||
| 27 | #define __paravirt_start_gate_brl_fsys_bubble_down_patchlist \ | ||
| 28 | __xen_start_gate_brl_fsys_bubble_down_patchlist | ||
| 29 | #define __paravirt_end_gate_brl_fsys_bubble_down_patchlist \ | ||
| 30 | __xen_end_gate_brl_fsys_bubble_down_patchlist | ||
| 31 | #define __paravirt_start_gate_vtop_patchlist \ | ||
| 32 | __xen_start_gate_vtop_patchlist | ||
| 33 | #define __paravirt_end_gate_vtop_patchlist \ | ||
| 34 | __xen_end_gate_vtop_patchlist | ||
| 35 | #define __paravirt_start_gate_mckinley_e9_patchlist \ | ||
| 36 | __xen_start_gate_mckinley_e9_patchlist | ||
| 37 | #define __paravirt_end_gate_mckinley_e9_patchlist \ | ||
| 38 | __xen_end_gate_mckinley_e9_patchlist | ||
diff --git a/arch/ia64/include/asm/xen/privop.h b/arch/ia64/include/asm/xen/privop.h deleted file mode 100644 index fb4ec5e0b066..000000000000 --- a/arch/ia64/include/asm/xen/privop.h +++ /dev/null | |||
| @@ -1,135 +0,0 @@ | |||
| 1 | #ifndef _ASM_IA64_XEN_PRIVOP_H | ||
| 2 | #define _ASM_IA64_XEN_PRIVOP_H | ||
| 3 | |||
| 4 | /* | ||
| 5 | * Copyright (C) 2005 Hewlett-Packard Co | ||
| 6 | * Dan Magenheimer <dan.magenheimer@hp.com> | ||
| 7 | * | ||
| 8 | * Paravirtualizations of privileged operations for Xen/ia64 | ||
| 9 | * | ||
| 10 | * | ||
| 11 | * inline privop and paravirt_alt support | ||
| 12 | * Copyright (c) 2007 Isaku Yamahata <yamahata at valinux co jp> | ||
| 13 | * VA Linux Systems Japan K.K. | ||
| 14 | * | ||
| 15 | */ | ||
| 16 | |||
| 17 | #ifndef __ASSEMBLY__ | ||
| 18 | #include <linux/types.h> /* arch-ia64.h requires uint64_t */ | ||
| 19 | #endif | ||
| 20 | #include <asm/xen/interface.h> | ||
| 21 | |||
| 22 | /* At 1 MB, before per-cpu space but still addressable using addl instead | ||
| 23 | of movl. */ | ||
| 24 | #define XSI_BASE 0xfffffffffff00000 | ||
| 25 | |||
| 26 | /* Address of mapped regs. */ | ||
| 27 | #define XMAPPEDREGS_BASE (XSI_BASE + XSI_SIZE) | ||
| 28 | |||
| 29 | #ifdef __ASSEMBLY__ | ||
| 30 | #define XEN_HYPER_RFI break HYPERPRIVOP_RFI | ||
| 31 | #define XEN_HYPER_RSM_PSR_DT break HYPERPRIVOP_RSM_DT | ||
| 32 | #define XEN_HYPER_SSM_PSR_DT break HYPERPRIVOP_SSM_DT | ||
| 33 | #define XEN_HYPER_COVER break HYPERPRIVOP_COVER | ||
| 34 | #define XEN_HYPER_ITC_D break HYPERPRIVOP_ITC_D | ||
| 35 | #define XEN_HYPER_ITC_I break HYPERPRIVOP_ITC_I | ||
| 36 | #define XEN_HYPER_SSM_I break HYPERPRIVOP_SSM_I | ||
| 37 | #define XEN_HYPER_GET_IVR break HYPERPRIVOP_GET_IVR | ||
| 38 | #define XEN_HYPER_THASH break HYPERPRIVOP_THASH | ||
| 39 | #define XEN_HYPER_ITR_D break HYPERPRIVOP_ITR_D | ||
| 40 | #define XEN_HYPER_SET_KR break HYPERPRIVOP_SET_KR | ||
| 41 | #define XEN_HYPER_GET_PSR break HYPERPRIVOP_GET_PSR | ||
| 42 | #define XEN_HYPER_SET_RR0_TO_RR4 break HYPERPRIVOP_SET_RR0_TO_RR4 | ||
| 43 | |||
| 44 | #define XSI_IFS (XSI_BASE + XSI_IFS_OFS) | ||
| 45 | #define XSI_PRECOVER_IFS (XSI_BASE + XSI_PRECOVER_IFS_OFS) | ||
| 46 | #define XSI_IFA (XSI_BASE + XSI_IFA_OFS) | ||
| 47 | #define XSI_ISR (XSI_BASE + XSI_ISR_OFS) | ||
| 48 | #define XSI_IIM (XSI_BASE + XSI_IIM_OFS) | ||
| 49 | #define XSI_ITIR (XSI_BASE + XSI_ITIR_OFS) | ||
| 50 | #define XSI_PSR_I_ADDR (XSI_BASE + XSI_PSR_I_ADDR_OFS) | ||
| 51 | #define XSI_PSR_IC (XSI_BASE + XSI_PSR_IC_OFS) | ||
| 52 | #define XSI_IPSR (XSI_BASE + XSI_IPSR_OFS) | ||
| 53 | #define XSI_IIP (XSI_BASE + XSI_IIP_OFS) | ||
| 54 | #define XSI_B1NAT (XSI_BASE + XSI_B1NATS_OFS) | ||
| 55 | #define XSI_BANK1_R16 (XSI_BASE + XSI_BANK1_R16_OFS) | ||
| 56 | #define XSI_BANKNUM (XSI_BASE + XSI_BANKNUM_OFS) | ||
| 57 | #define XSI_IHA (XSI_BASE + XSI_IHA_OFS) | ||
| 58 | #define XSI_ITC_OFFSET (XSI_BASE + XSI_ITC_OFFSET_OFS) | ||
| 59 | #define XSI_ITC_LAST (XSI_BASE + XSI_ITC_LAST_OFS) | ||
| 60 | #endif | ||
| 61 | |||
| 62 | #ifndef __ASSEMBLY__ | ||
| 63 | |||
| 64 | /************************************************/ | ||
| 65 | /* Instructions paravirtualized for correctness */ | ||
| 66 | /************************************************/ | ||
| 67 | |||
| 68 | /* "fc" and "thash" are privilege-sensitive instructions, meaning they | ||
| 69 | * may have different semantics depending on whether they are executed | ||
| 70 | * at PL0 vs PL!=0. When paravirtualized, these instructions mustn't | ||
| 71 | * be allowed to execute directly, lest incorrect semantics result. */ | ||
| 72 | extern void xen_fc(void *addr); | ||
| 73 | extern unsigned long xen_thash(unsigned long addr); | ||
| 74 | |||
| 75 | /* Note that "ttag" and "cover" are also privilege-sensitive; "ttag" | ||
| 76 | * is not currently used (though it may be in a long-format VHPT system!) | ||
| 77 | * and the semantics of cover only change if psr.ic is off which is very | ||
| 78 | * rare (and currently non-existent outside of assembly code */ | ||
| 79 | |||
| 80 | /* There are also privilege-sensitive registers. These registers are | ||
| 81 | * readable at any privilege level but only writable at PL0. */ | ||
| 82 | extern unsigned long xen_get_cpuid(int index); | ||
| 83 | extern unsigned long xen_get_pmd(int index); | ||
| 84 | |||
| 85 | #ifndef ASM_SUPPORTED | ||
| 86 | extern unsigned long xen_get_eflag(void); /* see xen_ia64_getreg */ | ||
| 87 | extern void xen_set_eflag(unsigned long); /* see xen_ia64_setreg */ | ||
| 88 | #endif | ||
| 89 | |||
| 90 | /************************************************/ | ||
| 91 | /* Instructions paravirtualized for performance */ | ||
| 92 | /************************************************/ | ||
| 93 | |||
| 94 | /* Xen uses memory-mapped virtual privileged registers for access to many | ||
| 95 | * performance-sensitive privileged registers. Some, like the processor | ||
| 96 | * status register (psr), are broken up into multiple memory locations. | ||
| 97 | * Others, like "pend", are abstractions based on privileged registers. | ||
| 98 | * "Pend" is guaranteed to be set if reading cr.ivr would return a | ||
| 99 | * (non-spurious) interrupt. */ | ||
| 100 | #define XEN_MAPPEDREGS ((struct mapped_regs *)XMAPPEDREGS_BASE) | ||
| 101 | |||
| 102 | #define XSI_PSR_I \ | ||
| 103 | (*XEN_MAPPEDREGS->interrupt_mask_addr) | ||
| 104 | #define xen_get_virtual_psr_i() \ | ||
| 105 | (!XSI_PSR_I) | ||
| 106 | #define xen_set_virtual_psr_i(_val) \ | ||
| 107 | ({ XSI_PSR_I = (uint8_t)(_val) ? 0 : 1; }) | ||
| 108 | #define xen_set_virtual_psr_ic(_val) \ | ||
| 109 | ({ XEN_MAPPEDREGS->interrupt_collection_enabled = _val ? 1 : 0; }) | ||
| 110 | #define xen_get_virtual_pend() \ | ||
| 111 | (*(((uint8_t *)XEN_MAPPEDREGS->interrupt_mask_addr) - 1)) | ||
| 112 | |||
| 113 | #ifndef ASM_SUPPORTED | ||
| 114 | /* Although all privileged operations can be left to trap and will | ||
| 115 | * be properly handled by Xen, some are frequent enough that we use | ||
| 116 | * hyperprivops for performance. */ | ||
| 117 | extern unsigned long xen_get_psr(void); | ||
| 118 | extern unsigned long xen_get_ivr(void); | ||
| 119 | extern unsigned long xen_get_tpr(void); | ||
| 120 | extern void xen_hyper_ssm_i(void); | ||
| 121 | extern void xen_set_itm(unsigned long); | ||
| 122 | extern void xen_set_tpr(unsigned long); | ||
| 123 | extern void xen_eoi(unsigned long); | ||
| 124 | extern unsigned long xen_get_rr(unsigned long index); | ||
| 125 | extern void xen_set_rr(unsigned long index, unsigned long val); | ||
| 126 | extern void xen_set_rr0_to_rr4(unsigned long val0, unsigned long val1, | ||
| 127 | unsigned long val2, unsigned long val3, | ||
| 128 | unsigned long val4); | ||
| 129 | extern void xen_set_kr(unsigned long index, unsigned long val); | ||
| 130 | extern void xen_ptcga(unsigned long addr, unsigned long size); | ||
| 131 | #endif /* !ASM_SUPPORTED */ | ||
| 132 | |||
| 133 | #endif /* !__ASSEMBLY__ */ | ||
| 134 | |||
| 135 | #endif /* _ASM_IA64_XEN_PRIVOP_H */ | ||
diff --git a/arch/ia64/include/asm/xen/xcom_hcall.h b/arch/ia64/include/asm/xen/xcom_hcall.h deleted file mode 100644 index 20b2950c71b6..000000000000 --- a/arch/ia64/include/asm/xen/xcom_hcall.h +++ /dev/null | |||
| @@ -1,51 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2006 Tristan Gingold <tristan.gingold@bull.net>, Bull SAS | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation; either version 2 of the License, or | ||
| 7 | * (at your option) any later version. | ||
| 8 | * | ||
| 9 | * This program is distributed in the hope that it will be useful, | ||
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 12 | * GNU General Public License for more details. | ||
| 13 | * | ||
| 14 | * You should have received a copy of the GNU General Public License | ||
| 15 | * along with this program; if not, write to the Free Software | ||
| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 17 | */ | ||
| 18 | |||
| 19 | #ifndef _ASM_IA64_XEN_XCOM_HCALL_H | ||
| 20 | #define _ASM_IA64_XEN_XCOM_HCALL_H | ||
| 21 | |||
| 22 | /* These function creates inline or mini descriptor for the parameters and | ||
| 23 | calls the corresponding xencomm_arch_hypercall_X. | ||
| 24 | Architectures should defines HYPERVISOR_xxx as xencomm_hypercall_xxx unless | ||
| 25 | they want to use their own wrapper. */ | ||
| 26 | extern int xencomm_hypercall_console_io(int cmd, int count, char *str); | ||
| 27 | |||
| 28 | extern int xencomm_hypercall_event_channel_op(int cmd, void *op); | ||
| 29 | |||
| 30 | extern int xencomm_hypercall_xen_version(int cmd, void *arg); | ||
| 31 | |||
| 32 | extern int xencomm_hypercall_physdev_op(int cmd, void *op); | ||
| 33 | |||
| 34 | extern int xencomm_hypercall_grant_table_op(unsigned int cmd, void *op, | ||
| 35 | unsigned int count); | ||
| 36 | |||
| 37 | extern int xencomm_hypercall_sched_op(int cmd, void *arg); | ||
| 38 | |||
| 39 | extern int xencomm_hypercall_multicall(void *call_list, int nr_calls); | ||
| 40 | |||
| 41 | extern int xencomm_hypercall_callback_op(int cmd, void *arg); | ||
| 42 | |||
| 43 | extern int xencomm_hypercall_memory_op(unsigned int cmd, void *arg); | ||
| 44 | |||
| 45 | extern int xencomm_hypercall_suspend(unsigned long srec); | ||
| 46 | |||
| 47 | extern long xencomm_hypercall_vcpu_op(int cmd, int cpu, void *arg); | ||
| 48 | |||
| 49 | extern long xencomm_hypercall_opt_feature(void *arg); | ||
| 50 | |||
| 51 | #endif /* _ASM_IA64_XEN_XCOM_HCALL_H */ | ||
diff --git a/arch/ia64/include/asm/xen/xencomm.h b/arch/ia64/include/asm/xen/xencomm.h deleted file mode 100644 index cded677bebf2..000000000000 --- a/arch/ia64/include/asm/xen/xencomm.h +++ /dev/null | |||
| @@ -1,42 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2006 Hollis Blanchard <hollisb@us.ibm.com>, IBM Corporation | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation; either version 2 of the License, or | ||
| 7 | * (at your option) any later version. | ||
| 8 | * | ||
| 9 | * This program is distributed in the hope that it will be useful, | ||
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 12 | * GNU General Public License for more details. | ||
| 13 | * | ||
| 14 | * You should have received a copy of the GNU General Public License | ||
| 15 | * along with this program; if not, write to the Free Software | ||
| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 17 | */ | ||
| 18 | |||
| 19 | #ifndef _ASM_IA64_XEN_XENCOMM_H | ||
| 20 | #define _ASM_IA64_XEN_XENCOMM_H | ||
| 21 | |||
| 22 | #include <xen/xencomm.h> | ||
| 23 | #include <asm/pgtable.h> | ||
| 24 | |||
| 25 | /* Must be called before any hypercall. */ | ||
| 26 | extern void xencomm_initialize(void); | ||
| 27 | extern int xencomm_is_initialized(void); | ||
| 28 | |||
| 29 | /* Check if virtual contiguity means physical contiguity | ||
| 30 | * where the passed address is a pointer value in virtual address. | ||
| 31 | * On ia64, identity mapping area in region 7 or the piece of region 5 | ||
| 32 | * that is mapped by itr[IA64_TR_KERNEL]/dtr[IA64_TR_KERNEL] | ||
| 33 | */ | ||
| 34 | static inline int xencomm_is_phys_contiguous(unsigned long addr) | ||
| 35 | { | ||
| 36 | return (PAGE_OFFSET <= addr && | ||
| 37 | addr < (PAGE_OFFSET + (1UL << IA64_MAX_PHYS_BITS))) || | ||
| 38 | (KERNEL_START <= addr && | ||
| 39 | addr < KERNEL_START + KERNEL_TR_PAGE_SIZE); | ||
| 40 | } | ||
| 41 | |||
| 42 | #endif /* _ASM_IA64_XEN_XENCOMM_H */ | ||
