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Diffstat (limited to 'arch/ia64/include/asm/sn/mspec.h')
-rw-r--r-- | arch/ia64/include/asm/sn/mspec.h | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/arch/ia64/include/asm/sn/mspec.h b/arch/ia64/include/asm/sn/mspec.h new file mode 100644 index 000000000000..c1d3c50c3223 --- /dev/null +++ b/arch/ia64/include/asm/sn/mspec.h | |||
@@ -0,0 +1,59 @@ | |||
1 | /* | ||
2 | * | ||
3 | * This file is subject to the terms and conditions of the GNU General Public | ||
4 | * License. See the file "COPYING" in the main directory of this archive | ||
5 | * for more details. | ||
6 | * | ||
7 | * Copyright (c) 2001-2008 Silicon Graphics, Inc. All rights reserved. | ||
8 | */ | ||
9 | |||
10 | #ifndef _ASM_IA64_SN_MSPEC_H | ||
11 | #define _ASM_IA64_SN_MSPEC_H | ||
12 | |||
13 | #define FETCHOP_VAR_SIZE 64 /* 64 byte per fetchop variable */ | ||
14 | |||
15 | #define FETCHOP_LOAD 0 | ||
16 | #define FETCHOP_INCREMENT 8 | ||
17 | #define FETCHOP_DECREMENT 16 | ||
18 | #define FETCHOP_CLEAR 24 | ||
19 | |||
20 | #define FETCHOP_STORE 0 | ||
21 | #define FETCHOP_AND 24 | ||
22 | #define FETCHOP_OR 32 | ||
23 | |||
24 | #define FETCHOP_CLEAR_CACHE 56 | ||
25 | |||
26 | #define FETCHOP_LOAD_OP(addr, op) ( \ | ||
27 | *(volatile long *)((char*) (addr) + (op))) | ||
28 | |||
29 | #define FETCHOP_STORE_OP(addr, op, x) ( \ | ||
30 | *(volatile long *)((char*) (addr) + (op)) = (long) (x)) | ||
31 | |||
32 | #ifdef __KERNEL__ | ||
33 | |||
34 | /* | ||
35 | * Each Atomic Memory Operation (amo, formerly known as fetchop) | ||
36 | * variable is 64 bytes long. The first 8 bytes are used. The | ||
37 | * remaining 56 bytes are unaddressable due to the operation taking | ||
38 | * that portion of the address. | ||
39 | * | ||
40 | * NOTE: The amo structure _MUST_ be placed in either the first or second | ||
41 | * half of the cache line. The cache line _MUST NOT_ be used for anything | ||
42 | * other than additional amo entries. This is because there are two | ||
43 | * addresses which reference the same physical cache line. One will | ||
44 | * be a cached entry with the memory type bits all set. This address | ||
45 | * may be loaded into processor cache. The amo will be referenced | ||
46 | * uncached via the memory special memory type. If any portion of the | ||
47 | * cached cache-line is modified, when that line is flushed, it will | ||
48 | * overwrite the uncached value in physical memory and lead to | ||
49 | * inconsistency. | ||
50 | */ | ||
51 | struct amo { | ||
52 | u64 variable; | ||
53 | u64 unused[7]; | ||
54 | }; | ||
55 | |||
56 | |||
57 | #endif /* __KERNEL__ */ | ||
58 | |||
59 | #endif /* _ASM_IA64_SN_MSPEC_H */ | ||