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-rw-r--r--arch/ia64/include/asm/elf.h269
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diff --git a/arch/ia64/include/asm/elf.h b/arch/ia64/include/asm/elf.h
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1#ifndef _ASM_IA64_ELF_H
2#define _ASM_IA64_ELF_H
3
4/*
5 * ELF-specific definitions.
6 *
7 * Copyright (C) 1998-1999, 2002-2004 Hewlett-Packard Co
8 * David Mosberger-Tang <davidm@hpl.hp.com>
9 */
10
11
12#include <asm/fpu.h>
13#include <asm/page.h>
14#include <asm/auxvec.h>
15
16/*
17 * This is used to ensure we don't load something for the wrong architecture.
18 */
19#define elf_check_arch(x) ((x)->e_machine == EM_IA_64)
20
21/*
22 * These are used to set parameters in the core dumps.
23 */
24#define ELF_CLASS ELFCLASS64
25#define ELF_DATA ELFDATA2LSB
26#define ELF_ARCH EM_IA_64
27
28#define USE_ELF_CORE_DUMP
29#define CORE_DUMP_USE_REGSET
30
31/* Least-significant four bits of ELF header's e_flags are OS-specific. The bits are
32 interpreted as follows by Linux: */
33#define EF_IA_64_LINUX_EXECUTABLE_STACK 0x1 /* is stack (& heap) executable by default? */
34
35#define ELF_EXEC_PAGESIZE PAGE_SIZE
36
37/*
38 * This is the location that an ET_DYN program is loaded if exec'ed.
39 * Typical use of this is to invoke "./ld.so someprog" to test out a
40 * new version of the loader. We need to make sure that it is out of
41 * the way of the program that it will "exec", and that there is
42 * sufficient room for the brk.
43 */
44#define ELF_ET_DYN_BASE (TASK_UNMAPPED_BASE + 0x800000000UL)
45
46#define PT_IA_64_UNWIND 0x70000001
47
48/* IA-64 relocations: */
49#define R_IA64_NONE 0x00 /* none */
50#define R_IA64_IMM14 0x21 /* symbol + addend, add imm14 */
51#define R_IA64_IMM22 0x22 /* symbol + addend, add imm22 */
52#define R_IA64_IMM64 0x23 /* symbol + addend, mov imm64 */
53#define R_IA64_DIR32MSB 0x24 /* symbol + addend, data4 MSB */
54#define R_IA64_DIR32LSB 0x25 /* symbol + addend, data4 LSB */
55#define R_IA64_DIR64MSB 0x26 /* symbol + addend, data8 MSB */
56#define R_IA64_DIR64LSB 0x27 /* symbol + addend, data8 LSB */
57#define R_IA64_GPREL22 0x2a /* @gprel(sym+add), add imm22 */
58#define R_IA64_GPREL64I 0x2b /* @gprel(sym+add), mov imm64 */
59#define R_IA64_GPREL32MSB 0x2c /* @gprel(sym+add), data4 MSB */
60#define R_IA64_GPREL32LSB 0x2d /* @gprel(sym+add), data4 LSB */
61#define R_IA64_GPREL64MSB 0x2e /* @gprel(sym+add), data8 MSB */
62#define R_IA64_GPREL64LSB 0x2f /* @gprel(sym+add), data8 LSB */
63#define R_IA64_LTOFF22 0x32 /* @ltoff(sym+add), add imm22 */
64#define R_IA64_LTOFF64I 0x33 /* @ltoff(sym+add), mov imm64 */
65#define R_IA64_PLTOFF22 0x3a /* @pltoff(sym+add), add imm22 */
66#define R_IA64_PLTOFF64I 0x3b /* @pltoff(sym+add), mov imm64 */
67#define R_IA64_PLTOFF64MSB 0x3e /* @pltoff(sym+add), data8 MSB */
68#define R_IA64_PLTOFF64LSB 0x3f /* @pltoff(sym+add), data8 LSB */
69#define R_IA64_FPTR64I 0x43 /* @fptr(sym+add), mov imm64 */
70#define R_IA64_FPTR32MSB 0x44 /* @fptr(sym+add), data4 MSB */
71#define R_IA64_FPTR32LSB 0x45 /* @fptr(sym+add), data4 LSB */
72#define R_IA64_FPTR64MSB 0x46 /* @fptr(sym+add), data8 MSB */
73#define R_IA64_FPTR64LSB 0x47 /* @fptr(sym+add), data8 LSB */
74#define R_IA64_PCREL60B 0x48 /* @pcrel(sym+add), brl */
75#define R_IA64_PCREL21B 0x49 /* @pcrel(sym+add), ptb, call */
76#define R_IA64_PCREL21M 0x4a /* @pcrel(sym+add), chk.s */
77#define R_IA64_PCREL21F 0x4b /* @pcrel(sym+add), fchkf */
78#define R_IA64_PCREL32MSB 0x4c /* @pcrel(sym+add), data4 MSB */
79#define R_IA64_PCREL32LSB 0x4d /* @pcrel(sym+add), data4 LSB */
80#define R_IA64_PCREL64MSB 0x4e /* @pcrel(sym+add), data8 MSB */
81#define R_IA64_PCREL64LSB 0x4f /* @pcrel(sym+add), data8 LSB */
82#define R_IA64_LTOFF_FPTR22 0x52 /* @ltoff(@fptr(s+a)), imm22 */
83#define R_IA64_LTOFF_FPTR64I 0x53 /* @ltoff(@fptr(s+a)), imm64 */
84#define R_IA64_LTOFF_FPTR32MSB 0x54 /* @ltoff(@fptr(s+a)), 4 MSB */
85#define R_IA64_LTOFF_FPTR32LSB 0x55 /* @ltoff(@fptr(s+a)), 4 LSB */
86#define R_IA64_LTOFF_FPTR64MSB 0x56 /* @ltoff(@fptr(s+a)), 8 MSB */
87#define R_IA64_LTOFF_FPTR64LSB 0x57 /* @ltoff(@fptr(s+a)), 8 LSB */
88#define R_IA64_SEGREL32MSB 0x5c /* @segrel(sym+add), data4 MSB */
89#define R_IA64_SEGREL32LSB 0x5d /* @segrel(sym+add), data4 LSB */
90#define R_IA64_SEGREL64MSB 0x5e /* @segrel(sym+add), data8 MSB */
91#define R_IA64_SEGREL64LSB 0x5f /* @segrel(sym+add), data8 LSB */
92#define R_IA64_SECREL32MSB 0x64 /* @secrel(sym+add), data4 MSB */
93#define R_IA64_SECREL32LSB 0x65 /* @secrel(sym+add), data4 LSB */
94#define R_IA64_SECREL64MSB 0x66 /* @secrel(sym+add), data8 MSB */
95#define R_IA64_SECREL64LSB 0x67 /* @secrel(sym+add), data8 LSB */
96#define R_IA64_REL32MSB 0x6c /* data 4 + REL */
97#define R_IA64_REL32LSB 0x6d /* data 4 + REL */
98#define R_IA64_REL64MSB 0x6e /* data 8 + REL */
99#define R_IA64_REL64LSB 0x6f /* data 8 + REL */
100#define R_IA64_LTV32MSB 0x74 /* symbol + addend, data4 MSB */
101#define R_IA64_LTV32LSB 0x75 /* symbol + addend, data4 LSB */
102#define R_IA64_LTV64MSB 0x76 /* symbol + addend, data8 MSB */
103#define R_IA64_LTV64LSB 0x77 /* symbol + addend, data8 LSB */
104#define R_IA64_PCREL21BI 0x79 /* @pcrel(sym+add), ptb, call */
105#define R_IA64_PCREL22 0x7a /* @pcrel(sym+add), imm22 */
106#define R_IA64_PCREL64I 0x7b /* @pcrel(sym+add), imm64 */
107#define R_IA64_IPLTMSB 0x80 /* dynamic reloc, imported PLT, MSB */
108#define R_IA64_IPLTLSB 0x81 /* dynamic reloc, imported PLT, LSB */
109#define R_IA64_COPY 0x84 /* dynamic reloc, data copy */
110#define R_IA64_SUB 0x85 /* -symbol + addend, add imm22 */
111#define R_IA64_LTOFF22X 0x86 /* LTOFF22, relaxable. */
112#define R_IA64_LDXMOV 0x87 /* Use of LTOFF22X. */
113#define R_IA64_TPREL14 0x91 /* @tprel(sym+add), add imm14 */
114#define R_IA64_TPREL22 0x92 /* @tprel(sym+add), add imm22 */
115#define R_IA64_TPREL64I 0x93 /* @tprel(sym+add), add imm64 */
116#define R_IA64_TPREL64MSB 0x96 /* @tprel(sym+add), data8 MSB */
117#define R_IA64_TPREL64LSB 0x97 /* @tprel(sym+add), data8 LSB */
118#define R_IA64_LTOFF_TPREL22 0x9a /* @ltoff(@tprel(s+a)), add imm22 */
119#define R_IA64_DTPMOD64MSB 0xa6 /* @dtpmod(sym+add), data8 MSB */
120#define R_IA64_DTPMOD64LSB 0xa7 /* @dtpmod(sym+add), data8 LSB */
121#define R_IA64_LTOFF_DTPMOD22 0xaa /* @ltoff(@dtpmod(s+a)), imm22 */
122#define R_IA64_DTPREL14 0xb1 /* @dtprel(sym+add), imm14 */
123#define R_IA64_DTPREL22 0xb2 /* @dtprel(sym+add), imm22 */
124#define R_IA64_DTPREL64I 0xb3 /* @dtprel(sym+add), imm64 */
125#define R_IA64_DTPREL32MSB 0xb4 /* @dtprel(sym+add), data4 MSB */
126#define R_IA64_DTPREL32LSB 0xb5 /* @dtprel(sym+add), data4 LSB */
127#define R_IA64_DTPREL64MSB 0xb6 /* @dtprel(sym+add), data8 MSB */
128#define R_IA64_DTPREL64LSB 0xb7 /* @dtprel(sym+add), data8 LSB */
129#define R_IA64_LTOFF_DTPREL22 0xba /* @ltoff(@dtprel(s+a)), imm22 */
130
131/* IA-64 specific section flags: */
132#define SHF_IA_64_SHORT 0x10000000 /* section near gp */
133
134/*
135 * We use (abuse?) this macro to insert the (empty) vm_area that is
136 * used to map the register backing store. I don't see any better
137 * place to do this, but we should discuss this with Linus once we can
138 * talk to him...
139 */
140extern void ia64_init_addr_space (void);
141#define ELF_PLAT_INIT(_r, load_addr) ia64_init_addr_space()
142
143/* ELF register definitions. This is needed for core dump support. */
144
145/*
146 * elf_gregset_t contains the application-level state in the following order:
147 * r0-r31
148 * NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
149 * predicate registers (p0-p63)
150 * b0-b7
151 * ip cfm psr
152 * ar.rsc ar.bsp ar.bspstore ar.rnat
153 * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec ar.csd ar.ssd
154 */
155#define ELF_NGREG 128 /* we really need just 72 but let's leave some headroom... */
156#define ELF_NFPREG 128 /* f0 and f1 could be omitted, but so what... */
157
158/* elf_gregset_t register offsets */
159#define ELF_GR_0_OFFSET 0
160#define ELF_NAT_OFFSET (32 * sizeof(elf_greg_t))
161#define ELF_PR_OFFSET (33 * sizeof(elf_greg_t))
162#define ELF_BR_0_OFFSET (34 * sizeof(elf_greg_t))
163#define ELF_CR_IIP_OFFSET (42 * sizeof(elf_greg_t))
164#define ELF_CFM_OFFSET (43 * sizeof(elf_greg_t))
165#define ELF_CR_IPSR_OFFSET (44 * sizeof(elf_greg_t))
166#define ELF_GR_OFFSET(i) (ELF_GR_0_OFFSET + i * sizeof(elf_greg_t))
167#define ELF_BR_OFFSET(i) (ELF_BR_0_OFFSET + i * sizeof(elf_greg_t))
168#define ELF_AR_RSC_OFFSET (45 * sizeof(elf_greg_t))
169#define ELF_AR_BSP_OFFSET (46 * sizeof(elf_greg_t))
170#define ELF_AR_BSPSTORE_OFFSET (47 * sizeof(elf_greg_t))
171#define ELF_AR_RNAT_OFFSET (48 * sizeof(elf_greg_t))
172#define ELF_AR_CCV_OFFSET (49 * sizeof(elf_greg_t))
173#define ELF_AR_UNAT_OFFSET (50 * sizeof(elf_greg_t))
174#define ELF_AR_FPSR_OFFSET (51 * sizeof(elf_greg_t))
175#define ELF_AR_PFS_OFFSET (52 * sizeof(elf_greg_t))
176#define ELF_AR_LC_OFFSET (53 * sizeof(elf_greg_t))
177#define ELF_AR_EC_OFFSET (54 * sizeof(elf_greg_t))
178#define ELF_AR_CSD_OFFSET (55 * sizeof(elf_greg_t))
179#define ELF_AR_SSD_OFFSET (56 * sizeof(elf_greg_t))
180#define ELF_AR_END_OFFSET (57 * sizeof(elf_greg_t))
181
182typedef unsigned long elf_fpxregset_t;
183
184typedef unsigned long elf_greg_t;
185typedef elf_greg_t elf_gregset_t[ELF_NGREG];
186
187typedef struct ia64_fpreg elf_fpreg_t;
188typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
189
190
191
192struct pt_regs; /* forward declaration... */
193extern void ia64_elf_core_copy_regs (struct pt_regs *src, elf_gregset_t dst);
194#define ELF_CORE_COPY_REGS(_dest,_regs) ia64_elf_core_copy_regs(_regs, _dest);
195
196/* This macro yields a bitmask that programs can use to figure out
197 what instruction set this CPU supports. */
198#define ELF_HWCAP 0
199
200/* This macro yields a string that ld.so will use to load
201 implementation specific libraries for optimization. Not terribly
202 relevant until we have real hardware to play with... */
203#define ELF_PLATFORM NULL
204
205#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX)
206#define elf_read_implies_exec(ex, executable_stack) \
207 ((executable_stack!=EXSTACK_DISABLE_X) && ((ex).e_flags & EF_IA_64_LINUX_EXECUTABLE_STACK) != 0)
208
209struct task_struct;
210
211#define GATE_EHDR ((const struct elfhdr *) GATE_ADDR)
212
213/* update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes */
214#define ARCH_DLINFO \
215do { \
216 extern char __kernel_syscall_via_epc[]; \
217 NEW_AUX_ENT(AT_SYSINFO, (unsigned long) __kernel_syscall_via_epc); \
218 NEW_AUX_ENT(AT_SYSINFO_EHDR, (unsigned long) GATE_EHDR); \
219} while (0)
220
221
222/*
223 * These macros parameterize elf_core_dump in fs/binfmt_elf.c to write out
224 * extra segments containing the gate DSO contents. Dumping its
225 * contents makes post-mortem fully interpretable later without matching up
226 * the same kernel and hardware config to see what PC values meant.
227 * Dumping its extra ELF program headers includes all the other information
228 * a debugger needs to easily find how the gate DSO was being used.
229 */
230#define ELF_CORE_EXTRA_PHDRS (GATE_EHDR->e_phnum)
231#define ELF_CORE_WRITE_EXTRA_PHDRS \
232do { \
233 const struct elf_phdr *const gate_phdrs = \
234 (const struct elf_phdr *) (GATE_ADDR + GATE_EHDR->e_phoff); \
235 int i; \
236 Elf64_Off ofs = 0; \
237 for (i = 0; i < GATE_EHDR->e_phnum; ++i) { \
238 struct elf_phdr phdr = gate_phdrs[i]; \
239 if (phdr.p_type == PT_LOAD) { \
240 phdr.p_memsz = PAGE_ALIGN(phdr.p_memsz); \
241 phdr.p_filesz = phdr.p_memsz; \
242 if (ofs == 0) { \
243 ofs = phdr.p_offset = offset; \
244 offset += phdr.p_filesz; \
245 } \
246 else \
247 phdr.p_offset = ofs; \
248 } \
249 else \
250 phdr.p_offset += ofs; \
251 phdr.p_paddr = 0; /* match other core phdrs */ \
252 DUMP_WRITE(&phdr, sizeof(phdr)); \
253 } \
254} while (0)
255#define ELF_CORE_WRITE_EXTRA_DATA \
256do { \
257 const struct elf_phdr *const gate_phdrs = \
258 (const struct elf_phdr *) (GATE_ADDR + GATE_EHDR->e_phoff); \
259 int i; \
260 for (i = 0; i < GATE_EHDR->e_phnum; ++i) { \
261 if (gate_phdrs[i].p_type == PT_LOAD) { \
262 DUMP_WRITE((void *) gate_phdrs[i].p_vaddr, \
263 PAGE_ALIGN(gate_phdrs[i].p_memsz)); \
264 break; \
265 } \
266 } \
267} while (0)
268
269#endif /* _ASM_IA64_ELF_H */
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