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-rw-r--r--arch/i386/kernel/cpu/amd.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/i386/kernel/cpu/amd.c b/arch/i386/kernel/cpu/amd.c
index 73aeaf5a9d4e..4c1ddf2b57cc 100644
--- a/arch/i386/kernel/cpu/amd.c
+++ b/arch/i386/kernel/cpu/amd.c
@@ -28,6 +28,22 @@ static void __init init_amd(struct cpuinfo_x86 *c)
28 int mbytes = num_physpages >> (20-PAGE_SHIFT); 28 int mbytes = num_physpages >> (20-PAGE_SHIFT);
29 int r; 29 int r;
30 30
31#ifdef CONFIG_SMP
32 unsigned long value;
33
34 /* Disable TLB flush filter by setting HWCR.FFDIS on K8
35 * bit 6 of msr C001_0015
36 *
37 * Errata 63 for SH-B3 steppings
38 * Errata 122 for all steppings (F+ have it disabled by default)
39 */
40 if (c->x86 == 15) {
41 rdmsrl(MSR_K7_HWCR, value);
42 value |= 1 << 6;
43 wrmsrl(MSR_K7_HWCR, value);
44 }
45#endif
46
31 /* 47 /*
32 * FIXME: We should handle the K5 here. Set up the write 48 * FIXME: We should handle the K5 here. Set up the write
33 * range and also turn on MSR 83 bits 4 and 31 (write alloc, 49 * range and also turn on MSR 83 bits 4 and 31 (write alloc,