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-rw-r--r--arch/i386/Kconfig4
-rw-r--r--arch/i386/Kconfig.cpu4
-rw-r--r--arch/i386/kernel/cpu/mcheck/therm_throt.c2
3 files changed, 5 insertions, 5 deletions
diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig
index 64ad10f984a1..30944ee2e61a 100644
--- a/arch/i386/Kconfig
+++ b/arch/i386/Kconfig
@@ -858,9 +858,9 @@ config RELOCATABLE
858 bool "Build a relocatable kernel(EXPERIMENTAL)" 858 bool "Build a relocatable kernel(EXPERIMENTAL)"
859 depends on EXPERIMENTAL 859 depends on EXPERIMENTAL
860 help 860 help
861 This build a kernel image that retains relocation information 861 This builds a kernel image that retains relocation information
862 so it can be loaded someplace besides the default 1MB. 862 so it can be loaded someplace besides the default 1MB.
863 The relocations tend to the kernel binary about 10% larger, 863 The relocations tend to make the kernel binary about 10% larger,
864 but are discarded at runtime. 864 but are discarded at runtime.
865 865
866 One use is for the kexec on panic case where the recovery kernel 866 One use is for the kexec on panic case where the recovery kernel
diff --git a/arch/i386/Kconfig.cpu b/arch/i386/Kconfig.cpu
index dce6124cb842..d7f6fb0b30f2 100644
--- a/arch/i386/Kconfig.cpu
+++ b/arch/i386/Kconfig.cpu
@@ -108,7 +108,7 @@ config MCORE2
108 bool "Core 2/newer Xeon" 108 bool "Core 2/newer Xeon"
109 help 109 help
110 Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 53xx) 110 Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 53xx)
111 CPUs. You can distingush newer from older Xeons by the CPU family 111 CPUs. You can distinguish newer from older Xeons by the CPU family
112 in /proc/cpuinfo. Newer ones have 6. 112 in /proc/cpuinfo. Newer ones have 6.
113 113
114config MPENTIUM4 114config MPENTIUM4
@@ -172,7 +172,7 @@ config MWINCHIP3D
172 help 172 help
173 Select this for an IDT Winchip-2A or 3. Linux and GCC 173 Select this for an IDT Winchip-2A or 3. Linux and GCC
174 treat this chip as a 586TSC with some extended instructions 174 treat this chip as a 586TSC with some extended instructions
175 and alignment reqirements. Also enable out of order memory 175 and alignment requirements. Also enable out of order memory
176 stores for this CPU, which can increase performance of some 176 stores for this CPU, which can increase performance of some
177 operations. 177 operations.
178 178
diff --git a/arch/i386/kernel/cpu/mcheck/therm_throt.c b/arch/i386/kernel/cpu/mcheck/therm_throt.c
index 5b0a040213c2..7ba7c3abd3a4 100644
--- a/arch/i386/kernel/cpu/mcheck/therm_throt.c
+++ b/arch/i386/kernel/cpu/mcheck/therm_throt.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/i386/kerne/cpu/mcheck/therm_throt.c 2 * linux/arch/i386/kernel/cpu/mcheck/therm_throt.c
3 * 3 *
4 * Thermal throttle event support code (such as syslog messaging and rate 4 * Thermal throttle event support code (such as syslog messaging and rate
5 * limiting) that was factored out from x86_64 (mce_intel.c) and i386 (p4.c). 5 * limiting) that was factored out from x86_64 (mce_intel.c) and i386 (p4.c).