9 files changed, 103 insertions, 26 deletions

diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig
index cbde675bc95c..d86c865a7cd2 100644
--- a/arch/i386/Kconfig
+++ b/arch/i386/Kconfig
@@ -47,15 +47,6 @@ config DMI
 
 source "init/Kconfig"
 
-config DOUBLEFAULT
-        default y
-        bool "Enable doublefault exception handler" if EMBEDDED
-        help
-          This option allows trapping of rare doublefault exceptions that
-          would otherwise cause a system to silently reboot. Disabling this
-          option saves about 4k and might cause you much additional grey
-          hair.
-
 menu "Processor type and features"
 
 choice
@@ -457,6 +448,43 @@ config HIGHMEM64G
 
 endchoice
 
+choice
+        depends on EXPERIMENTAL && !X86_PAE
+        prompt "Memory split"
+        default VMSPLIT_3G
+        help
+          Select the desired split between kernel and user memory.
+
+          If the address range available to the kernel is less than the
+          physical memory installed, the remaining memory will be available
+          as "high memory". Accessing high memory is a little more costly
+          than low memory, as it needs to be mapped into the kernel first.
+          Note that increasing the kernel address space limits the range
+          available to user programs, making the address space there
+          tighter.  Selecting anything other than the default 3G/1G split
+          will also likely make your kernel incompatible with binary-only
+          kernel modules.
+
+          If you are not absolutely sure what you are doing, leave this
+          option alone!
+
+        config VMSPLIT_3G
+                bool "3G/1G user/kernel split"
+        config VMSPLIT_3G_OPT
+                bool "3G/1G user/kernel split (for full 1G low memory)"
+        config VMSPLIT_2G
+                bool "2G/2G user/kernel split"
+        config VMSPLIT_1G
+                bool "1G/3G user/kernel split"
+endchoice
+
+config PAGE_OFFSET
+        hex
+        default 0xB0000000 if VMSPLIT_3G_OPT
+        default 0x78000000 if VMSPLIT_2G
+        default 0x40000000 if VMSPLIT_1G
+        default 0xC0000000
+
 config HIGHMEM
         bool
         depends on HIGHMEM64G || HIGHMEM4G
@@ -711,6 +739,15 @@ config HOTPLUG_CPU
 
           Say N.
 
+config DOUBLEFAULT
+        default y
+        bool "Enable doublefault exception handler" if EMBEDDED
+        help
+          This option allows trapping of rare doublefault exceptions that
+          would otherwise cause a system to silently reboot. Disabling this
+          option saves about 4k and might cause you much additional grey
+          hair.
+
 endmenu
 
 
diff --git a/arch/i386/kernel/cpu/centaur.c b/arch/i386/kernel/cpu/centaur.c
index 394814e57672..0dd92a23d622 100644
--- a/arch/i386/kernel/cpu/centaur.c
+++ b/arch/i386/kernel/cpu/centaur.c
@@ -405,10 +405,6 @@ static void __init init_centaur(struct cpuinfo_x86 *c)
                                 winchip2_protect_mcr();
 #endif
                                 break;
-                        case 10:
-                                name="4";
-                                /* no info on the WC4 yet */
-                                break;
                         default:
                                 name="??";
                         }
diff --git a/arch/i386/kernel/cpu/cpufreq/Kconfig b/arch/i386/kernel/cpu/cpufreq/Kconfig
index 0f1eb507233b..26892d2099b0 100644
--- a/arch/i386/kernel/cpu/cpufreq/Kconfig
+++ b/arch/i386/kernel/cpu/cpufreq/Kconfig
@@ -96,6 +96,7 @@ config X86_POWERNOW_K8_ACPI
 
 config X86_GX_SUSPMOD
         tristate "Cyrix MediaGX/NatSemi Geode Suspend Modulation"
+        depends on PCI
         help
          This add the CPUFreq driver for NatSemi Geode processors which
          support suspend modulation.
diff --git a/arch/i386/kernel/cpu/cpufreq/p4-clockmod.c b/arch/i386/kernel/cpu/cpufreq/p4-clockmod.c
index 270f2188d68b..cc73a7ae34bc 100644
--- a/arch/i386/kernel/cpu/cpufreq/p4-clockmod.c
+++ b/arch/i386/kernel/cpu/cpufreq/p4-clockmod.c
@@ -52,6 +52,7 @@ enum {
 
 
 static int has_N44_O17_errata[NR_CPUS];
+static int has_N60_errata[NR_CPUS];
 static unsigned int stock_freq;
 static struct cpufreq_driver p4clockmod_driver;
 static unsigned int cpufreq_p4_get(unsigned int cpu);
@@ -226,6 +227,12 @@ static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
         case 0x0f12:
                 has_N44_O17_errata[policy->cpu] = 1;
                 dprintk("has errata -- disabling low frequencies\n");
+                break;
+
+        case 0x0f29:
+                has_N60_errata[policy->cpu] = 1;
+                dprintk("has errata -- disabling frequencies lower than 2ghz\n");
+                break;
         }
         
         /* get max frequency */
@@ -237,6 +244,8 @@ static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
         for (i=1; (p4clockmod_table[i].frequency != CPUFREQ_TABLE_END); i++) {
                 if ((i<2) && (has_N44_O17_errata[policy->cpu]))
                         p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID;
+                else if (has_N60_errata[policy->cpu] && p4clockmod_table[i].frequency < 2000000)
+                        p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID;
                 else
                         p4clockmod_table[i].frequency = (stock_freq * i)/8;
         }
diff --git a/arch/i386/kernel/cpu/intel_cacheinfo.c b/arch/i386/kernel/cpu/intel_cacheinfo.c
index fbfd374aa336..af591c73345f 100644
--- a/arch/i386/kernel/cpu/intel_cacheinfo.c
+++ b/arch/i386/kernel/cpu/intel_cacheinfo.c
@@ -43,13 +43,23 @@ static struct _cache_table cache_table[] __cpuinitdata =
         { 0x2c, LVL_1_DATA, 32 },       /* 8-way set assoc, 64 byte line size */
         { 0x30, LVL_1_INST, 32 },       /* 8-way set assoc, 64 byte line size */
         { 0x39, LVL_2,      128 },      /* 4-way set assoc, sectored cache, 64 byte line size */
+        { 0x3a, LVL_2,      192 },      /* 6-way set assoc, sectored cache, 64 byte line size */
         { 0x3b, LVL_2,      128 },      /* 2-way set assoc, sectored cache, 64 byte line size */
         { 0x3c, LVL_2,      256 },      /* 4-way set assoc, sectored cache, 64 byte line size */
+        { 0x3d, LVL_2,      384 },      /* 6-way set assoc, sectored cache, 64 byte line size */
+        { 0x3e, LVL_2,      512 },      /* 4-way set assoc, sectored cache, 64 byte line size */
         { 0x41, LVL_2,      128 },      /* 4-way set assoc, 32 byte line size */
         { 0x42, LVL_2,      256 },      /* 4-way set assoc, 32 byte line size */
         { 0x43, LVL_2,      512 },      /* 4-way set assoc, 32 byte line size */
         { 0x44, LVL_2,      1024 },     /* 4-way set assoc, 32 byte line size */
         { 0x45, LVL_2,      2048 },     /* 4-way set assoc, 32 byte line size */
+        { 0x46, LVL_3,      4096 },     /* 4-way set assoc, 64 byte line size */
+        { 0x47, LVL_3,      8192 },     /* 8-way set assoc, 64 byte line size */
+        { 0x49, LVL_3,      4096 },     /* 16-way set assoc, 64 byte line size */
+        { 0x4a, LVL_3,      6144 },     /* 12-way set assoc, 64 byte line size */
+        { 0x4b, LVL_3,      8192 },     /* 16-way set assoc, 64 byte line size */
+        { 0x4c, LVL_3,     12288 },     /* 12-way set assoc, 64 byte line size */
+        { 0x4d, LVL_3,     16384 },     /* 16-way set assoc, 64 byte line size */
         { 0x60, LVL_1_DATA, 16 },       /* 8-way set assoc, sectored cache, 64 byte line size */
         { 0x66, LVL_1_DATA, 8 },        /* 4-way set assoc, sectored cache, 64 byte line size */
         { 0x67, LVL_1_DATA, 16 },       /* 4-way set assoc, sectored cache, 64 byte line size */
@@ -57,6 +67,7 @@ static struct _cache_table cache_table[] __cpuinitdata =
         { 0x70, LVL_TRACE,  12 },       /* 8-way set assoc */
         { 0x71, LVL_TRACE,  16 },       /* 8-way set assoc */
         { 0x72, LVL_TRACE,  32 },       /* 8-way set assoc */
+        { 0x73, LVL_TRACE,  64 },       /* 8-way set assoc */
         { 0x78, LVL_2,    1024 },       /* 4-way set assoc, 64 byte line size */
         { 0x79, LVL_2,     128 },       /* 8-way set assoc, sectored cache, 64 byte line size */
         { 0x7a, LVL_2,     256 },       /* 8-way set assoc, sectored cache, 64 byte line size */
diff --git a/arch/i386/kernel/cpu/mtrr/main.c b/arch/i386/kernel/cpu/mtrr/main.c
index 1e9db198c440..3b4618bed70d 100644
--- a/arch/i386/kernel/cpu/mtrr/main.c
+++ b/arch/i386/kernel/cpu/mtrr/main.c
@@ -44,12 +44,10 @@
 #include <asm/msr.h>
 #include "mtrr.h"
 
-#define MTRR_VERSION            "2.0 (20020519)"
-
 u32 num_var_ranges = 0;
 
 unsigned int *usage_table;
-static DECLARE_MUTEX(main_lock);
+static DECLARE_MUTEX(mtrr_sem);
 
 u32 size_or_mask, size_and_mask;
 
@@ -335,7 +333,7 @@ int mtrr_add_page(unsigned long base, unsigned long size,
         /* No CPU hotplug when we change MTRR entries */
         lock_cpu_hotplug();
         /*  Search for existing MTRR  */
-        down(&main_lock);
+        down(&mtrr_sem);
         for (i = 0; i < num_var_ranges; ++i) {
                 mtrr_if->get(i, &lbase, &lsize, &ltype);
                 if (base >= lbase + lsize)
@@ -373,7 +371,7 @@ int mtrr_add_page(unsigned long base, unsigned long size,
                 printk(KERN_INFO "mtrr: no more MTRRs available\n");
         error = i;
  out:
-        up(&main_lock);
+        up(&mtrr_sem);
         unlock_cpu_hotplug();
         return error;
 }
@@ -466,7 +464,7 @@ int mtrr_del_page(int reg, unsigned long base, unsigned long size)
         max = num_var_ranges;
         /* No CPU hotplug when we change MTRR entries */
         lock_cpu_hotplug();
-        down(&main_lock);
+        down(&mtrr_sem);
         if (reg < 0) {
                 /*  Search for existing MTRR  */
                 for (i = 0; i < max; ++i) {
@@ -505,7 +503,7 @@ int mtrr_del_page(int reg, unsigned long base, unsigned long size)
                 set_mtrr(reg, 0, 0, 0);
         error = reg;
  out:
-        up(&main_lock);
+        up(&mtrr_sem);
         unlock_cpu_hotplug();
         return error;
 }
@@ -671,7 +669,6 @@ void __init mtrr_bp_init(void)
                         break;
                 }
         }
-        printk(KERN_INFO "mtrr: v%s\n",MTRR_VERSION);
 
         if (mtrr_if) {
                 set_num_var_ranges();
@@ -688,7 +685,7 @@ void mtrr_ap_init(void)
         if (!mtrr_if || !use_intel())
                 return;
         /*
-         * Ideally we should hold main_lock here to avoid mtrr entries changed,
+         * Ideally we should hold mtrr_sem here to avoid mtrr entries changed,
          * but this routine will be called in cpu boot time, holding the lock
          * breaks it. This routine is called in two cases: 1.very earily time
          * of software resume, when there absolutely isn't mtrr entry changes;
diff --git a/arch/i386/kernel/timers/timer_tsc.c b/arch/i386/kernel/timers/timer_tsc.c
index 47675bbbb316..7c86e3c5f1c1 100644
--- a/arch/i386/kernel/timers/timer_tsc.c
+++ b/arch/i386/kernel/timers/timer_tsc.c
@@ -45,6 +45,15 @@ static unsigned long last_tsc_high; /* msb 32 bits of Time Stamp Counter */
 static unsigned long long monotonic_base;
 static seqlock_t monotonic_lock = SEQLOCK_UNLOCKED;
 
+/* Avoid compensating for lost ticks before TSCs are synched */
+static int detect_lost_ticks;
+static int __init start_lost_tick_compensation(void)
+{
+        detect_lost_ticks = 1;
+        return 0;
+}
+late_initcall(start_lost_tick_compensation);
+
 /* convert from cycles(64bits) => nanoseconds (64bits)
  *  basic equation:
  *              ns = cycles / (freq / ns_per_sec)
@@ -196,7 +205,8 @@ static void mark_offset_tsc_hpet(void)
 
         /* lost tick compensation */
         offset = hpet_readl(HPET_T0_CMP) - hpet_tick;
-        if (unlikely(((offset - hpet_last) > hpet_tick) && (hpet_last != 0))) {
+        if (unlikely(((offset - hpet_last) > hpet_tick) && (hpet_last != 0))
+                                        && detect_lost_ticks) {
                 int lost_ticks = (offset - hpet_last) / hpet_tick;
                 jiffies_64 += lost_ticks;
         }
@@ -421,7 +431,7 @@ static void mark_offset_tsc(void)
         delta += delay_at_last_interrupt;
         lost = delta/(1000000/HZ);
         delay = delta%(1000000/HZ);
-        if (lost >= 2) {
+        if (lost >= 2 && detect_lost_ticks) {
                 jiffies_64 += lost-1;
 
                 /* sanity check to ensure we're not always losing ticks */
diff --git a/arch/i386/pci/irq.c b/arch/i386/pci/irq.c
index e715aa930036..3ca59cad05f3 100644
--- a/arch/i386/pci/irq.c
+++ b/arch/i386/pci/irq.c
@@ -539,6 +539,11 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route
                 case PCI_DEVICE_ID_INTEL_ICH7_30:
                 case PCI_DEVICE_ID_INTEL_ICH7_31:
                 case PCI_DEVICE_ID_INTEL_ESB2_0:
+                case PCI_DEVICE_ID_INTEL_ICH8_0:
+                case PCI_DEVICE_ID_INTEL_ICH8_1:
+                case PCI_DEVICE_ID_INTEL_ICH8_2:
+                case PCI_DEVICE_ID_INTEL_ICH8_3:
+                case PCI_DEVICE_ID_INTEL_ICH8_4:
                         r->name = "PIIX/ICH";
                         r->get = pirq_piix_get;
                         r->set = pirq_piix_set;
diff --git a/arch/i386/pci/mmconfig.c b/arch/i386/pci/mmconfig.c
index 4bb4d4b0f73a..0ee8a983708c 100644
--- a/arch/i386/pci/mmconfig.c
+++ b/arch/i386/pci/mmconfig.c
@@ -36,8 +36,7 @@ static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn)
         while (1) {
                 ++cfg_num;
                 if (cfg_num >= pci_mmcfg_config_num) {
-                        /* Not found - fallback to type 1 */
-                        return 0;
+                        break;
                 }
                 cfg = &pci_mmcfg_config[cfg_num];
                 if (cfg->pci_segment_group_number != seg)
@@ -46,6 +45,18 @@ static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn)
                     (cfg->end_bus_number >= bus))
                         return cfg->base_address;
         }
+
+        /* Handle more broken MCFG tables on Asus etc.
+           They only contain a single entry for bus 0-0. Assume
+           this applies to all busses. */
+        cfg = &pci_mmcfg_config[0];
+        if (pci_mmcfg_config_num == 1 &&
+                cfg->pci_segment_group_number == 0 &&
+                (cfg->start_bus_number | cfg->end_bus_number) == 0)
+                return cfg->base_address;
+
+        /* Fall back to type 0 */
+        return 0;
 }
 
 static inline void pci_exp_set_dev_base(unsigned int base, int bus, int devfn)