diff options
Diffstat (limited to 'arch/i386')
-rw-r--r-- | arch/i386/kernel/i8259.c | 6 | ||||
-rw-r--r-- | arch/i386/kernel/io_apic.c | 16 | ||||
-rw-r--r-- | arch/i386/kernel/irq.c | 6 | ||||
-rw-r--r-- | arch/i386/mach-visws/visws_apic.c | 12 | ||||
-rw-r--r-- | arch/i386/mach-voyager/voyager_smp.c | 2 |
5 files changed, 22 insertions, 20 deletions
diff --git a/arch/i386/kernel/i8259.c b/arch/i386/kernel/i8259.c index c1a42feba286..3c6063671a9f 100644 --- a/arch/i386/kernel/i8259.c +++ b/arch/i386/kernel/i8259.c | |||
@@ -132,7 +132,7 @@ void make_8259A_irq(unsigned int irq) | |||
132 | { | 132 | { |
133 | disable_irq_nosync(irq); | 133 | disable_irq_nosync(irq); |
134 | io_apic_irqs &= ~(1<<irq); | 134 | io_apic_irqs &= ~(1<<irq); |
135 | irq_desc[irq].handler = &i8259A_irq_type; | 135 | irq_desc[irq].chip = &i8259A_irq_type; |
136 | enable_irq(irq); | 136 | enable_irq(irq); |
137 | } | 137 | } |
138 | 138 | ||
@@ -386,12 +386,12 @@ void __init init_ISA_irqs (void) | |||
386 | /* | 386 | /* |
387 | * 16 old-style INTA-cycle interrupts: | 387 | * 16 old-style INTA-cycle interrupts: |
388 | */ | 388 | */ |
389 | irq_desc[i].handler = &i8259A_irq_type; | 389 | irq_desc[i].chip = &i8259A_irq_type; |
390 | } else { | 390 | } else { |
391 | /* | 391 | /* |
392 | * 'high' PCI IRQs filled in on demand | 392 | * 'high' PCI IRQs filled in on demand |
393 | */ | 393 | */ |
394 | irq_desc[i].handler = &no_irq_type; | 394 | irq_desc[i].chip = &no_irq_type; |
395 | } | 395 | } |
396 | } | 396 | } |
397 | } | 397 | } |
diff --git a/arch/i386/kernel/io_apic.c b/arch/i386/kernel/io_apic.c index 72ae414e4d49..4a74b696c6a3 100644 --- a/arch/i386/kernel/io_apic.c +++ b/arch/i386/kernel/io_apic.c | |||
@@ -1205,15 +1205,17 @@ static struct hw_interrupt_type ioapic_edge_type; | |||
1205 | #define IOAPIC_EDGE 0 | 1205 | #define IOAPIC_EDGE 0 |
1206 | #define IOAPIC_LEVEL 1 | 1206 | #define IOAPIC_LEVEL 1 |
1207 | 1207 | ||
1208 | static inline void ioapic_register_intr(int irq, int vector, unsigned long trigger) | 1208 | static void ioapic_register_intr(int irq, int vector, unsigned long trigger) |
1209 | { | 1209 | { |
1210 | unsigned idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq; | 1210 | unsigned idx; |
1211 | |||
1212 | idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq; | ||
1211 | 1213 | ||
1212 | if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || | 1214 | if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || |
1213 | trigger == IOAPIC_LEVEL) | 1215 | trigger == IOAPIC_LEVEL) |
1214 | irq_desc[idx].handler = &ioapic_level_type; | 1216 | irq_desc[idx].chip = &ioapic_level_type; |
1215 | else | 1217 | else |
1216 | irq_desc[idx].handler = &ioapic_edge_type; | 1218 | irq_desc[idx].chip = &ioapic_edge_type; |
1217 | set_intr_gate(vector, interrupt[idx]); | 1219 | set_intr_gate(vector, interrupt[idx]); |
1218 | } | 1220 | } |
1219 | 1221 | ||
@@ -1325,7 +1327,7 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in | |||
1325 | * The timer IRQ doesn't have to know that behind the | 1327 | * The timer IRQ doesn't have to know that behind the |
1326 | * scene we have a 8259A-master in AEOI mode ... | 1328 | * scene we have a 8259A-master in AEOI mode ... |
1327 | */ | 1329 | */ |
1328 | irq_desc[0].handler = &ioapic_edge_type; | 1330 | irq_desc[0].chip = &ioapic_edge_type; |
1329 | 1331 | ||
1330 | /* | 1332 | /* |
1331 | * Add it to the IO-APIC irq-routing table: | 1333 | * Add it to the IO-APIC irq-routing table: |
@@ -2135,7 +2137,7 @@ static inline void init_IO_APIC_traps(void) | |||
2135 | make_8259A_irq(irq); | 2137 | make_8259A_irq(irq); |
2136 | else | 2138 | else |
2137 | /* Strange. Oh, well.. */ | 2139 | /* Strange. Oh, well.. */ |
2138 | irq_desc[irq].handler = &no_irq_type; | 2140 | irq_desc[irq].chip = &no_irq_type; |
2139 | } | 2141 | } |
2140 | } | 2142 | } |
2141 | } | 2143 | } |
@@ -2351,7 +2353,7 @@ static inline void check_timer(void) | |||
2351 | printk(KERN_INFO "...trying to set up timer as Virtual Wire IRQ..."); | 2353 | printk(KERN_INFO "...trying to set up timer as Virtual Wire IRQ..."); |
2352 | 2354 | ||
2353 | disable_8259A_irq(0); | 2355 | disable_8259A_irq(0); |
2354 | irq_desc[0].handler = &lapic_irq_type; | 2356 | irq_desc[0].chip = &lapic_irq_type; |
2355 | apic_write_around(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */ | 2357 | apic_write_around(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */ |
2356 | enable_8259A_irq(0); | 2358 | enable_8259A_irq(0); |
2357 | 2359 | ||
diff --git a/arch/i386/kernel/irq.c b/arch/i386/kernel/irq.c index 9eec9435318e..b942a5918dab 100644 --- a/arch/i386/kernel/irq.c +++ b/arch/i386/kernel/irq.c | |||
@@ -249,7 +249,7 @@ int show_interrupts(struct seq_file *p, void *v) | |||
249 | for_each_online_cpu(j) | 249 | for_each_online_cpu(j) |
250 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); | 250 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); |
251 | #endif | 251 | #endif |
252 | seq_printf(p, " %14s", irq_desc[i].handler->typename); | 252 | seq_printf(p, " %14s", irq_desc[i].chip->typename); |
253 | seq_printf(p, " %s", action->name); | 253 | seq_printf(p, " %s", action->name); |
254 | 254 | ||
255 | for (action=action->next; action; action = action->next) | 255 | for (action=action->next; action; action = action->next) |
@@ -296,8 +296,8 @@ void fixup_irqs(cpumask_t map) | |||
296 | printk("Breaking affinity for irq %i\n", irq); | 296 | printk("Breaking affinity for irq %i\n", irq); |
297 | mask = map; | 297 | mask = map; |
298 | } | 298 | } |
299 | if (irq_desc[irq].handler->set_affinity) | 299 | if (irq_desc[irq].chip->set_affinity) |
300 | irq_desc[irq].handler->set_affinity(irq, mask); | 300 | irq_desc[irq].chip->set_affinity(irq, mask); |
301 | else if (irq_desc[irq].action && !(warned++)) | 301 | else if (irq_desc[irq].action && !(warned++)) |
302 | printk("Cannot set affinity for irq %i\n", irq); | 302 | printk("Cannot set affinity for irq %i\n", irq); |
303 | } | 303 | } |
diff --git a/arch/i386/mach-visws/visws_apic.c b/arch/i386/mach-visws/visws_apic.c index 3e64fb721291..c418521dd554 100644 --- a/arch/i386/mach-visws/visws_apic.c +++ b/arch/i386/mach-visws/visws_apic.c | |||
@@ -278,22 +278,22 @@ void init_VISWS_APIC_irqs(void) | |||
278 | irq_desc[i].depth = 1; | 278 | irq_desc[i].depth = 1; |
279 | 279 | ||
280 | if (i == 0) { | 280 | if (i == 0) { |
281 | irq_desc[i].handler = &cobalt_irq_type; | 281 | irq_desc[i].chip = &cobalt_irq_type; |
282 | } | 282 | } |
283 | else if (i == CO_IRQ_IDE0) { | 283 | else if (i == CO_IRQ_IDE0) { |
284 | irq_desc[i].handler = &cobalt_irq_type; | 284 | irq_desc[i].chip = &cobalt_irq_type; |
285 | } | 285 | } |
286 | else if (i == CO_IRQ_IDE1) { | 286 | else if (i == CO_IRQ_IDE1) { |
287 | irq_desc[i].handler = &cobalt_irq_type; | 287 | irq_desc[i].chip = &cobalt_irq_type; |
288 | } | 288 | } |
289 | else if (i == CO_IRQ_8259) { | 289 | else if (i == CO_IRQ_8259) { |
290 | irq_desc[i].handler = &piix4_master_irq_type; | 290 | irq_desc[i].chip = &piix4_master_irq_type; |
291 | } | 291 | } |
292 | else if (i < CO_IRQ_APIC0) { | 292 | else if (i < CO_IRQ_APIC0) { |
293 | irq_desc[i].handler = &piix4_virtual_irq_type; | 293 | irq_desc[i].chip = &piix4_virtual_irq_type; |
294 | } | 294 | } |
295 | else if (IS_CO_APIC(i)) { | 295 | else if (IS_CO_APIC(i)) { |
296 | irq_desc[i].handler = &cobalt_irq_type; | 296 | irq_desc[i].chip = &cobalt_irq_type; |
297 | } | 297 | } |
298 | } | 298 | } |
299 | 299 | ||
diff --git a/arch/i386/mach-voyager/voyager_smp.c b/arch/i386/mach-voyager/voyager_smp.c index 8242af9ebc6f..5b8b579a079f 100644 --- a/arch/i386/mach-voyager/voyager_smp.c +++ b/arch/i386/mach-voyager/voyager_smp.c | |||
@@ -1419,7 +1419,7 @@ smp_intr_init(void) | |||
1419 | * This is for later: first 16 correspond to PC IRQs; next 16 | 1419 | * This is for later: first 16 correspond to PC IRQs; next 16 |
1420 | * are Primary MC IRQs and final 16 are Secondary MC IRQs */ | 1420 | * are Primary MC IRQs and final 16 are Secondary MC IRQs */ |
1421 | for(i = 0; i < 48; i++) | 1421 | for(i = 0; i < 48; i++) |
1422 | irq_desc[i].handler = &vic_irq_type; | 1422 | irq_desc[i].chip = &vic_irq_type; |
1423 | } | 1423 | } |
1424 | 1424 | ||
1425 | /* send a CPI at level cpi to a set of cpus in cpuset (set 1 bit per | 1425 | /* send a CPI at level cpi to a set of cpus in cpuset (set 1 bit per |