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-rw-r--r--arch/i386/mm/pageattr.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/i386/mm/pageattr.c b/arch/i386/mm/pageattr.c
index cb3da6baa704..f600fc244f02 100644
--- a/arch/i386/mm/pageattr.c
+++ b/arch/i386/mm/pageattr.c
@@ -12,6 +12,7 @@
12#include <asm/uaccess.h> 12#include <asm/uaccess.h>
13#include <asm/processor.h> 13#include <asm/processor.h>
14#include <asm/tlbflush.h> 14#include <asm/tlbflush.h>
15#include <asm/pgalloc.h>
15 16
16static DEFINE_SPINLOCK(cpa_lock); 17static DEFINE_SPINLOCK(cpa_lock);
17static struct list_head df_list = LIST_HEAD_INIT(df_list); 18static struct list_head df_list = LIST_HEAD_INIT(df_list);
@@ -52,8 +53,8 @@ static struct page *split_large_page(unsigned long address, pgprot_t prot)
52 addr = address & LARGE_PAGE_MASK; 53 addr = address & LARGE_PAGE_MASK;
53 pbase = (pte_t *)page_address(base); 54 pbase = (pte_t *)page_address(base);
54 for (i = 0; i < PTRS_PER_PTE; i++, addr += PAGE_SIZE) { 55 for (i = 0; i < PTRS_PER_PTE; i++, addr += PAGE_SIZE) {
55 pbase[i] = pfn_pte(addr >> PAGE_SHIFT, 56 set_pte(&pbase[i], pfn_pte(addr >> PAGE_SHIFT,
56 addr == address ? prot : PAGE_KERNEL); 57 addr == address ? prot : PAGE_KERNEL));
57 } 58 }
58 return base; 59 return base;
59} 60}
@@ -62,7 +63,7 @@ static void flush_kernel_map(void *dummy)
62{ 63{
63 /* Could use CLFLUSH here if the CPU supports it (Hammer,P4) */ 64 /* Could use CLFLUSH here if the CPU supports it (Hammer,P4) */
64 if (boot_cpu_data.x86_model >= 4) 65 if (boot_cpu_data.x86_model >= 4)
65 asm volatile("wbinvd":::"memory"); 66 wbinvd();
66 /* Flush all to work around Errata in early athlons regarding 67 /* Flush all to work around Errata in early athlons regarding
67 * large page flushing. 68 * large page flushing.
68 */ 69 */