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-rw-r--r--arch/i386/kernel/Makefile1
-rw-r--r--arch/i386/kernel/acpi/boot.c21
-rw-r--r--arch/i386/kernel/acpi/wakeup.S2
-rw-r--r--arch/i386/kernel/cpu/Makefile2
-rw-r--r--arch/i386/kernel/cpu/addon_cpuid_features.c50
-rw-r--r--arch/i386/kernel/cpu/amd.c4
-rw-r--r--arch/i386/kernel/cpu/common.c2
-rw-r--r--arch/i386/kernel/cpu/cpufreq/cpufreq-nforce2.c6
-rw-r--r--arch/i386/kernel/cpu/cpufreq/gx-suspmod.c4
-rw-r--r--arch/i386/kernel/cpu/cpufreq/speedstep-ich.c5
-rw-r--r--arch/i386/kernel/cpu/cyrix.c1
-rw-r--r--arch/i386/kernel/cpu/mcheck/k7.c6
-rw-r--r--arch/i386/kernel/cpu/mtrr/cyrix.c6
-rw-r--r--arch/i386/kernel/cpu/mtrr/generic.c14
-rw-r--r--arch/i386/kernel/cpu/mtrr/main.c11
-rw-r--r--arch/i386/kernel/cpu/mtrr/state.c2
-rw-r--r--arch/i386/kernel/cpu/perfctr-watchdog.c61
-rw-r--r--arch/i386/kernel/cpu/proc.c21
-rw-r--r--arch/i386/kernel/e820.c2
-rw-r--r--arch/i386/kernel/entry.S8
-rw-r--r--arch/i386/kernel/microcode.c2
-rw-r--r--arch/i386/kernel/pci-dma.c27
-rw-r--r--arch/i386/kernel/quirks.c5
-rw-r--r--arch/i386/kernel/reboot.c8
-rw-r--r--arch/i386/kernel/reboot_fixups.c13
-rw-r--r--arch/i386/kernel/setup.c12
-rw-r--r--arch/i386/kernel/smp.c67
-rw-r--r--arch/i386/kernel/smpboot.c35
-rw-r--r--arch/i386/kernel/smpcommon.c79
-rw-r--r--arch/i386/kernel/traps.c5
-rw-r--r--arch/i386/kernel/tsc.c9
-rw-r--r--arch/i386/kernel/verify_cpu.S67
-rw-r--r--arch/i386/kernel/vmi.c1
-rw-r--r--arch/i386/kernel/vmlinux.lds.S4
34 files changed, 304 insertions, 259 deletions
diff --git a/arch/i386/kernel/Makefile b/arch/i386/kernel/Makefile
index 91cff8dc9e1a..06da59f6f837 100644
--- a/arch/i386/kernel/Makefile
+++ b/arch/i386/kernel/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_X86_CPUID) += cpuid.o
19obj-$(CONFIG_MICROCODE) += microcode.o 19obj-$(CONFIG_MICROCODE) += microcode.o
20obj-$(CONFIG_APM) += apm.o 20obj-$(CONFIG_APM) += apm.o
21obj-$(CONFIG_X86_SMP) += smp.o smpboot.o tsc_sync.o 21obj-$(CONFIG_X86_SMP) += smp.o smpboot.o tsc_sync.o
22obj-$(CONFIG_SMP) += smpcommon.o
22obj-$(CONFIG_X86_TRAMPOLINE) += trampoline.o 23obj-$(CONFIG_X86_TRAMPOLINE) += trampoline.o
23obj-$(CONFIG_X86_MPPARSE) += mpparse.o 24obj-$(CONFIG_X86_MPPARSE) += mpparse.o
24obj-$(CONFIG_X86_LOCAL_APIC) += apic.o nmi.o 25obj-$(CONFIG_X86_LOCAL_APIC) += apic.o nmi.o
diff --git a/arch/i386/kernel/acpi/boot.c b/arch/i386/kernel/acpi/boot.c
index 280898b045b2..a574cd2c8b61 100644
--- a/arch/i386/kernel/acpi/boot.c
+++ b/arch/i386/kernel/acpi/boot.c
@@ -621,8 +621,6 @@ static int __init acpi_parse_sbf(struct acpi_table_header *table)
621static int __init acpi_parse_hpet(struct acpi_table_header *table) 621static int __init acpi_parse_hpet(struct acpi_table_header *table)
622{ 622{
623 struct acpi_table_hpet *hpet_tbl; 623 struct acpi_table_hpet *hpet_tbl;
624 struct resource *hpet_res;
625 resource_size_t res_start;
626 624
627 hpet_tbl = (struct acpi_table_hpet *)table; 625 hpet_tbl = (struct acpi_table_hpet *)table;
628 if (!hpet_tbl) { 626 if (!hpet_tbl) {
@@ -636,29 +634,10 @@ static int __init acpi_parse_hpet(struct acpi_table_header *table)
636 return -1; 634 return -1;
637 } 635 }
638 636
639#define HPET_RESOURCE_NAME_SIZE 9
640 hpet_res = alloc_bootmem(sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE);
641 if (hpet_res) {
642 memset(hpet_res, 0, sizeof(*hpet_res));
643 hpet_res->name = (void *)&hpet_res[1];
644 hpet_res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
645 snprintf((char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE,
646 "HPET %u", hpet_tbl->sequence);
647 hpet_res->end = (1 * 1024) - 1;
648 }
649
650 hpet_address = hpet_tbl->address.address; 637 hpet_address = hpet_tbl->address.address;
651 printk(KERN_INFO PREFIX "HPET id: %#x base: %#lx\n", 638 printk(KERN_INFO PREFIX "HPET id: %#x base: %#lx\n",
652 hpet_tbl->id, hpet_address); 639 hpet_tbl->id, hpet_address);
653 640
654 res_start = hpet_address;
655
656 if (hpet_res) {
657 hpet_res->start = res_start;
658 hpet_res->end += res_start;
659 insert_resource(&iomem_resource, hpet_res);
660 }
661
662 return 0; 641 return 0;
663} 642}
664#else 643#else
diff --git a/arch/i386/kernel/acpi/wakeup.S b/arch/i386/kernel/acpi/wakeup.S
index b781b38131c0..a2295a34b2c7 100644
--- a/arch/i386/kernel/acpi/wakeup.S
+++ b/arch/i386/kernel/acpi/wakeup.S
@@ -230,6 +230,7 @@ bogus_magic:
230# 230#
231ENTRY(acpi_copy_wakeup_routine) 231ENTRY(acpi_copy_wakeup_routine)
232 232
233 pushl %ebx
233 sgdt saved_gdt 234 sgdt saved_gdt
234 sidt saved_idt 235 sidt saved_idt
235 sldt saved_ldt 236 sldt saved_ldt
@@ -263,6 +264,7 @@ ENTRY(acpi_copy_wakeup_routine)
263 movl %edx, video_flags - wakeup_start (%eax) 264 movl %edx, video_flags - wakeup_start (%eax)
264 movl $0x12345678, real_magic - wakeup_start (%eax) 265 movl $0x12345678, real_magic - wakeup_start (%eax)
265 movl $0x12345678, saved_magic 266 movl $0x12345678, saved_magic
267 popl %ebx
266 ret 268 ret
267 269
268save_registers: 270save_registers:
diff --git a/arch/i386/kernel/cpu/Makefile b/arch/i386/kernel/cpu/Makefile
index 74f27a463db0..0b6a8551e9e2 100644
--- a/arch/i386/kernel/cpu/Makefile
+++ b/arch/i386/kernel/cpu/Makefile
@@ -8,7 +8,7 @@ obj-y += amd.o
8obj-y += cyrix.o 8obj-y += cyrix.o
9obj-y += centaur.o 9obj-y += centaur.o
10obj-y += transmeta.o 10obj-y += transmeta.o
11obj-y += intel.o intel_cacheinfo.o 11obj-y += intel.o intel_cacheinfo.o addon_cpuid_features.o
12obj-y += rise.o 12obj-y += rise.o
13obj-y += nexgen.o 13obj-y += nexgen.o
14obj-y += umc.o 14obj-y += umc.o
diff --git a/arch/i386/kernel/cpu/addon_cpuid_features.c b/arch/i386/kernel/cpu/addon_cpuid_features.c
new file mode 100644
index 000000000000..3e91d3ee26ec
--- /dev/null
+++ b/arch/i386/kernel/cpu/addon_cpuid_features.c
@@ -0,0 +1,50 @@
1
2/*
3 * Routines to indentify additional cpu features that are scattered in
4 * cpuid space.
5 */
6
7#include <linux/cpu.h>
8
9#include <asm/processor.h>
10
11struct cpuid_bit {
12 u16 feature;
13 u8 reg;
14 u8 bit;
15 u32 level;
16};
17
18enum cpuid_regs {
19 CR_EAX = 0,
20 CR_ECX,
21 CR_EDX,
22 CR_EBX
23};
24
25void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
26{
27 u32 max_level;
28 u32 regs[4];
29 const struct cpuid_bit *cb;
30
31 static const struct cpuid_bit cpuid_bits[] = {
32 { X86_FEATURE_IDA, CR_EAX, 1, 0x00000006 },
33 { 0, 0, 0, 0 }
34 };
35
36 for (cb = cpuid_bits; cb->feature; cb++) {
37
38 /* Verify that the level is valid */
39 max_level = cpuid_eax(cb->level & 0xffff0000);
40 if (max_level < cb->level ||
41 max_level > (cb->level | 0xffff))
42 continue;
43
44 cpuid(cb->level, &regs[CR_EAX], &regs[CR_EBX],
45 &regs[CR_ECX], &regs[CR_EDX]);
46
47 if (regs[cb->reg] & (1 << cb->bit))
48 set_bit(cb->feature, c->x86_capability);
49 }
50}
diff --git a/arch/i386/kernel/cpu/amd.c b/arch/i386/kernel/cpu/amd.c
index 4fec702afd7e..6f47eeeb93ea 100644
--- a/arch/i386/kernel/cpu/amd.c
+++ b/arch/i386/kernel/cpu/amd.c
@@ -280,6 +280,10 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
280 280
281 if (c->x86 == 0x10 && !force_mwait) 281 if (c->x86 == 0x10 && !force_mwait)
282 clear_bit(X86_FEATURE_MWAIT, c->x86_capability); 282 clear_bit(X86_FEATURE_MWAIT, c->x86_capability);
283
284 /* K6s reports MCEs but don't actually have all the MSRs */
285 if (c->x86 < 6)
286 clear_bit(X86_FEATURE_MCE, c->x86_capability);
283} 287}
284 288
285static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 * c, unsigned int size) 289static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 * c, unsigned int size)
diff --git a/arch/i386/kernel/cpu/common.c b/arch/i386/kernel/cpu/common.c
index 794d593c47eb..e5419a9dec88 100644
--- a/arch/i386/kernel/cpu/common.c
+++ b/arch/i386/kernel/cpu/common.c
@@ -353,6 +353,8 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 * c)
353 if ( xlvl >= 0x80000004 ) 353 if ( xlvl >= 0x80000004 )
354 get_model_name(c); /* Default name */ 354 get_model_name(c); /* Default name */
355 } 355 }
356
357 init_scattered_cpuid_features(c);
356 } 358 }
357 359
358 early_intel_workaround(c); 360 early_intel_workaround(c);
diff --git a/arch/i386/kernel/cpu/cpufreq/cpufreq-nforce2.c b/arch/i386/kernel/cpu/cpufreq/cpufreq-nforce2.c
index 0d49d73d1b71..66acd5039918 100644
--- a/arch/i386/kernel/cpu/cpufreq/cpufreq-nforce2.c
+++ b/arch/i386/kernel/cpu/cpufreq/cpufreq-nforce2.c
@@ -391,8 +391,6 @@ static struct cpufreq_driver nforce2_driver = {
391 */ 391 */
392static unsigned int nforce2_detect_chipset(void) 392static unsigned int nforce2_detect_chipset(void)
393{ 393{
394 u8 revision;
395
396 nforce2_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_NVIDIA, 394 nforce2_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_NVIDIA,
397 PCI_DEVICE_ID_NVIDIA_NFORCE2, 395 PCI_DEVICE_ID_NVIDIA_NFORCE2,
398 PCI_ANY_ID, PCI_ANY_ID, NULL); 396 PCI_ANY_ID, PCI_ANY_ID, NULL);
@@ -400,10 +398,8 @@ static unsigned int nforce2_detect_chipset(void)
400 if (nforce2_chipset_dev == NULL) 398 if (nforce2_chipset_dev == NULL)
401 return -ENODEV; 399 return -ENODEV;
402 400
403 pci_read_config_byte(nforce2_chipset_dev, PCI_REVISION_ID, &revision);
404
405 printk(KERN_INFO "cpufreq: Detected nForce2 chipset revision %X\n", 401 printk(KERN_INFO "cpufreq: Detected nForce2 chipset revision %X\n",
406 revision); 402 nforce2_chipset_dev->revision);
407 printk(KERN_INFO 403 printk(KERN_INFO
408 "cpufreq: FSB changing is maybe unstable and can lead to crashes and data loss.\n"); 404 "cpufreq: FSB changing is maybe unstable and can lead to crashes and data loss.\n");
409 405
diff --git a/arch/i386/kernel/cpu/cpufreq/gx-suspmod.c b/arch/i386/kernel/cpu/cpufreq/gx-suspmod.c
index 6667e9cceb9f..194144539a6f 100644
--- a/arch/i386/kernel/cpu/cpufreq/gx-suspmod.c
+++ b/arch/i386/kernel/cpu/cpufreq/gx-suspmod.c
@@ -115,7 +115,6 @@ struct gxfreq_params {
115 u8 pci_suscfg; 115 u8 pci_suscfg;
116 u8 pci_pmer1; 116 u8 pci_pmer1;
117 u8 pci_pmer2; 117 u8 pci_pmer2;
118 u8 pci_rev;
119 struct pci_dev *cs55x0; 118 struct pci_dev *cs55x0;
120}; 119};
121 120
@@ -276,7 +275,7 @@ static void gx_set_cpuspeed(unsigned int khz)
276 pci_write_config_byte(gx_params->cs55x0, PCI_VIDTC, 100);/* typical 50 to 100ms */ 275 pci_write_config_byte(gx_params->cs55x0, PCI_VIDTC, 100);/* typical 50 to 100ms */
277 pci_write_config_byte(gx_params->cs55x0, PCI_PMER1, pmer1); 276 pci_write_config_byte(gx_params->cs55x0, PCI_PMER1, pmer1);
278 277
279 if (gx_params->pci_rev < 0x10) { /* CS5530(rev 1.2, 1.3) */ 278 if (gx_params->cs55x0->revision < 0x10) { /* CS5530(rev 1.2, 1.3) */
280 suscfg = gx_params->pci_suscfg | SUSMOD; 279 suscfg = gx_params->pci_suscfg | SUSMOD;
281 } else { /* CS5530A,B.. */ 280 } else { /* CS5530A,B.. */
282 suscfg = gx_params->pci_suscfg | SUSMOD | PWRSVE; 281 suscfg = gx_params->pci_suscfg | SUSMOD | PWRSVE;
@@ -471,7 +470,6 @@ static int __init cpufreq_gx_init(void)
471 pci_read_config_byte(params->cs55x0, PCI_PMER2, &(params->pci_pmer2)); 470 pci_read_config_byte(params->cs55x0, PCI_PMER2, &(params->pci_pmer2));
472 pci_read_config_byte(params->cs55x0, PCI_MODON, &(params->on_duration)); 471 pci_read_config_byte(params->cs55x0, PCI_MODON, &(params->on_duration));
473 pci_read_config_byte(params->cs55x0, PCI_MODOFF, &(params->off_duration)); 472 pci_read_config_byte(params->cs55x0, PCI_MODOFF, &(params->off_duration));
474 pci_read_config_byte(params->cs55x0, PCI_REVISION_ID, &params->pci_rev);
475 473
476 if ((ret = cpufreq_register_driver(&gx_suspmod_driver))) { 474 if ((ret = cpufreq_register_driver(&gx_suspmod_driver))) {
477 kfree(params); 475 kfree(params);
diff --git a/arch/i386/kernel/cpu/cpufreq/speedstep-ich.c b/arch/i386/kernel/cpu/cpufreq/speedstep-ich.c
index b425cd3d1838..a5b2346faf1f 100644
--- a/arch/i386/kernel/cpu/cpufreq/speedstep-ich.c
+++ b/arch/i386/kernel/cpu/cpufreq/speedstep-ich.c
@@ -24,6 +24,7 @@
24#include <linux/cpufreq.h> 24#include <linux/cpufreq.h>
25#include <linux/pci.h> 25#include <linux/pci.h>
26#include <linux/slab.h> 26#include <linux/slab.h>
27#include <linux/sched.h>
27 28
28#include "speedstep-lib.h" 29#include "speedstep-lib.h"
29 30
@@ -204,7 +205,6 @@ static unsigned int speedstep_detect_chipset (void)
204 * host brige. Abort on these systems. 205 * host brige. Abort on these systems.
205 */ 206 */
206 static struct pci_dev *hostbridge; 207 static struct pci_dev *hostbridge;
207 u8 rev = 0;
208 208
209 hostbridge = pci_get_subsys(PCI_VENDOR_ID_INTEL, 209 hostbridge = pci_get_subsys(PCI_VENDOR_ID_INTEL,
210 PCI_DEVICE_ID_INTEL_82815_MC, 210 PCI_DEVICE_ID_INTEL_82815_MC,
@@ -215,8 +215,7 @@ static unsigned int speedstep_detect_chipset (void)
215 if (!hostbridge) 215 if (!hostbridge)
216 return 2; /* 2-M */ 216 return 2; /* 2-M */
217 217
218 pci_read_config_byte(hostbridge, PCI_REVISION_ID, &rev); 218 if (hostbridge->revision < 5) {
219 if (rev < 5) {
220 dprintk("hostbridge does not support speedstep\n"); 219 dprintk("hostbridge does not support speedstep\n");
221 speedstep_chipset_dev = NULL; 220 speedstep_chipset_dev = NULL;
222 pci_dev_put(hostbridge); 221 pci_dev_put(hostbridge);
diff --git a/arch/i386/kernel/cpu/cyrix.c b/arch/i386/kernel/cpu/cyrix.c
index 0b8411a864fb..e88d2fba156b 100644
--- a/arch/i386/kernel/cpu/cyrix.c
+++ b/arch/i386/kernel/cpu/cyrix.c
@@ -7,6 +7,7 @@
7#include <asm/processor.h> 7#include <asm/processor.h>
8#include <asm/timer.h> 8#include <asm/timer.h>
9#include <asm/pci-direct.h> 9#include <asm/pci-direct.h>
10#include <asm/tsc.h>
10 11
11#include "cpu.h" 12#include "cpu.h"
12 13
diff --git a/arch/i386/kernel/cpu/mcheck/k7.c b/arch/i386/kernel/cpu/mcheck/k7.c
index f9fa4142551e..eef63e3630c2 100644
--- a/arch/i386/kernel/cpu/mcheck/k7.c
+++ b/arch/i386/kernel/cpu/mcheck/k7.c
@@ -72,12 +72,12 @@ void amd_mcheck_init(struct cpuinfo_x86 *c)
72 u32 l, h; 72 u32 l, h;
73 int i; 73 int i;
74 74
75 machine_check_vector = k7_machine_check;
76 wmb();
77
78 if (!cpu_has(c, X86_FEATURE_MCE)) 75 if (!cpu_has(c, X86_FEATURE_MCE))
79 return; 76 return;
80 77
78 machine_check_vector = k7_machine_check;
79 wmb();
80
81 printk (KERN_INFO "Intel machine check architecture supported.\n"); 81 printk (KERN_INFO "Intel machine check architecture supported.\n");
82 rdmsr (MSR_IA32_MCG_CAP, l, h); 82 rdmsr (MSR_IA32_MCG_CAP, l, h);
83 if (l & (1<<8)) /* Control register present ? */ 83 if (l & (1<<8)) /* Control register present ? */
diff --git a/arch/i386/kernel/cpu/mtrr/cyrix.c b/arch/i386/kernel/cpu/mtrr/cyrix.c
index 0737a596db43..1001f1e0fe6d 100644
--- a/arch/i386/kernel/cpu/mtrr/cyrix.c
+++ b/arch/i386/kernel/cpu/mtrr/cyrix.c
@@ -136,7 +136,7 @@ static void prepare_set(void)
136 /* Save value of CR4 and clear Page Global Enable (bit 7) */ 136 /* Save value of CR4 and clear Page Global Enable (bit 7) */
137 if ( cpu_has_pge ) { 137 if ( cpu_has_pge ) {
138 cr4 = read_cr4(); 138 cr4 = read_cr4();
139 write_cr4(cr4 & (unsigned char) ~(1 << 7)); 139 write_cr4(cr4 & ~X86_CR4_PGE);
140 } 140 }
141 141
142 /* Disable and flush caches. Note that wbinvd flushes the TLBs as 142 /* Disable and flush caches. Note that wbinvd flushes the TLBs as
@@ -233,12 +233,12 @@ typedef struct {
233 mtrr_type type; 233 mtrr_type type;
234} arr_state_t; 234} arr_state_t;
235 235
236static arr_state_t arr_state[8] __devinitdata = { 236static arr_state_t arr_state[8] = {
237 {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL}, 237 {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL},
238 {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL} 238 {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL}
239}; 239};
240 240
241static unsigned char ccr_state[7] __devinitdata = { 0, 0, 0, 0, 0, 0, 0 }; 241static unsigned char ccr_state[7] = { 0, 0, 0, 0, 0, 0, 0 };
242 242
243static void cyrix_set_all(void) 243static void cyrix_set_all(void)
244{ 244{
diff --git a/arch/i386/kernel/cpu/mtrr/generic.c b/arch/i386/kernel/cpu/mtrr/generic.c
index 5367e32e0403..f6e46943e6ef 100644
--- a/arch/i386/kernel/cpu/mtrr/generic.c
+++ b/arch/i386/kernel/cpu/mtrr/generic.c
@@ -42,7 +42,7 @@ static int mtrr_show;
42module_param_named(show, mtrr_show, bool, 0); 42module_param_named(show, mtrr_show, bool, 0);
43 43
44/* Get the MSR pair relating to a var range */ 44/* Get the MSR pair relating to a var range */
45static void __init 45static void
46get_mtrr_var_range(unsigned int index, struct mtrr_var_range *vr) 46get_mtrr_var_range(unsigned int index, struct mtrr_var_range *vr)
47{ 47{
48 rdmsr(MTRRphysBase_MSR(index), vr->base_lo, vr->base_hi); 48 rdmsr(MTRRphysBase_MSR(index), vr->base_lo, vr->base_hi);
@@ -65,10 +65,11 @@ get_fixed_ranges(mtrr_type * frs)
65 65
66void mtrr_save_fixed_ranges(void *info) 66void mtrr_save_fixed_ranges(void *info)
67{ 67{
68 get_fixed_ranges(mtrr_state.fixed_ranges); 68 if (cpu_has_mtrr)
69 get_fixed_ranges(mtrr_state.fixed_ranges);
69} 70}
70 71
71static void __cpuinit print_fixed(unsigned base, unsigned step, const mtrr_type*types) 72static void print_fixed(unsigned base, unsigned step, const mtrr_type*types)
72{ 73{
73 unsigned i; 74 unsigned i;
74 75
@@ -78,7 +79,7 @@ static void __cpuinit print_fixed(unsigned base, unsigned step, const mtrr_type*
78} 79}
79 80
80/* Grab all of the MTRR state for this CPU into *state */ 81/* Grab all of the MTRR state for this CPU into *state */
81void __init get_mtrr_state(void) 82void get_mtrr_state(void)
82{ 83{
83 unsigned int i; 84 unsigned int i;
84 struct mtrr_var_range *vrs; 85 struct mtrr_var_range *vrs;
@@ -469,11 +470,6 @@ int generic_validate_add_page(unsigned long base, unsigned long size, unsigned i
469 } 470 }
470 } 471 }
471 472
472 if (base < 0x100) {
473 printk(KERN_WARNING "mtrr: cannot set region below 1 MiB (0x%lx000,0x%lx000)\n",
474 base, size);
475 return -EINVAL;
476 }
477 /* Check upper bits of base and last are equal and lower bits are 0 473 /* Check upper bits of base and last are equal and lower bits are 0
478 for base and 1 for last */ 474 for base and 1 for last */
479 last = base + size - 1; 475 last = base + size - 1;
diff --git a/arch/i386/kernel/cpu/mtrr/main.c b/arch/i386/kernel/cpu/mtrr/main.c
index 02a2f39e5e0a..75dc6d5214bc 100644
--- a/arch/i386/kernel/cpu/mtrr/main.c
+++ b/arch/i386/kernel/cpu/mtrr/main.c
@@ -229,6 +229,8 @@ static void set_mtrr(unsigned int reg, unsigned long base,
229 data.smp_size = size; 229 data.smp_size = size;
230 data.smp_type = type; 230 data.smp_type = type;
231 atomic_set(&data.count, num_booting_cpus() - 1); 231 atomic_set(&data.count, num_booting_cpus() - 1);
232 /* make sure data.count is visible before unleashing other CPUs */
233 smp_wmb();
232 atomic_set(&data.gate,0); 234 atomic_set(&data.gate,0);
233 235
234 /* Start the ball rolling on other CPUs */ 236 /* Start the ball rolling on other CPUs */
@@ -242,6 +244,7 @@ static void set_mtrr(unsigned int reg, unsigned long base,
242 244
243 /* ok, reset count and toggle gate */ 245 /* ok, reset count and toggle gate */
244 atomic_set(&data.count, num_booting_cpus() - 1); 246 atomic_set(&data.count, num_booting_cpus() - 1);
247 smp_wmb();
245 atomic_set(&data.gate,1); 248 atomic_set(&data.gate,1);
246 249
247 /* do our MTRR business */ 250 /* do our MTRR business */
@@ -260,6 +263,7 @@ static void set_mtrr(unsigned int reg, unsigned long base,
260 cpu_relax(); 263 cpu_relax();
261 264
262 atomic_set(&data.count, num_booting_cpus() - 1); 265 atomic_set(&data.count, num_booting_cpus() - 1);
266 smp_wmb();
263 atomic_set(&data.gate,0); 267 atomic_set(&data.gate,0);
264 268
265 /* 269 /*
@@ -639,7 +643,7 @@ static struct sysdev_driver mtrr_sysdev_driver = {
639 * initialized (i.e. before smp_init()). 643 * initialized (i.e. before smp_init()).
640 * 644 *
641 */ 645 */
642void __init mtrr_bp_init(void) 646__init void mtrr_bp_init(void)
643{ 647{
644 init_ifs(); 648 init_ifs();
645 649
@@ -734,10 +738,13 @@ void mtrr_ap_init(void)
734 */ 738 */
735void mtrr_save_state(void) 739void mtrr_save_state(void)
736{ 740{
737 if (smp_processor_id() == 0) 741 int cpu = get_cpu();
742
743 if (cpu == 0)
738 mtrr_save_fixed_ranges(NULL); 744 mtrr_save_fixed_ranges(NULL);
739 else 745 else
740 smp_call_function_single(0, mtrr_save_fixed_ranges, NULL, 1, 1); 746 smp_call_function_single(0, mtrr_save_fixed_ranges, NULL, 1, 1);
747 put_cpu();
741} 748}
742 749
743static int __init mtrr_init_finialize(void) 750static int __init mtrr_init_finialize(void)
diff --git a/arch/i386/kernel/cpu/mtrr/state.c b/arch/i386/kernel/cpu/mtrr/state.c
index f62ecd15811a..7b39a2f954d9 100644
--- a/arch/i386/kernel/cpu/mtrr/state.c
+++ b/arch/i386/kernel/cpu/mtrr/state.c
@@ -19,7 +19,7 @@ void set_mtrr_prepare_save(struct set_mtrr_context *ctxt)
19 /* Save value of CR4 and clear Page Global Enable (bit 7) */ 19 /* Save value of CR4 and clear Page Global Enable (bit 7) */
20 if ( cpu_has_pge ) { 20 if ( cpu_has_pge ) {
21 ctxt->cr4val = read_cr4(); 21 ctxt->cr4val = read_cr4();
22 write_cr4(ctxt->cr4val & (unsigned char) ~(1 << 7)); 22 write_cr4(ctxt->cr4val & ~X86_CR4_PGE);
23 } 23 }
24 24
25 /* Disable and flush caches. Note that wbinvd flushes the TLBs as 25 /* Disable and flush caches. Note that wbinvd flushes the TLBs as
diff --git a/arch/i386/kernel/cpu/perfctr-watchdog.c b/arch/i386/kernel/cpu/perfctr-watchdog.c
index 2b04c8f1db62..4d26d514c56f 100644
--- a/arch/i386/kernel/cpu/perfctr-watchdog.c
+++ b/arch/i386/kernel/cpu/perfctr-watchdog.c
@@ -28,7 +28,7 @@ struct wd_ops {
28 void (*unreserve)(void); 28 void (*unreserve)(void);
29 int (*setup)(unsigned nmi_hz); 29 int (*setup)(unsigned nmi_hz);
30 void (*rearm)(struct nmi_watchdog_ctlblk *wd, unsigned nmi_hz); 30 void (*rearm)(struct nmi_watchdog_ctlblk *wd, unsigned nmi_hz);
31 void (*stop)(void *); 31 void (*stop)(void);
32 unsigned perfctr; 32 unsigned perfctr;
33 unsigned evntsel; 33 unsigned evntsel;
34 u64 checkbit; 34 u64 checkbit;
@@ -55,14 +55,45 @@ static DEFINE_PER_CPU(struct nmi_watchdog_ctlblk, nmi_watchdog_ctlblk);
55/* converts an msr to an appropriate reservation bit */ 55/* converts an msr to an appropriate reservation bit */
56static inline unsigned int nmi_perfctr_msr_to_bit(unsigned int msr) 56static inline unsigned int nmi_perfctr_msr_to_bit(unsigned int msr)
57{ 57{
58 return wd_ops ? msr - wd_ops->perfctr : 0; 58 /* returns the bit offset of the performance counter register */
59 switch (boot_cpu_data.x86_vendor) {
60 case X86_VENDOR_AMD:
61 return (msr - MSR_K7_PERFCTR0);
62 case X86_VENDOR_INTEL:
63 if (cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON))
64 return (msr - MSR_ARCH_PERFMON_PERFCTR0);
65
66 switch (boot_cpu_data.x86) {
67 case 6:
68 return (msr - MSR_P6_PERFCTR0);
69 case 15:
70 return (msr - MSR_P4_BPU_PERFCTR0);
71 }
72 }
73 return 0;
59} 74}
60 75
61/* converts an msr to an appropriate reservation bit */ 76/* converts an msr to an appropriate reservation bit */
62/* returns the bit offset of the event selection register */ 77/* returns the bit offset of the event selection register */
63static inline unsigned int nmi_evntsel_msr_to_bit(unsigned int msr) 78static inline unsigned int nmi_evntsel_msr_to_bit(unsigned int msr)
64{ 79{
65 return wd_ops ? msr - wd_ops->evntsel : 0; 80 /* returns the bit offset of the event selection register */
81 switch (boot_cpu_data.x86_vendor) {
82 case X86_VENDOR_AMD:
83 return (msr - MSR_K7_EVNTSEL0);
84 case X86_VENDOR_INTEL:
85 if (cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON))
86 return (msr - MSR_ARCH_PERFMON_EVENTSEL0);
87
88 switch (boot_cpu_data.x86) {
89 case 6:
90 return (msr - MSR_P6_EVNTSEL0);
91 case 15:
92 return (msr - MSR_P4_BSU_ESCR0);
93 }
94 }
95 return 0;
96
66} 97}
67 98
68/* checks for a bit availability (hack for oprofile) */ 99/* checks for a bit availability (hack for oprofile) */
@@ -142,7 +173,7 @@ void disable_lapic_nmi_watchdog(void)
142 if (atomic_read(&nmi_active) <= 0) 173 if (atomic_read(&nmi_active) <= 0)
143 return; 174 return;
144 175
145 on_each_cpu(wd_ops->stop, NULL, 0, 1); 176 on_each_cpu(stop_apic_nmi_watchdog, NULL, 0, 1);
146 wd_ops->unreserve(); 177 wd_ops->unreserve();
147 178
148 BUG_ON(atomic_read(&nmi_active) != 0); 179 BUG_ON(atomic_read(&nmi_active) != 0);
@@ -255,7 +286,7 @@ static int setup_k7_watchdog(unsigned nmi_hz)
255 return 1; 286 return 1;
256} 287}
257 288
258static void single_msr_stop_watchdog(void *arg) 289static void single_msr_stop_watchdog(void)
259{ 290{
260 struct nmi_watchdog_ctlblk *wd = &__get_cpu_var(nmi_watchdog_ctlblk); 291 struct nmi_watchdog_ctlblk *wd = &__get_cpu_var(nmi_watchdog_ctlblk);
261 292
@@ -276,8 +307,8 @@ static int single_msr_reserve(void)
276 307
277static void single_msr_unreserve(void) 308static void single_msr_unreserve(void)
278{ 309{
279 release_evntsel_nmi(wd_ops->perfctr); 310 release_evntsel_nmi(wd_ops->evntsel);
280 release_perfctr_nmi(wd_ops->evntsel); 311 release_perfctr_nmi(wd_ops->perfctr);
281} 312}
282 313
283static void single_msr_rearm(struct nmi_watchdog_ctlblk *wd, unsigned nmi_hz) 314static void single_msr_rearm(struct nmi_watchdog_ctlblk *wd, unsigned nmi_hz)
@@ -442,7 +473,7 @@ static int setup_p4_watchdog(unsigned nmi_hz)
442 return 1; 473 return 1;
443} 474}
444 475
445static void stop_p4_watchdog(void *arg) 476static void stop_p4_watchdog(void)
446{ 477{
447 struct nmi_watchdog_ctlblk *wd = &__get_cpu_var(nmi_watchdog_ctlblk); 478 struct nmi_watchdog_ctlblk *wd = &__get_cpu_var(nmi_watchdog_ctlblk);
448 wrmsr(wd->cccr_msr, 0, 0); 479 wrmsr(wd->cccr_msr, 0, 0);
@@ -475,10 +506,10 @@ static void p4_unreserve(void)
475{ 506{
476#ifdef CONFIG_SMP 507#ifdef CONFIG_SMP
477 if (smp_num_siblings > 1) 508 if (smp_num_siblings > 1)
478 release_evntsel_nmi(MSR_P4_IQ_PERFCTR1); 509 release_perfctr_nmi(MSR_P4_IQ_PERFCTR1);
479#endif 510#endif
480 release_evntsel_nmi(MSR_P4_IQ_PERFCTR0); 511 release_evntsel_nmi(MSR_P4_CRU_ESCR0);
481 release_perfctr_nmi(MSR_P4_CRU_ESCR0); 512 release_perfctr_nmi(MSR_P4_IQ_PERFCTR0);
482} 513}
483 514
484static void p4_rearm(struct nmi_watchdog_ctlblk *wd, unsigned nmi_hz) 515static void p4_rearm(struct nmi_watchdog_ctlblk *wd, unsigned nmi_hz)
@@ -614,6 +645,12 @@ int lapic_watchdog_init(unsigned nmi_hz)
614 probe_nmi_watchdog(); 645 probe_nmi_watchdog();
615 if (!wd_ops) 646 if (!wd_ops)
616 return -1; 647 return -1;
648
649 if (!wd_ops->reserve()) {
650 printk(KERN_ERR
651 "NMI watchdog: cannot reserve perfctrs\n");
652 return -1;
653 }
617 } 654 }
618 655
619 if (!(wd_ops->setup(nmi_hz))) { 656 if (!(wd_ops->setup(nmi_hz))) {
@@ -628,7 +665,7 @@ int lapic_watchdog_init(unsigned nmi_hz)
628void lapic_watchdog_stop(void) 665void lapic_watchdog_stop(void)
629{ 666{
630 if (wd_ops) 667 if (wd_ops)
631 wd_ops->stop(NULL); 668 wd_ops->stop();
632} 669}
633 670
634unsigned lapic_adjust_nmi_hz(unsigned hz) 671unsigned lapic_adjust_nmi_hz(unsigned hz)
diff --git a/arch/i386/kernel/cpu/proc.c b/arch/i386/kernel/cpu/proc.c
index 89d91e6cc972..1e31b6caffb1 100644
--- a/arch/i386/kernel/cpu/proc.c
+++ b/arch/i386/kernel/cpu/proc.c
@@ -29,7 +29,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
29 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 29 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
30 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL, 30 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
31 NULL, NULL, NULL, "mp", "nx", NULL, "mmxext", NULL, 31 NULL, NULL, NULL, "mp", "nx", NULL, "mmxext", NULL,
32 NULL, "fxsr_opt", "pdpe1gb", "rdtscp", NULL, "lm", "3dnowext", "3dnow", 32 NULL, "fxsr_opt", "pdpe1gb", "rdtscp", NULL, "lm",
33 "3dnowext", "3dnow",
33 34
34 /* Transmeta-defined */ 35 /* Transmeta-defined */
35 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL, 36 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
@@ -40,8 +41,9 @@ static int show_cpuinfo(struct seq_file *m, void *v)
40 /* Other (Linux-defined) */ 41 /* Other (Linux-defined) */
41 "cxmmx", "k6_mtrr", "cyrix_arr", "centaur_mcr", 42 "cxmmx", "k6_mtrr", "cyrix_arr", "centaur_mcr",
42 NULL, NULL, NULL, NULL, 43 NULL, NULL, NULL, NULL,
43 "constant_tsc", "up", NULL, NULL, NULL, NULL, NULL, NULL, 44 "constant_tsc", "up", NULL, "arch_perfmon",
44 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 45 "pebs", "bts", NULL, "sync_rdtsc",
46 "rep_good", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
45 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 47 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
46 48
47 /* Intel-defined (#2) */ 49 /* Intel-defined (#2) */
@@ -57,9 +59,16 @@ static int show_cpuinfo(struct seq_file *m, void *v)
57 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 59 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
58 60
59 /* AMD-defined (#2) */ 61 /* AMD-defined (#2) */
60 "lahf_lm", "cmp_legacy", "svm", "extapic", "cr8legacy", "abm", 62 "lahf_lm", "cmp_legacy", "svm", "extapic", "cr8_legacy",
61 "sse4a", "misalignsse", 63 "altmovcr8", "abm", "sse4a",
62 "3dnowprefetch", "osvw", "ibs", NULL, NULL, NULL, NULL, NULL, 64 "misalignsse", "3dnowprefetch",
65 "osvw", "ibs", NULL, NULL, NULL, NULL,
66 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
67 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
68
69 /* Auxiliary (Linux-defined) */
70 "ida", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
71 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
63 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 72 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
64 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 73 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
65 }; 74 };
diff --git a/arch/i386/kernel/e820.c b/arch/i386/kernel/e820.c
index 9645bb51f76a..fc822a46897a 100644
--- a/arch/i386/kernel/e820.c
+++ b/arch/i386/kernel/e820.c
@@ -734,7 +734,7 @@ void __init print_memory_map(char *who)
734 case E820_NVS: 734 case E820_NVS:
735 printk("(ACPI NVS)\n"); 735 printk("(ACPI NVS)\n");
736 break; 736 break;
737 default: printk("type %lu\n", e820.map[i].type); 737 default: printk("type %u\n", e820.map[i].type);
738 break; 738 break;
739 } 739 }
740 } 740 }
diff --git a/arch/i386/kernel/entry.S b/arch/i386/kernel/entry.S
index b1f16ee65e4d..3c3c220488c9 100644
--- a/arch/i386/kernel/entry.S
+++ b/arch/i386/kernel/entry.S
@@ -367,10 +367,6 @@ ENTRY(system_call)
367 CFI_ADJUST_CFA_OFFSET 4 367 CFI_ADJUST_CFA_OFFSET 4
368 SAVE_ALL 368 SAVE_ALL
369 GET_THREAD_INFO(%ebp) 369 GET_THREAD_INFO(%ebp)
370 testl $TF_MASK,PT_EFLAGS(%esp)
371 jz no_singlestep
372 orl $_TIF_SINGLESTEP,TI_flags(%ebp)
373no_singlestep:
374 # system call tracing in operation / emulation 370 # system call tracing in operation / emulation
375 /* Note, _TIF_SECCOMP is bit number 8, and so it needs testw and not testb */ 371 /* Note, _TIF_SECCOMP is bit number 8, and so it needs testw and not testb */
376 testw $(_TIF_SYSCALL_EMU|_TIF_SYSCALL_TRACE|_TIF_SECCOMP|_TIF_SYSCALL_AUDIT),TI_flags(%ebp) 372 testw $(_TIF_SYSCALL_EMU|_TIF_SYSCALL_TRACE|_TIF_SECCOMP|_TIF_SYSCALL_AUDIT),TI_flags(%ebp)
@@ -385,6 +381,10 @@ syscall_exit:
385 # setting need_resched or sigpending 381 # setting need_resched or sigpending
386 # between sampling and the iret 382 # between sampling and the iret
387 TRACE_IRQS_OFF 383 TRACE_IRQS_OFF
384 testl $TF_MASK,PT_EFLAGS(%esp) # If tracing set singlestep flag on exit
385 jz no_singlestep
386 orl $_TIF_SINGLESTEP,TI_flags(%ebp)
387no_singlestep:
388 movl TI_flags(%ebp), %ecx 388 movl TI_flags(%ebp), %ecx
389 testw $_TIF_ALLWORK_MASK, %cx # current->work 389 testw $_TIF_ALLWORK_MASK, %cx # current->work
390 jne syscall_exit_work 390 jne syscall_exit_work
diff --git a/arch/i386/kernel/microcode.c b/arch/i386/kernel/microcode.c
index 83f825f2e2d7..d865d041bea1 100644
--- a/arch/i386/kernel/microcode.c
+++ b/arch/i386/kernel/microcode.c
@@ -478,7 +478,7 @@ static int __init microcode_dev_init (void)
478 return 0; 478 return 0;
479} 479}
480 480
481static void __exit microcode_dev_exit (void) 481static void microcode_dev_exit (void)
482{ 482{
483 misc_deregister(&microcode_dev); 483 misc_deregister(&microcode_dev);
484} 484}
diff --git a/arch/i386/kernel/pci-dma.c b/arch/i386/kernel/pci-dma.c
index 30b754f7cbec..048f09b62553 100644
--- a/arch/i386/kernel/pci-dma.c
+++ b/arch/i386/kernel/pci-dma.c
@@ -12,6 +12,7 @@
12#include <linux/string.h> 12#include <linux/string.h>
13#include <linux/pci.h> 13#include <linux/pci.h>
14#include <linux/module.h> 14#include <linux/module.h>
15#include <linux/pci.h>
15#include <asm/io.h> 16#include <asm/io.h>
16 17
17struct dma_coherent_mem { 18struct dma_coherent_mem {
@@ -148,3 +149,29 @@ void *dma_mark_declared_memory_occupied(struct device *dev,
148 return mem->virt_base + (pos << PAGE_SHIFT); 149 return mem->virt_base + (pos << PAGE_SHIFT);
149} 150}
150EXPORT_SYMBOL(dma_mark_declared_memory_occupied); 151EXPORT_SYMBOL(dma_mark_declared_memory_occupied);
152
153#ifdef CONFIG_PCI
154/* Many VIA bridges seem to corrupt data for DAC. Disable it here */
155
156int forbid_dac;
157EXPORT_SYMBOL(forbid_dac);
158
159static __devinit void via_no_dac(struct pci_dev *dev)
160{
161 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI && forbid_dac == 0) {
162 printk(KERN_INFO "PCI: VIA PCI bridge detected. Disabling DAC.\n");
163 forbid_dac = 1;
164 }
165}
166DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_ANY_ID, via_no_dac);
167
168static int check_iommu(char *s)
169{
170 if (!strcmp(s, "usedac")) {
171 forbid_dac = -1;
172 return 1;
173 }
174 return 0;
175}
176__setup("iommu=", check_iommu);
177#endif
diff --git a/arch/i386/kernel/quirks.c b/arch/i386/kernel/quirks.c
index 9f6ab1789bb0..6722469c2633 100644
--- a/arch/i386/kernel/quirks.c
+++ b/arch/i386/kernel/quirks.c
@@ -20,8 +20,6 @@ static void __devinit quirk_intel_irqbalance(struct pci_dev *dev)
20 if (rev > 0x9) 20 if (rev > 0x9)
21 return; 21 return;
22 22
23 printk(KERN_INFO "Intel E7520/7320/7525 detected.");
24
25 /* enable access to config space*/ 23 /* enable access to config space*/
26 pci_read_config_byte(dev, 0xf4, &config); 24 pci_read_config_byte(dev, 0xf4, &config);
27 pci_write_config_byte(dev, 0xf4, config|0x2); 25 pci_write_config_byte(dev, 0xf4, config|0x2);
@@ -30,7 +28,8 @@ static void __devinit quirk_intel_irqbalance(struct pci_dev *dev)
30 raw_pci_ops->read(0, 0, 0x40, 0x4c, 2, &word); 28 raw_pci_ops->read(0, 0, 0x40, 0x4c, 2, &word);
31 29
32 if (!(word & (1 << 13))) { 30 if (!(word & (1 << 13))) {
33 printk(KERN_INFO "Disabling irq balancing and affinity\n"); 31 printk(KERN_INFO "Intel E7520/7320/7525 detected. "
32 "Disabling irq balancing and affinity\n");
34#ifdef CONFIG_IRQBALANCE 33#ifdef CONFIG_IRQBALANCE
35 irqbalance_disable(""); 34 irqbalance_disable("");
36#endif 35#endif
diff --git a/arch/i386/kernel/reboot.c b/arch/i386/kernel/reboot.c
index 50dfc65319cd..5513f8d5b5be 100644
--- a/arch/i386/kernel/reboot.c
+++ b/arch/i386/kernel/reboot.c
@@ -89,6 +89,14 @@ static int __init set_bios_reboot(struct dmi_system_id *d)
89} 89}
90 90
91static struct dmi_system_id __initdata reboot_dmi_table[] = { 91static struct dmi_system_id __initdata reboot_dmi_table[] = {
92 { /* Handle problems with rebooting on Dell E520's */
93 .callback = set_bios_reboot,
94 .ident = "Dell E520",
95 .matches = {
96 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
97 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DM061"),
98 },
99 },
92 { /* Handle problems with rebooting on Dell 1300's */ 100 { /* Handle problems with rebooting on Dell 1300's */
93 .callback = set_bios_reboot, 101 .callback = set_bios_reboot,
94 .ident = "Dell PowerEdge 1300", 102 .ident = "Dell PowerEdge 1300",
diff --git a/arch/i386/kernel/reboot_fixups.c b/arch/i386/kernel/reboot_fixups.c
index 2d78d918340f..03e1cce58f49 100644
--- a/arch/i386/kernel/reboot_fixups.c
+++ b/arch/i386/kernel/reboot_fixups.c
@@ -5,12 +5,14 @@
5 * 5 *
6 * List of supported fixups: 6 * List of supported fixups:
7 * geode-gx1/cs5530a - Jaya Kumar <jayalk@intworks.biz> 7 * geode-gx1/cs5530a - Jaya Kumar <jayalk@intworks.biz>
8 * geode-gx/lx/cs5536 - Andres Salomon <dilinger@debian.org>
8 * 9 *
9 */ 10 */
10 11
11#include <asm/delay.h> 12#include <asm/delay.h>
12#include <linux/pci.h> 13#include <linux/pci.h>
13#include <asm/reboot_fixups.h> 14#include <asm/reboot_fixups.h>
15#include <asm/msr.h>
14 16
15static void cs5530a_warm_reset(struct pci_dev *dev) 17static void cs5530a_warm_reset(struct pci_dev *dev)
16{ 18{
@@ -21,6 +23,16 @@ static void cs5530a_warm_reset(struct pci_dev *dev)
21 return; 23 return;
22} 24}
23 25
26static void cs5536_warm_reset(struct pci_dev *dev)
27{
28 /*
29 * 6.6.2.12 Soft Reset (DIVIL_SOFT_RESET)
30 * writing 1 to the LSB of this MSR causes a hard reset.
31 */
32 wrmsrl(0x51400017, 1ULL);
33 udelay(50); /* shouldn't get here but be safe and spin a while */
34}
35
24struct device_fixup { 36struct device_fixup {
25 unsigned int vendor; 37 unsigned int vendor;
26 unsigned int device; 38 unsigned int device;
@@ -29,6 +41,7 @@ struct device_fixup {
29 41
30static struct device_fixup fixups_table[] = { 42static struct device_fixup fixups_table[] = {
31{ PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY, cs5530a_warm_reset }, 43{ PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY, cs5530a_warm_reset },
44{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, cs5536_warm_reset },
32}; 45};
33 46
34/* 47/*
diff --git a/arch/i386/kernel/setup.c b/arch/i386/kernel/setup.c
index 698c24fe482e..2d61e65eeb50 100644
--- a/arch/i386/kernel/setup.c
+++ b/arch/i386/kernel/setup.c
@@ -102,19 +102,10 @@ static unsigned int highmem_pages = -1;
102/* 102/*
103 * Setup options 103 * Setup options
104 */ 104 */
105struct drive_info_struct { char dummy[32]; } drive_info;
106#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_HD) || \
107 defined(CONFIG_BLK_DEV_IDE_MODULE) || defined(CONFIG_BLK_DEV_HD_MODULE)
108EXPORT_SYMBOL(drive_info);
109#endif
110struct screen_info screen_info; 105struct screen_info screen_info;
111EXPORT_SYMBOL(screen_info); 106EXPORT_SYMBOL(screen_info);
112struct apm_info apm_info; 107struct apm_info apm_info;
113EXPORT_SYMBOL(apm_info); 108EXPORT_SYMBOL(apm_info);
114struct sys_desc_table_struct {
115 unsigned short length;
116 unsigned char table[0];
117};
118struct edid_info edid_info; 109struct edid_info edid_info;
119EXPORT_SYMBOL_GPL(edid_info); 110EXPORT_SYMBOL_GPL(edid_info);
120struct ist_info ist_info; 111struct ist_info ist_info;
@@ -134,7 +125,7 @@ unsigned long saved_videomode;
134 125
135static char __initdata command_line[COMMAND_LINE_SIZE]; 126static char __initdata command_line[COMMAND_LINE_SIZE];
136 127
137unsigned char __initdata boot_params[PARAM_SIZE]; 128struct boot_params __initdata boot_params;
138 129
139#if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE) 130#if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
140struct edd edd; 131struct edd edd;
@@ -528,7 +519,6 @@ void __init setup_arch(char **cmdline_p)
528#endif 519#endif
529 520
530 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV); 521 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
531 drive_info = DRIVE_INFO;
532 screen_info = SCREEN_INFO; 522 screen_info = SCREEN_INFO;
533 edid_info = EDID_INFO; 523 edid_info = EDID_INFO;
534 apm_info.bios = APM_BIOS_INFO; 524 apm_info.bios = APM_BIOS_INFO;
diff --git a/arch/i386/kernel/smp.c b/arch/i386/kernel/smp.c
index 706bda72dc60..6299c080f6e2 100644
--- a/arch/i386/kernel/smp.c
+++ b/arch/i386/kernel/smp.c
@@ -421,7 +421,7 @@ void flush_tlb_mm (struct mm_struct * mm)
421 } 421 }
422 if (!cpus_empty(cpu_mask)) 422 if (!cpus_empty(cpu_mask))
423 flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL); 423 flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL);
424 check_pgt_cache(); 424
425 preempt_enable(); 425 preempt_enable();
426} 426}
427 427
@@ -467,7 +467,7 @@ void flush_tlb_all(void)
467 * it goes straight through and wastes no time serializing 467 * it goes straight through and wastes no time serializing
468 * anything. Worst case is that we lose a reschedule ... 468 * anything. Worst case is that we lose a reschedule ...
469 */ 469 */
470void native_smp_send_reschedule(int cpu) 470static void native_smp_send_reschedule(int cpu)
471{ 471{
472 WARN_ON(cpu_is_offline(cpu)); 472 WARN_ON(cpu_is_offline(cpu));
473 send_IPI_mask(cpumask_of_cpu(cpu), RESCHEDULE_VECTOR); 473 send_IPI_mask(cpumask_of_cpu(cpu), RESCHEDULE_VECTOR);
@@ -546,9 +546,10 @@ static void __smp_call_function(void (*func) (void *info), void *info,
546 * You must not call this function with disabled interrupts or from a 546 * You must not call this function with disabled interrupts or from a
547 * hardware interrupt handler or from a bottom half handler. 547 * hardware interrupt handler or from a bottom half handler.
548 */ 548 */
549int native_smp_call_function_mask(cpumask_t mask, 549static int
550 void (*func)(void *), void *info, 550native_smp_call_function_mask(cpumask_t mask,
551 int wait) 551 void (*func)(void *), void *info,
552 int wait)
552{ 553{
553 struct call_data_struct data; 554 struct call_data_struct data;
554 cpumask_t allbutself; 555 cpumask_t allbutself;
@@ -599,60 +600,6 @@ int native_smp_call_function_mask(cpumask_t mask,
599 return 0; 600 return 0;
600} 601}
601 602
602/**
603 * smp_call_function(): Run a function on all other CPUs.
604 * @func: The function to run. This must be fast and non-blocking.
605 * @info: An arbitrary pointer to pass to the function.
606 * @nonatomic: Unused.
607 * @wait: If true, wait (atomically) until function has completed on other CPUs.
608 *
609 * Returns 0 on success, else a negative status code.
610 *
611 * If @wait is true, then returns once @func has returned; otherwise
612 * it returns just before the target cpu calls @func.
613 *
614 * You must not call this function with disabled interrupts or from a
615 * hardware interrupt handler or from a bottom half handler.
616 */
617int smp_call_function(void (*func) (void *info), void *info, int nonatomic,
618 int wait)
619{
620 return smp_call_function_mask(cpu_online_map, func, info, wait);
621}
622EXPORT_SYMBOL(smp_call_function);
623
624/**
625 * smp_call_function_single - Run a function on another CPU
626 * @cpu: The target CPU. Cannot be the calling CPU.
627 * @func: The function to run. This must be fast and non-blocking.
628 * @info: An arbitrary pointer to pass to the function.
629 * @nonatomic: Unused.
630 * @wait: If true, wait until function has completed on other CPUs.
631 *
632 * Returns 0 on success, else a negative status code.
633 *
634 * If @wait is true, then returns once @func has returned; otherwise
635 * it returns just before the target cpu calls @func.
636 */
637int smp_call_function_single(int cpu, void (*func) (void *info), void *info,
638 int nonatomic, int wait)
639{
640 /* prevent preemption and reschedule on another processor */
641 int ret;
642 int me = get_cpu();
643 if (cpu == me) {
644 WARN_ON(1);
645 put_cpu();
646 return -EBUSY;
647 }
648
649 ret = smp_call_function_mask(cpumask_of_cpu(cpu), func, info, wait);
650
651 put_cpu();
652 return ret;
653}
654EXPORT_SYMBOL(smp_call_function_single);
655
656static void stop_this_cpu (void * dummy) 603static void stop_this_cpu (void * dummy)
657{ 604{
658 local_irq_disable(); 605 local_irq_disable();
@@ -670,7 +617,7 @@ static void stop_this_cpu (void * dummy)
670 * this function calls the 'stop' function on all other CPUs in the system. 617 * this function calls the 'stop' function on all other CPUs in the system.
671 */ 618 */
672 619
673void native_smp_send_stop(void) 620static void native_smp_send_stop(void)
674{ 621{
675 /* Don't deadlock on the call lock in panic */ 622 /* Don't deadlock on the call lock in panic */
676 int nolock = !spin_trylock(&call_lock); 623 int nolock = !spin_trylock(&call_lock);
diff --git a/arch/i386/kernel/smpboot.c b/arch/i386/kernel/smpboot.c
index b92cc4e8b3bb..0b2954534b8e 100644
--- a/arch/i386/kernel/smpboot.c
+++ b/arch/i386/kernel/smpboot.c
@@ -98,9 +98,6 @@ EXPORT_SYMBOL(x86_cpu_to_apicid);
98 98
99u8 apicid_2_node[MAX_APICID]; 99u8 apicid_2_node[MAX_APICID];
100 100
101DEFINE_PER_CPU(unsigned long, this_cpu_off);
102EXPORT_PER_CPU_SYMBOL(this_cpu_off);
103
104/* 101/*
105 * Trampoline 80x86 program as an array. 102 * Trampoline 80x86 program as an array.
106 */ 103 */
@@ -763,25 +760,6 @@ static inline struct task_struct * alloc_idle_task(int cpu)
763#define alloc_idle_task(cpu) fork_idle(cpu) 760#define alloc_idle_task(cpu) fork_idle(cpu)
764#endif 761#endif
765 762
766/* Initialize the CPU's GDT. This is either the boot CPU doing itself
767 (still using the master per-cpu area), or a CPU doing it for a
768 secondary which will soon come up. */
769static __cpuinit void init_gdt(int cpu)
770{
771 struct desc_struct *gdt = get_cpu_gdt_table(cpu);
772
773 pack_descriptor((u32 *)&gdt[GDT_ENTRY_PERCPU].a,
774 (u32 *)&gdt[GDT_ENTRY_PERCPU].b,
775 __per_cpu_offset[cpu], 0xFFFFF,
776 0x80 | DESCTYPE_S | 0x2, 0x8);
777
778 per_cpu(this_cpu_off, cpu) = __per_cpu_offset[cpu];
779 per_cpu(cpu_number, cpu) = cpu;
780}
781
782/* Defined in head.S */
783extern struct Xgt_desc_struct early_gdt_descr;
784
785static int __cpuinit do_boot_cpu(int apicid, int cpu) 763static int __cpuinit do_boot_cpu(int apicid, int cpu)
786/* 764/*
787 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad 765 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
@@ -963,18 +941,6 @@ exit:
963} 941}
964#endif 942#endif
965 943
966static void smp_tune_scheduling(void)
967{
968 unsigned long cachesize; /* kB */
969
970 if (cpu_khz) {
971 cachesize = boot_cpu_data.x86_cache_size;
972
973 if (cachesize > 0)
974 max_cache_size = cachesize * 1024;
975 }
976}
977
978/* 944/*
979 * Cycle through the processors sending APIC IPIs to boot each. 945 * Cycle through the processors sending APIC IPIs to boot each.
980 */ 946 */
@@ -1003,7 +969,6 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
1003 x86_cpu_to_apicid[0] = boot_cpu_physical_apicid; 969 x86_cpu_to_apicid[0] = boot_cpu_physical_apicid;
1004 970
1005 current_thread_info()->cpu = 0; 971 current_thread_info()->cpu = 0;
1006 smp_tune_scheduling();
1007 972
1008 set_cpu_sibling_map(0); 973 set_cpu_sibling_map(0);
1009 974
diff --git a/arch/i386/kernel/smpcommon.c b/arch/i386/kernel/smpcommon.c
new file mode 100644
index 000000000000..1868ae18eb4d
--- /dev/null
+++ b/arch/i386/kernel/smpcommon.c
@@ -0,0 +1,79 @@
1/*
2 * SMP stuff which is common to all sub-architectures.
3 */
4#include <linux/module.h>
5#include <asm/smp.h>
6
7DEFINE_PER_CPU(unsigned long, this_cpu_off);
8EXPORT_PER_CPU_SYMBOL(this_cpu_off);
9
10/* Initialize the CPU's GDT. This is either the boot CPU doing itself
11 (still using the master per-cpu area), or a CPU doing it for a
12 secondary which will soon come up. */
13__cpuinit void init_gdt(int cpu)
14{
15 struct desc_struct *gdt = get_cpu_gdt_table(cpu);
16
17 pack_descriptor((u32 *)&gdt[GDT_ENTRY_PERCPU].a,
18 (u32 *)&gdt[GDT_ENTRY_PERCPU].b,
19 __per_cpu_offset[cpu], 0xFFFFF,
20 0x80 | DESCTYPE_S | 0x2, 0x8);
21
22 per_cpu(this_cpu_off, cpu) = __per_cpu_offset[cpu];
23 per_cpu(cpu_number, cpu) = cpu;
24}
25
26
27/**
28 * smp_call_function(): Run a function on all other CPUs.
29 * @func: The function to run. This must be fast and non-blocking.
30 * @info: An arbitrary pointer to pass to the function.
31 * @nonatomic: Unused.
32 * @wait: If true, wait (atomically) until function has completed on other CPUs.
33 *
34 * Returns 0 on success, else a negative status code.
35 *
36 * If @wait is true, then returns once @func has returned; otherwise
37 * it returns just before the target cpu calls @func.
38 *
39 * You must not call this function with disabled interrupts or from a
40 * hardware interrupt handler or from a bottom half handler.
41 */
42int smp_call_function(void (*func) (void *info), void *info, int nonatomic,
43 int wait)
44{
45 return smp_call_function_mask(cpu_online_map, func, info, wait);
46}
47EXPORT_SYMBOL(smp_call_function);
48
49/**
50 * smp_call_function_single - Run a function on another CPU
51 * @cpu: The target CPU. Cannot be the calling CPU.
52 * @func: The function to run. This must be fast and non-blocking.
53 * @info: An arbitrary pointer to pass to the function.
54 * @nonatomic: Unused.
55 * @wait: If true, wait until function has completed on other CPUs.
56 *
57 * Returns 0 on success, else a negative status code.
58 *
59 * If @wait is true, then returns once @func has returned; otherwise
60 * it returns just before the target cpu calls @func.
61 */
62int smp_call_function_single(int cpu, void (*func) (void *info), void *info,
63 int nonatomic, int wait)
64{
65 /* prevent preemption and reschedule on another processor */
66 int ret;
67 int me = get_cpu();
68 if (cpu == me) {
69 WARN_ON(1);
70 put_cpu();
71 return -EBUSY;
72 }
73
74 ret = smp_call_function_mask(cpumask_of_cpu(cpu), func, info, wait);
75
76 put_cpu();
77 return ret;
78}
79EXPORT_SYMBOL(smp_call_function_single);
diff --git a/arch/i386/kernel/traps.c b/arch/i386/kernel/traps.c
index c05e7e861b29..90da0575fcff 100644
--- a/arch/i386/kernel/traps.c
+++ b/arch/i386/kernel/traps.c
@@ -733,11 +733,6 @@ static __kprobes void default_do_nmi(struct pt_regs * regs)
733 */ 733 */
734 if (nmi_watchdog_tick(regs, reason)) 734 if (nmi_watchdog_tick(regs, reason))
735 return; 735 return;
736#endif
737 if (notify_die(DIE_NMI_POST, "nmi_post", regs, reason, 2, 0)
738 == NOTIFY_STOP)
739 return;
740#ifdef CONFIG_X86_LOCAL_APIC
741 if (!do_nmi_callback(regs, smp_processor_id())) 736 if (!do_nmi_callback(regs, smp_processor_id()))
742#endif 737#endif
743 unknown_nmi_error(reason, regs); 738 unknown_nmi_error(reason, regs);
diff --git a/arch/i386/kernel/tsc.c b/arch/i386/kernel/tsc.c
index f64b81f3033b..ea63a30ca3e8 100644
--- a/arch/i386/kernel/tsc.c
+++ b/arch/i386/kernel/tsc.c
@@ -4,6 +4,7 @@
4 * See comments there for proper credits. 4 * See comments there for proper credits.
5 */ 5 */
6 6
7#include <linux/sched.h>
7#include <linux/clocksource.h> 8#include <linux/clocksource.h>
8#include <linux/workqueue.h> 9#include <linux/workqueue.h>
9#include <linux/cpufreq.h> 10#include <linux/cpufreq.h>
@@ -106,8 +107,13 @@ unsigned long long sched_clock(void)
106 107
107 /* 108 /*
108 * Fall back to jiffies if there's no TSC available: 109 * Fall back to jiffies if there's no TSC available:
110 * ( But note that we still use it if the TSC is marked
111 * unstable. We do this because unlike Time Of Day,
112 * the scheduler clock tolerates small errors and it's
113 * very important for it to be as fast as the platform
114 * can achive it. )
109 */ 115 */
110 if (unlikely(!tsc_enabled)) 116 if (unlikely(!tsc_enabled && !tsc_unstable))
111 /* No locking but a rare wrong value is not a big deal: */ 117 /* No locking but a rare wrong value is not a big deal: */
112 return (jiffies_64 - INITIAL_JIFFIES) * (1000000000 / HZ); 118 return (jiffies_64 - INITIAL_JIFFIES) * (1000000000 / HZ);
113 119
@@ -277,6 +283,7 @@ static struct clocksource clocksource_tsc = {
277 283
278void mark_tsc_unstable(char *reason) 284void mark_tsc_unstable(char *reason)
279{ 285{
286 sched_clock_unstable_event();
280 if (!tsc_unstable) { 287 if (!tsc_unstable) {
281 tsc_unstable = 1; 288 tsc_unstable = 1;
282 tsc_enabled = 0; 289 tsc_enabled = 0;
diff --git a/arch/i386/kernel/verify_cpu.S b/arch/i386/kernel/verify_cpu.S
deleted file mode 100644
index b2a9d80b6421..000000000000
--- a/arch/i386/kernel/verify_cpu.S
+++ /dev/null
@@ -1,67 +0,0 @@
1/* Check if CPU has some minimum CPUID bits
2 This runs in 16bit mode so that the caller can still use the BIOS
3 to output errors on the screen */
4#include <asm/cpufeature.h>
5
6verify_cpu:
7 pushfl # Save caller passed flags
8 pushl $0 # Kill any dangerous flags
9 popfl
10
11#if CONFIG_X86_MINIMUM_CPU_MODEL >= 4
12 pushfl
13 pop %eax
14 orl $(1<<18),%eax # try setting AC
15 push %eax
16 popfl
17 pushfl
18 popl %eax
19 testl $(1<<18),%eax
20 jz bad
21#endif
22#if REQUIRED_MASK1 != 0
23 pushfl # standard way to check for cpuid
24 popl %eax
25 movl %eax,%ebx
26 xorl $0x200000,%eax
27 pushl %eax
28 popfl
29 pushfl
30 popl %eax
31 cmpl %eax,%ebx
32 pushfl # standard way to check for cpuid
33 popl %eax
34 movl %eax,%ebx
35 xorl $0x200000,%eax
36 pushl %eax
37 popfl
38 pushfl
39 popl %eax
40 cmpl %eax,%ebx
41 jz bad # REQUIRED_MASK1 != 0 requires CPUID
42
43 movl $0x0,%eax # See if cpuid 1 is implemented
44 cpuid
45 cmpl $0x1,%eax
46 jb bad # no cpuid 1
47
48 movl $0x1,%eax # Does the cpu have what it takes
49 cpuid
50
51#if CONFIG_X86_MINIMUM_CPU_MODEL > 4
52#error add proper model checking here
53#endif
54
55 andl $REQUIRED_MASK1,%edx
56 xorl $REQUIRED_MASK1,%edx
57 jnz bad
58#endif /* REQUIRED_MASK1 */
59
60 popfl
61 xor %eax,%eax
62 ret
63
64bad:
65 popfl
66 movl $1,%eax
67 ret
diff --git a/arch/i386/kernel/vmi.c b/arch/i386/kernel/vmi.c
index c8726c424b35..c12720d7cbc5 100644
--- a/arch/i386/kernel/vmi.c
+++ b/arch/i386/kernel/vmi.c
@@ -27,6 +27,7 @@
27#include <linux/bootmem.h> 27#include <linux/bootmem.h>
28#include <linux/mm.h> 28#include <linux/mm.h>
29#include <linux/highmem.h> 29#include <linux/highmem.h>
30#include <linux/sched.h>
30#include <asm/vmi.h> 31#include <asm/vmi.h>
31#include <asm/io.h> 32#include <asm/io.h>
32#include <asm/fixmap.h> 33#include <asm/fixmap.h>
diff --git a/arch/i386/kernel/vmlinux.lds.S b/arch/i386/kernel/vmlinux.lds.S
index 80bec6640230..aa87b06c7c82 100644
--- a/arch/i386/kernel/vmlinux.lds.S
+++ b/arch/i386/kernel/vmlinux.lds.S
@@ -44,7 +44,7 @@ SECTIONS
44 44
45 /* read-only */ 45 /* read-only */
46 .text : AT(ADDR(.text) - LOAD_OFFSET) { 46 .text : AT(ADDR(.text) - LOAD_OFFSET) {
47 *(.text) 47 TEXT_TEXT
48 SCHED_TEXT 48 SCHED_TEXT
49 LOCK_TEXT 49 LOCK_TEXT
50 KPROBES_TEXT 50 KPROBES_TEXT
@@ -74,7 +74,7 @@ SECTIONS
74 /* writeable */ 74 /* writeable */
75 . = ALIGN(4096); 75 . = ALIGN(4096);
76 .data : AT(ADDR(.data) - LOAD_OFFSET) { /* Data */ 76 .data : AT(ADDR(.data) - LOAD_OFFSET) { /* Data */
77 *(.data) 77 DATA_DATA
78 CONSTRUCTORS 78 CONSTRUCTORS
79 } :data 79 } :data
80 80