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Diffstat (limited to 'arch/i386/kernel/time_hpet.c')
-rw-r--r--arch/i386/kernel/time_hpet.c48
1 files changed, 27 insertions, 21 deletions
diff --git a/arch/i386/kernel/time_hpet.c b/arch/i386/kernel/time_hpet.c
index 244a31b04be7..10a0cbb88e75 100644
--- a/arch/i386/kernel/time_hpet.c
+++ b/arch/i386/kernel/time_hpet.c
@@ -26,6 +26,7 @@
26static unsigned long hpet_period; /* fsecs / HPET clock */ 26static unsigned long hpet_period; /* fsecs / HPET clock */
27unsigned long hpet_tick; /* hpet clks count per tick */ 27unsigned long hpet_tick; /* hpet clks count per tick */
28unsigned long hpet_address; /* hpet memory map physical address */ 28unsigned long hpet_address; /* hpet memory map physical address */
29int hpet_use_timer;
29 30
30static int use_hpet; /* can be used for runtime check of hpet */ 31static int use_hpet; /* can be used for runtime check of hpet */
31static int boot_hpet_disable; /* boottime override for HPET timer */ 32static int boot_hpet_disable; /* boottime override for HPET timer */
@@ -73,27 +74,30 @@ static int hpet_timer_stop_set_go(unsigned long tick)
73 hpet_writel(0, HPET_COUNTER); 74 hpet_writel(0, HPET_COUNTER);
74 hpet_writel(0, HPET_COUNTER + 4); 75 hpet_writel(0, HPET_COUNTER + 4);
75 76
76 /* 77 if (hpet_use_timer) {
77 * Set up timer 0, as periodic with first interrupt to happen at 78 /*
78 * hpet_tick, and period also hpet_tick. 79 * Set up timer 0, as periodic with first interrupt to happen at
79 */ 80 * hpet_tick, and period also hpet_tick.
80 cfg = hpet_readl(HPET_T0_CFG); 81 */
81 cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC | 82 cfg = hpet_readl(HPET_T0_CFG);
82 HPET_TN_SETVAL | HPET_TN_32BIT; 83 cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
83 hpet_writel(cfg, HPET_T0_CFG); 84 HPET_TN_SETVAL | HPET_TN_32BIT;
84 85 hpet_writel(cfg, HPET_T0_CFG);
85 /*
86 * The first write after writing TN_SETVAL to the config register sets
87 * the counter value, the second write sets the threshold.
88 */
89 hpet_writel(tick, HPET_T0_CMP);
90 hpet_writel(tick, HPET_T0_CMP);
91 86
87 /*
88 * The first write after writing TN_SETVAL to the config register sets
89 * the counter value, the second write sets the threshold.
90 */
91 hpet_writel(tick, HPET_T0_CMP);
92 hpet_writel(tick, HPET_T0_CMP);
93 }
92 /* 94 /*
93 * Go! 95 * Go!
94 */ 96 */
95 cfg = hpet_readl(HPET_CFG); 97 cfg = hpet_readl(HPET_CFG);
96 cfg |= HPET_CFG_ENABLE | HPET_CFG_LEGACY; 98 if (hpet_use_timer)
99 cfg |= HPET_CFG_LEGACY;
100 cfg |= HPET_CFG_ENABLE;
97 hpet_writel(cfg, HPET_CFG); 101 hpet_writel(cfg, HPET_CFG);
98 102
99 return 0; 103 return 0;
@@ -128,12 +132,11 @@ int __init hpet_enable(void)
128 * However, we can do with one timer otherwise using the 132 * However, we can do with one timer otherwise using the
129 * the single HPET timer for system time. 133 * the single HPET timer for system time.
130 */ 134 */
131 if (
132#ifdef CONFIG_HPET_EMULATE_RTC 135#ifdef CONFIG_HPET_EMULATE_RTC
133 !(id & HPET_ID_NUMBER) || 136 if (!(id & HPET_ID_NUMBER))
134#endif
135 !(id & HPET_ID_LEGSUP))
136 return -1; 137 return -1;
138#endif
139
137 140
138 hpet_period = hpet_readl(HPET_PERIOD); 141 hpet_period = hpet_readl(HPET_PERIOD);
139 if ((hpet_period < HPET_MIN_PERIOD) || (hpet_period > HPET_MAX_PERIOD)) 142 if ((hpet_period < HPET_MIN_PERIOD) || (hpet_period > HPET_MAX_PERIOD))
@@ -152,6 +155,8 @@ int __init hpet_enable(void)
152 if (hpet_tick_rem > (hpet_period >> 1)) 155 if (hpet_tick_rem > (hpet_period >> 1))
153 hpet_tick++; /* rounding the result */ 156 hpet_tick++; /* rounding the result */
154 157
158 hpet_use_timer = id & HPET_ID_LEGSUP;
159
155 if (hpet_timer_stop_set_go(hpet_tick)) 160 if (hpet_timer_stop_set_go(hpet_tick))
156 return -1; 161 return -1;
157 162
@@ -202,7 +207,8 @@ int __init hpet_enable(void)
202#endif 207#endif
203 208
204#ifdef CONFIG_X86_LOCAL_APIC 209#ifdef CONFIG_X86_LOCAL_APIC
205 wait_timer_tick = wait_hpet_tick; 210 if (hpet_use_timer)
211 wait_timer_tick = wait_hpet_tick;
206#endif 212#endif
207 return 0; 213 return 0;
208} 214}