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-rw-r--r--arch/i386/kernel/reboot.c382
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diff --git a/arch/i386/kernel/reboot.c b/arch/i386/kernel/reboot.c
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1/*
2 * linux/arch/i386/kernel/reboot.c
3 */
4
5#include <linux/mm.h>
6#include <linux/module.h>
7#include <linux/delay.h>
8#include <linux/init.h>
9#include <linux/interrupt.h>
10#include <linux/mc146818rtc.h>
11#include <linux/efi.h>
12#include <linux/dmi.h>
13#include <asm/uaccess.h>
14#include <asm/apic.h>
15#include "mach_reboot.h"
16
17/*
18 * Power off function, if any
19 */
20void (*pm_power_off)(void);
21
22static int reboot_mode;
23static int reboot_thru_bios;
24
25#ifdef CONFIG_SMP
26int reboot_smp = 0;
27static int reboot_cpu = -1;
28/* shamelessly grabbed from lib/vsprintf.c for readability */
29#define is_digit(c) ((c) >= '0' && (c) <= '9')
30#endif
31static int __init reboot_setup(char *str)
32{
33 while(1) {
34 switch (*str) {
35 case 'w': /* "warm" reboot (no memory testing etc) */
36 reboot_mode = 0x1234;
37 break;
38 case 'c': /* "cold" reboot (with memory testing etc) */
39 reboot_mode = 0x0;
40 break;
41 case 'b': /* "bios" reboot by jumping through the BIOS */
42 reboot_thru_bios = 1;
43 break;
44 case 'h': /* "hard" reboot by toggling RESET and/or crashing the CPU */
45 reboot_thru_bios = 0;
46 break;
47#ifdef CONFIG_SMP
48 case 's': /* "smp" reboot by executing reset on BSP or other CPU*/
49 reboot_smp = 1;
50 if (is_digit(*(str+1))) {
51 reboot_cpu = (int) (*(str+1) - '0');
52 if (is_digit(*(str+2)))
53 reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0');
54 }
55 /* we will leave sorting out the final value
56 when we are ready to reboot, since we might not
57 have set up boot_cpu_id or smp_num_cpu */
58 break;
59#endif
60 }
61 if((str = strchr(str,',')) != NULL)
62 str++;
63 else
64 break;
65 }
66 return 1;
67}
68
69__setup("reboot=", reboot_setup);
70
71/*
72 * Reboot options and system auto-detection code provided by
73 * Dell Inc. so their systems "just work". :-)
74 */
75
76/*
77 * Some machines require the "reboot=b" commandline option, this quirk makes that automatic.
78 */
79static int __init set_bios_reboot(struct dmi_system_id *d)
80{
81 if (!reboot_thru_bios) {
82 reboot_thru_bios = 1;
83 printk(KERN_INFO "%s series board detected. Selecting BIOS-method for reboots.\n", d->ident);
84 }
85 return 0;
86}
87
88/*
89 * Some machines require the "reboot=s" commandline option, this quirk makes that automatic.
90 */
91static int __init set_smp_reboot(struct dmi_system_id *d)
92{
93#ifdef CONFIG_SMP
94 if (!reboot_smp) {
95 reboot_smp = 1;
96 printk(KERN_INFO "%s series board detected. Selecting SMP-method for reboots.\n", d->ident);
97 }
98#endif
99 return 0;
100}
101
102/*
103 * Some machines require the "reboot=b,s" commandline option, this quirk makes that automatic.
104 */
105static int __init set_smp_bios_reboot(struct dmi_system_id *d)
106{
107 set_smp_reboot(d);
108 set_bios_reboot(d);
109 return 0;
110}
111
112static struct dmi_system_id __initdata reboot_dmi_table[] = {
113 { /* Handle problems with rebooting on Dell 1300's */
114 .callback = set_smp_bios_reboot,
115 .ident = "Dell PowerEdge 1300",
116 .matches = {
117 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
118 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"),
119 },
120 },
121 { /* Handle problems with rebooting on Dell 300's */
122 .callback = set_bios_reboot,
123 .ident = "Dell PowerEdge 300",
124 .matches = {
125 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
126 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"),
127 },
128 },
129 { /* Handle problems with rebooting on Dell 2400's */
130 .callback = set_bios_reboot,
131 .ident = "Dell PowerEdge 2400",
132 .matches = {
133 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
134 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"),
135 },
136 },
137 { }
138};
139
140static int __init reboot_init(void)
141{
142 dmi_check_system(reboot_dmi_table);
143 return 0;
144}
145
146core_initcall(reboot_init);
147
148/* The following code and data reboots the machine by switching to real
149 mode and jumping to the BIOS reset entry point, as if the CPU has
150 really been reset. The previous version asked the keyboard
151 controller to pulse the CPU reset line, which is more thorough, but
152 doesn't work with at least one type of 486 motherboard. It is easy
153 to stop this code working; hence the copious comments. */
154
155static unsigned long long
156real_mode_gdt_entries [3] =
157{
158 0x0000000000000000ULL, /* Null descriptor */
159 0x00009a000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */
160 0x000092000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */
161};
162
163static struct
164{
165 unsigned short size __attribute__ ((packed));
166 unsigned long long * base __attribute__ ((packed));
167}
168real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, real_mode_gdt_entries },
169real_mode_idt = { 0x3ff, NULL },
170no_idt = { 0, NULL };
171
172
173/* This is 16-bit protected mode code to disable paging and the cache,
174 switch to real mode and jump to the BIOS reset code.
175
176 The instruction that switches to real mode by writing to CR0 must be
177 followed immediately by a far jump instruction, which set CS to a
178 valid value for real mode, and flushes the prefetch queue to avoid
179 running instructions that have already been decoded in protected
180 mode.
181
182 Clears all the flags except ET, especially PG (paging), PE
183 (protected-mode enable) and TS (task switch for coprocessor state
184 save). Flushes the TLB after paging has been disabled. Sets CD and
185 NW, to disable the cache on a 486, and invalidates the cache. This
186 is more like the state of a 486 after reset. I don't know if
187 something else should be done for other chips.
188
189 More could be done here to set up the registers as if a CPU reset had
190 occurred; hopefully real BIOSs don't assume much. */
191
192static unsigned char real_mode_switch [] =
193{
194 0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */
195 0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */
196 0x66, 0x0d, 0x00, 0x00, 0x00, 0x60, /* orl $0x60000000,%eax */
197 0x66, 0x0f, 0x22, 0xc0, /* movl %eax,%cr0 */
198 0x66, 0x0f, 0x22, 0xd8, /* movl %eax,%cr3 */
199 0x66, 0x0f, 0x20, 0xc3, /* movl %cr0,%ebx */
200 0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60, /* andl $0x60000000,%ebx */
201 0x74, 0x02, /* jz f */
202 0x0f, 0x09, /* wbinvd */
203 0x24, 0x10, /* f: andb $0x10,al */
204 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */
205};
206static unsigned char jump_to_bios [] =
207{
208 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */
209};
210
211/*
212 * Switch to real mode and then execute the code
213 * specified by the code and length parameters.
214 * We assume that length will aways be less that 100!
215 */
216void machine_real_restart(unsigned char *code, int length)
217{
218 unsigned long flags;
219
220 local_irq_disable();
221
222 /* Write zero to CMOS register number 0x0f, which the BIOS POST
223 routine will recognize as telling it to do a proper reboot. (Well
224 that's what this book in front of me says -- it may only apply to
225 the Phoenix BIOS though, it's not clear). At the same time,
226 disable NMIs by setting the top bit in the CMOS address register,
227 as we're about to do peculiar things to the CPU. I'm not sure if
228 `outb_p' is needed instead of just `outb'. Use it to be on the
229 safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.)
230 */
231
232 spin_lock_irqsave(&rtc_lock, flags);
233 CMOS_WRITE(0x00, 0x8f);
234 spin_unlock_irqrestore(&rtc_lock, flags);
235
236 /* Remap the kernel at virtual address zero, as well as offset zero
237 from the kernel segment. This assumes the kernel segment starts at
238 virtual address PAGE_OFFSET. */
239
240 memcpy (swapper_pg_dir, swapper_pg_dir + USER_PGD_PTRS,
241 sizeof (swapper_pg_dir [0]) * KERNEL_PGD_PTRS);
242
243 /*
244 * Use `swapper_pg_dir' as our page directory.
245 */
246 load_cr3(swapper_pg_dir);
247
248 /* Write 0x1234 to absolute memory location 0x472. The BIOS reads
249 this on booting to tell it to "Bypass memory test (also warm
250 boot)". This seems like a fairly standard thing that gets set by
251 REBOOT.COM programs, and the previous reset routine did this
252 too. */
253
254 *((unsigned short *)0x472) = reboot_mode;
255
256 /* For the switch to real mode, copy some code to low memory. It has
257 to be in the first 64k because it is running in 16-bit mode, and it
258 has to have the same physical and virtual address, because it turns
259 off paging. Copy it near the end of the first page, out of the way
260 of BIOS variables. */
261
262 memcpy ((void *) (0x1000 - sizeof (real_mode_switch) - 100),
263 real_mode_switch, sizeof (real_mode_switch));
264 memcpy ((void *) (0x1000 - 100), code, length);
265
266 /* Set up the IDT for real mode. */
267
268 __asm__ __volatile__ ("lidt %0" : : "m" (real_mode_idt));
269
270 /* Set up a GDT from which we can load segment descriptors for real
271 mode. The GDT is not used in real mode; it is just needed here to
272 prepare the descriptors. */
273
274 __asm__ __volatile__ ("lgdt %0" : : "m" (real_mode_gdt));
275
276 /* Load the data segment registers, and thus the descriptors ready for
277 real mode. The base address of each segment is 0x100, 16 times the
278 selector value being loaded here. This is so that the segment
279 registers don't have to be reloaded after switching to real mode:
280 the values are consistent for real mode operation already. */
281
282 __asm__ __volatile__ ("movl $0x0010,%%eax\n"
283 "\tmovl %%eax,%%ds\n"
284 "\tmovl %%eax,%%es\n"
285 "\tmovl %%eax,%%fs\n"
286 "\tmovl %%eax,%%gs\n"
287 "\tmovl %%eax,%%ss" : : : "eax");
288
289 /* Jump to the 16-bit code that we copied earlier. It disables paging
290 and the cache, switches to real mode, and jumps to the BIOS reset
291 entry point. */
292
293 __asm__ __volatile__ ("ljmp $0x0008,%0"
294 :
295 : "i" ((void *) (0x1000 - sizeof (real_mode_switch) - 100)));
296}
297
298void machine_restart(char * __unused)
299{
300#ifdef CONFIG_SMP
301 int cpuid;
302
303 cpuid = GET_APIC_ID(apic_read(APIC_ID));
304
305 if (reboot_smp) {
306
307 /* check to see if reboot_cpu is valid
308 if its not, default to the BSP */
309 if ((reboot_cpu == -1) ||
310 (reboot_cpu > (NR_CPUS -1)) ||
311 !physid_isset(cpuid, phys_cpu_present_map))
312 reboot_cpu = boot_cpu_physical_apicid;
313
314 reboot_smp = 0; /* use this as a flag to only go through this once*/
315 /* re-run this function on the other CPUs
316 it will fall though this section since we have
317 cleared reboot_smp, and do the reboot if it is the
318 correct CPU, otherwise it halts. */
319 if (reboot_cpu != cpuid)
320 smp_call_function((void *)machine_restart , NULL, 1, 0);
321 }
322
323 /* if reboot_cpu is still -1, then we want a tradional reboot,
324 and if we are not running on the reboot_cpu,, halt */
325 if ((reboot_cpu != -1) && (cpuid != reboot_cpu)) {
326 for (;;)
327 __asm__ __volatile__ ("hlt");
328 }
329 /*
330 * Stop all CPUs and turn off local APICs and the IO-APIC, so
331 * other OSs see a clean IRQ state.
332 */
333 smp_send_stop();
334#endif /* CONFIG_SMP */
335
336 lapic_shutdown();
337
338#ifdef CONFIG_X86_IO_APIC
339 disable_IO_APIC();
340#endif
341
342 if (!reboot_thru_bios) {
343 if (efi_enabled) {
344 efi.reset_system(EFI_RESET_COLD, EFI_SUCCESS, 0, NULL);
345 __asm__ __volatile__("lidt %0": :"m" (no_idt));
346 __asm__ __volatile__("int3");
347 }
348 /* rebooting needs to touch the page at absolute addr 0 */
349 *((unsigned short *)__va(0x472)) = reboot_mode;
350 for (;;) {
351 mach_reboot();
352 /* That didn't work - force a triple fault.. */
353 __asm__ __volatile__("lidt %0": :"m" (no_idt));
354 __asm__ __volatile__("int3");
355 }
356 }
357 if (efi_enabled)
358 efi.reset_system(EFI_RESET_WARM, EFI_SUCCESS, 0, NULL);
359
360 machine_real_restart(jump_to_bios, sizeof(jump_to_bios));
361}
362
363EXPORT_SYMBOL(machine_restart);
364
365void machine_halt(void)
366{
367}
368
369EXPORT_SYMBOL(machine_halt);
370
371void machine_power_off(void)
372{
373 lapic_shutdown();
374
375 if (efi_enabled)
376 efi.reset_system(EFI_RESET_SHUTDOWN, EFI_SUCCESS, 0, NULL);
377 if (pm_power_off)
378 pm_power_off();
379}
380
381EXPORT_SYMBOL(machine_power_off);
382