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-rw-r--r--arch/i386/kernel/mpparse.c12
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/i386/kernel/mpparse.c b/arch/i386/kernel/mpparse.c
index 34d21e21e012..6b1392d33ed5 100644
--- a/arch/i386/kernel/mpparse.c
+++ b/arch/i386/kernel/mpparse.c
@@ -1130,7 +1130,17 @@ int mp_register_gsi (u32 gsi, int triggering, int polarity)
1130 */ 1130 */
1131 int irq = gsi; 1131 int irq = gsi;
1132 if (gsi < MAX_GSI_NUM) { 1132 if (gsi < MAX_GSI_NUM) {
1133 if (gsi > 15) 1133 /*
1134 * Retain the VIA chipset work-around (gsi > 15), but
1135 * avoid a problem where the 8254 timer (IRQ0) is setup
1136 * via an override (so it's not on pin 0 of the ioapic),
1137 * and at the same time, the pin 0 interrupt is a PCI
1138 * type. The gsi > 15 test could cause these two pins
1139 * to be shared as IRQ0, and they are not shareable.
1140 * So test for this condition, and if necessary, avoid
1141 * the pin collision.
1142 */
1143 if (gsi > 15 || (gsi == 0 && !timer_uses_ioapic_pin_0))
1134 gsi = pci_irq++; 1144 gsi = pci_irq++;
1135 /* 1145 /*
1136 * Don't assign IRQ used by ACPI SCI 1146 * Don't assign IRQ used by ACPI SCI