diff options
Diffstat (limited to 'arch/i386/kernel/io_apic.c')
-rw-r--r-- | arch/i386/kernel/io_apic.c | 27 |
1 files changed, 19 insertions, 8 deletions
diff --git a/arch/i386/kernel/io_apic.c b/arch/i386/kernel/io_apic.c index 72ae414e4d49..ec9ea0269d36 100644 --- a/arch/i386/kernel/io_apic.c +++ b/arch/i386/kernel/io_apic.c | |||
@@ -581,7 +581,7 @@ static int balanced_irq(void *unused) | |||
581 | 581 | ||
582 | /* push everything to CPU 0 to give us a starting point. */ | 582 | /* push everything to CPU 0 to give us a starting point. */ |
583 | for (i = 0 ; i < NR_IRQS ; i++) { | 583 | for (i = 0 ; i < NR_IRQS ; i++) { |
584 | pending_irq_cpumask[i] = cpumask_of_cpu(0); | 584 | irq_desc[i].pending_mask = cpumask_of_cpu(0); |
585 | set_pending_irq(i, cpumask_of_cpu(0)); | 585 | set_pending_irq(i, cpumask_of_cpu(0)); |
586 | } | 586 | } |
587 | 587 | ||
@@ -1205,15 +1205,17 @@ static struct hw_interrupt_type ioapic_edge_type; | |||
1205 | #define IOAPIC_EDGE 0 | 1205 | #define IOAPIC_EDGE 0 |
1206 | #define IOAPIC_LEVEL 1 | 1206 | #define IOAPIC_LEVEL 1 |
1207 | 1207 | ||
1208 | static inline void ioapic_register_intr(int irq, int vector, unsigned long trigger) | 1208 | static void ioapic_register_intr(int irq, int vector, unsigned long trigger) |
1209 | { | 1209 | { |
1210 | unsigned idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq; | 1210 | unsigned idx; |
1211 | |||
1212 | idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq; | ||
1211 | 1213 | ||
1212 | if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || | 1214 | if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || |
1213 | trigger == IOAPIC_LEVEL) | 1215 | trigger == IOAPIC_LEVEL) |
1214 | irq_desc[idx].handler = &ioapic_level_type; | 1216 | irq_desc[idx].chip = &ioapic_level_type; |
1215 | else | 1217 | else |
1216 | irq_desc[idx].handler = &ioapic_edge_type; | 1218 | irq_desc[idx].chip = &ioapic_edge_type; |
1217 | set_intr_gate(vector, interrupt[idx]); | 1219 | set_intr_gate(vector, interrupt[idx]); |
1218 | } | 1220 | } |
1219 | 1221 | ||
@@ -1325,7 +1327,7 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in | |||
1325 | * The timer IRQ doesn't have to know that behind the | 1327 | * The timer IRQ doesn't have to know that behind the |
1326 | * scene we have a 8259A-master in AEOI mode ... | 1328 | * scene we have a 8259A-master in AEOI mode ... |
1327 | */ | 1329 | */ |
1328 | irq_desc[0].handler = &ioapic_edge_type; | 1330 | irq_desc[0].chip = &ioapic_edge_type; |
1329 | 1331 | ||
1330 | /* | 1332 | /* |
1331 | * Add it to the IO-APIC irq-routing table: | 1333 | * Add it to the IO-APIC irq-routing table: |
@@ -2069,6 +2071,13 @@ static void set_ioapic_affinity_vector (unsigned int vector, | |||
2069 | #endif | 2071 | #endif |
2070 | #endif | 2072 | #endif |
2071 | 2073 | ||
2074 | static int ioapic_retrigger(unsigned int irq) | ||
2075 | { | ||
2076 | send_IPI_self(IO_APIC_VECTOR(irq)); | ||
2077 | |||
2078 | return 1; | ||
2079 | } | ||
2080 | |||
2072 | /* | 2081 | /* |
2073 | * Level and edge triggered IO-APIC interrupts need different handling, | 2082 | * Level and edge triggered IO-APIC interrupts need different handling, |
2074 | * so we use two separate IRQ descriptors. Edge triggered IRQs can be | 2083 | * so we use two separate IRQ descriptors. Edge triggered IRQs can be |
@@ -2088,6 +2097,7 @@ static struct hw_interrupt_type ioapic_edge_type __read_mostly = { | |||
2088 | #ifdef CONFIG_SMP | 2097 | #ifdef CONFIG_SMP |
2089 | .set_affinity = set_ioapic_affinity, | 2098 | .set_affinity = set_ioapic_affinity, |
2090 | #endif | 2099 | #endif |
2100 | .retrigger = ioapic_retrigger, | ||
2091 | }; | 2101 | }; |
2092 | 2102 | ||
2093 | static struct hw_interrupt_type ioapic_level_type __read_mostly = { | 2103 | static struct hw_interrupt_type ioapic_level_type __read_mostly = { |
@@ -2101,6 +2111,7 @@ static struct hw_interrupt_type ioapic_level_type __read_mostly = { | |||
2101 | #ifdef CONFIG_SMP | 2111 | #ifdef CONFIG_SMP |
2102 | .set_affinity = set_ioapic_affinity, | 2112 | .set_affinity = set_ioapic_affinity, |
2103 | #endif | 2113 | #endif |
2114 | .retrigger = ioapic_retrigger, | ||
2104 | }; | 2115 | }; |
2105 | 2116 | ||
2106 | static inline void init_IO_APIC_traps(void) | 2117 | static inline void init_IO_APIC_traps(void) |
@@ -2135,7 +2146,7 @@ static inline void init_IO_APIC_traps(void) | |||
2135 | make_8259A_irq(irq); | 2146 | make_8259A_irq(irq); |
2136 | else | 2147 | else |
2137 | /* Strange. Oh, well.. */ | 2148 | /* Strange. Oh, well.. */ |
2138 | irq_desc[irq].handler = &no_irq_type; | 2149 | irq_desc[irq].chip = &no_irq_type; |
2139 | } | 2150 | } |
2140 | } | 2151 | } |
2141 | } | 2152 | } |
@@ -2351,7 +2362,7 @@ static inline void check_timer(void) | |||
2351 | printk(KERN_INFO "...trying to set up timer as Virtual Wire IRQ..."); | 2362 | printk(KERN_INFO "...trying to set up timer as Virtual Wire IRQ..."); |
2352 | 2363 | ||
2353 | disable_8259A_irq(0); | 2364 | disable_8259A_irq(0); |
2354 | irq_desc[0].handler = &lapic_irq_type; | 2365 | irq_desc[0].chip = &lapic_irq_type; |
2355 | apic_write_around(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */ | 2366 | apic_write_around(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */ |
2356 | enable_8259A_irq(0); | 2367 | enable_8259A_irq(0); |
2357 | 2368 | ||