1 files changed, 30 insertions, 88 deletions

diff --git a/arch/i386/kernel/head.S b/arch/i386/kernel/head.S
index 3fa7f9389afe..9b10af65faaa 100644
--- a/arch/i386/kernel/head.S
+++ b/arch/i386/kernel/head.S
@@ -34,17 +34,32 @@
 
 /*
  * This is how much memory *in addition to the memory covered up to
- * and including _end* we need mapped initially.  We need one bit for
- * each possible page, but only in low memory, which means
- * 2^32/4096/8 = 128K worst case (4G/4G split.)
+ * and including _end* we need mapped initially.
+ * We need:
+ *  - one bit for each possible page, but only in low memory, which means
+ *     2^32/4096/8 = 128K worst case (4G/4G split.)
+ *  - enough space to map all low memory, which means
+ *     (2^32/4096) / 1024 pages (worst case, non PAE)
+ *     (2^32/4096) / 512 + 4 pages (worst case for PAE)
+ *  - a few pages for allocator use before the kernel pagetable has
+ *     been set up
  *
  * Modulo rounding, each megabyte assigned here requires a kilobyte of
  * memory, which is currently unreclaimed.
  *
  * This should be a multiple of a page.
  */
-#define INIT_MAP_BEYOND_END     (128*1024)
+LOW_PAGES = 1<<(32-PAGE_SHIFT_asm)
 
+#if PTRS_PER_PMD > 1
+PAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PMD) + PTRS_PER_PGD
+#else
+PAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PGD)
+#endif
+BOOTBITMAP_SIZE = LOW_PAGES / 8
+ALLOCATOR_SLOP = 4
+
+INIT_MAP_BEYOND_END = BOOTBITMAP_SIZE + (PAGE_TABLE_SIZE + ALLOCATOR_SLOP)*PAGE_SIZE_asm
 
 /*
  * 32-bit kernel entrypoint; only used by the boot CPU.  On entry,
@@ -147,8 +162,7 @@ page_pde_offset = (__PAGE_OFFSET >> 20);
 /*
  * Non-boot CPU entry point; entered from trampoline.S
  * We can't lgdt here, because lgdt itself uses a data segment, but
- * we know the trampoline has already loaded the boot_gdt_table GDT
- * for us.
+ * we know the trampoline has already loaded the boot_gdt for us.
  *
  * If cpu hotplug is not supported then this code can go in init section
  * which will be freed later
@@ -318,12 +332,12 @@ is386:	movl $2,%ecx		# set MP
         movl %eax,%cr0
 
         call check_x87
-        call setup_pda
         lgdt early_gdt_descr
         lidt idt_descr
         ljmp $(__KERNEL_CS),$1f
 1:      movl $(__KERNEL_DS),%eax        # reload all the segment registers
         movl %eax,%ss                   # after changing gdt.
+        movl %eax,%fs                   # gets reset once there's real percpu
 
         movl $(__USER_DS),%eax          # DS/ES contains default USER segment
         movl %eax,%ds
@@ -333,16 +347,17 @@ is386:	movl $2,%ecx		# set MP
         movl %eax,%gs
         lldt %ax
 
-        movl $(__KERNEL_PDA),%eax
-        mov  %eax,%fs
-
         cld                     # gcc2 wants the direction flag cleared at all times
         pushl $0                # fake return address for unwinder
 #ifdef CONFIG_SMP
         movb ready, %cl
         movb $1, ready
         cmpb $0,%cl             # the first CPU calls start_kernel
-        jne initialize_secondary # all other CPUs call initialize_secondary
+        je   1f
+        movl $(__KERNEL_PERCPU), %eax
+        movl %eax,%fs           # set this cpu's percpu
+        jmp initialize_secondary # all other CPUs call initialize_secondary
+1:
 #endif /* CONFIG_SMP */
         jmp start_kernel
 
@@ -366,23 +381,6 @@ check_x87:
         ret
 
 /*
- * Point the GDT at this CPU's PDA.  On boot this will be
- * cpu_gdt_table and boot_pda; for secondary CPUs, these will be
- * that CPU's GDT and PDA.
- */
-ENTRY(setup_pda)
-        /* get the PDA pointer */
-        movl start_pda, %eax
-
-        /* slot the PDA address into the GDT */
-        mov early_gdt_descr+2, %ecx
-        mov %ax, (__KERNEL_PDA+0+2)(%ecx)               /* base & 0x0000ffff */
-        shr $16, %eax
-        mov %al, (__KERNEL_PDA+4+0)(%ecx)               /* base & 0x00ff0000 */
-        mov %ah, (__KERNEL_PDA+4+3)(%ecx)               /* base & 0xff000000 */
-        ret
-
-/*
  *  setup_idt
  *
  *  sets up a idt with 256 entries pointing to
@@ -554,9 +552,6 @@ ENTRY(empty_zero_page)
  * This starts the data section.
  */
 .data
-ENTRY(start_pda)
-        .long boot_pda
-
 ENTRY(stack_start)
         .long init_thread_union+THREAD_SIZE
         .long __BOOT_DS
@@ -588,7 +583,7 @@ fault_msg:
         .word 0                         # 32 bit align gdt_desc.address
 boot_gdt_descr:
         .word __BOOT_DS+7
-        .long boot_gdt_table - __PAGE_OFFSET
+        .long boot_gdt - __PAGE_OFFSET
 
         .word 0                         # 32-bit align idt_desc.address
 idt_descr:
@@ -599,67 +594,14 @@ idt_descr:
         .word 0                         # 32 bit align gdt_desc.address
 ENTRY(early_gdt_descr)
         .word GDT_ENTRIES*8-1
-        .long cpu_gdt_table
+        .long per_cpu__gdt_page         /* Overwritten for secondary CPUs */
 
 /*
- * The boot_gdt_table must mirror the equivalent in setup.S and is
+ * The boot_gdt must mirror the equivalent in setup.S and is
  * used only for booting.
  */
         .align L1_CACHE_BYTES
-ENTRY(boot_gdt_table)
+ENTRY(boot_gdt)
         .fill GDT_ENTRY_BOOT_CS,8,0
         .quad 0x00cf9a000000ffff        /* kernel 4GB code at 0x00000000 */
         .quad 0x00cf92000000ffff        /* kernel 4GB data at 0x00000000 */
-
-/*
- * The Global Descriptor Table contains 28 quadwords, per-CPU.
- */
-        .align L1_CACHE_BYTES
-ENTRY(cpu_gdt_table)
-        .quad 0x0000000000000000        /* NULL descriptor */
-        .quad 0x0000000000000000        /* 0x0b reserved */
-        .quad 0x0000000000000000        /* 0x13 reserved */
-        .quad 0x0000000000000000        /* 0x1b reserved */
-        .quad 0x0000000000000000        /* 0x20 unused */
-        .quad 0x0000000000000000        /* 0x28 unused */
-        .quad 0x0000000000000000        /* 0x33 TLS entry 1 */
-        .quad 0x0000000000000000        /* 0x3b TLS entry 2 */
-        .quad 0x0000000000000000        /* 0x43 TLS entry 3 */
-        .quad 0x0000000000000000        /* 0x4b reserved */
-        .quad 0x0000000000000000        /* 0x53 reserved */
-        .quad 0x0000000000000000        /* 0x5b reserved */
-
-        .quad 0x00cf9a000000ffff        /* 0x60 kernel 4GB code at 0x00000000 */
-        .quad 0x00cf92000000ffff        /* 0x68 kernel 4GB data at 0x00000000 */
-        .quad 0x00cffa000000ffff        /* 0x73 user 4GB code at 0x00000000 */
-        .quad 0x00cff2000000ffff        /* 0x7b user 4GB data at 0x00000000 */
-
-        .quad 0x0000000000000000        /* 0x80 TSS descriptor */
-        .quad 0x0000000000000000        /* 0x88 LDT descriptor */
-
-        /*
-         * Segments used for calling PnP BIOS have byte granularity.
-         * They code segments and data segments have fixed 64k limits,
-         * the transfer segment sizes are set at run time.
-         */
-        .quad 0x00409a000000ffff        /* 0x90 32-bit code */
-        .quad 0x00009a000000ffff        /* 0x98 16-bit code */
-        .quad 0x000092000000ffff        /* 0xa0 16-bit data */
-        .quad 0x0000920000000000        /* 0xa8 16-bit data */
-        .quad 0x0000920000000000        /* 0xb0 16-bit data */
-
-        /*
-         * The APM segments have byte granularity and their bases
-         * are set at run time.  All have 64k limits.
-         */
-        .quad 0x00409a000000ffff        /* 0xb8 APM CS    code */
-        .quad 0x00009a000000ffff        /* 0xc0 APM CS 16 code (16 bit) */
-        .quad 0x004092000000ffff        /* 0xc8 APM DS    data */
-
-        .quad 0x00c0920000000000        /* 0xd0 - ESPFIX SS */
-        .quad 0x00cf92000000ffff        /* 0xd8 - PDA */
-        .quad 0x0000000000000000        /* 0xe0 - unused */
-        .quad 0x0000000000000000        /* 0xe8 - unused */
-        .quad 0x0000000000000000        /* 0xf0 - unused */
-        .quad 0x0000000000000000        /* 0xf8 - GDT entry 31: double-fault TSS */
-