3 files changed, 10 insertions, 20 deletions

diff --git a/arch/i386/kernel/cpu/common.c b/arch/i386/kernel/cpu/common.c
index 4553ffd94b1f..361f2e7ccb12 100644
--- a/arch/i386/kernel/cpu/common.c
+++ b/arch/i386/kernel/cpu/common.c
@@ -642,12 +642,12 @@ void __devinit cpu_init(void)
         asm volatile ("xorl %eax, %eax; movl %eax, %fs; movl %eax, %gs");
 
         /* Clear all 6 debug registers: */
-
-#define CD(register) set_debugreg(0, register)
-
-        CD(0); CD(1); CD(2); CD(3); /* no db4 and db5 */; CD(6); CD(7);
-
-#undef CD
+        set_debugreg(0, 0);
+        set_debugreg(0, 1);
+        set_debugreg(0, 2);
+        set_debugreg(0, 3);
+        set_debugreg(0, 6);
+        set_debugreg(0, 7);
 
         /*
          * Force FPU initialization:
diff --git a/arch/i386/kernel/cpu/cpufreq/longhaul.c b/arch/i386/kernel/cpu/cpufreq/longhaul.c
index 04e3563da4fe..bf02b5026e62 100644
--- a/arch/i386/kernel/cpu/cpufreq/longhaul.c
+++ b/arch/i386/kernel/cpu/cpufreq/longhaul.c
@@ -64,8 +64,6 @@ static int dont_scale_voltage;
 #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "longhaul", msg)
 
 
-#define __hlt()     __asm__ __volatile__("hlt": : :"memory")
-
 /* Clock ratios multiplied by 10 */
 static int clock_ratio[32];
 static int eblcr_table[32];
@@ -168,11 +166,9 @@ static void do_powersaver(union msr_longhaul *longhaul,
         outb(0xFE,0x21);        /* TMR0 only */
         outb(0xFF,0x80);        /* delay */
 
-        local_irq_enable();
-
-        __hlt();
+        safe_halt();
         wrmsrl(MSR_VIA_LONGHAUL, longhaul->val);
-        __hlt();
+        halt();
 
         local_irq_disable();
 
@@ -251,9 +247,7 @@ static void longhaul_setstate(unsigned int clock_ratio_index)
                 bcr2.bits.CLOCKMUL = clock_ratio_index;
                 local_irq_disable();
                 wrmsrl (MSR_VIA_BCR2, bcr2.val);
-                local_irq_enable();
-
-                __hlt();
+                safe_halt();
 
                 /* Disable software clock multiplier */
                 rdmsrl (MSR_VIA_BCR2, bcr2.val);
diff --git a/arch/i386/kernel/cpu/cyrix.c b/arch/i386/kernel/cpu/cyrix.c
index ba4b01138c8f..ff87cc22b323 100644
--- a/arch/i386/kernel/cpu/cyrix.c
+++ b/arch/i386/kernel/cpu/cyrix.c
@@ -132,11 +132,7 @@ static void __init set_cx86_memwb(void)
         setCx86(CX86_CCR2, getCx86(CX86_CCR2) & ~0x04);
         /* set 'Not Write-through' */
         cr0 = 0x20000000;
-        __asm__("movl %%cr0,%%eax\n\t"
-                "orl %0,%%eax\n\t"
-                "movl %%eax,%%cr0\n"
-                : : "r" (cr0)
-                :"ax");
+        write_cr0(read_cr0() | cr0);
         /* CCR2 bit 2: lock NW bit and set WT1 */
         setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x14 );
 }