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-rw-r--r--arch/h8300/include/asm/atomic.h4
-rw-r--r--arch/h8300/include/asm/barrier.h27
-rw-r--r--arch/h8300/include/asm/bitops.h1
-rw-r--r--arch/h8300/include/asm/bug.h4
-rw-r--r--arch/h8300/include/asm/cmpxchg.h60
-rw-r--r--arch/h8300/include/asm/exec.h6
-rw-r--r--arch/h8300/include/asm/processor.h5
-rw-r--r--arch/h8300/include/asm/socket.h4
-rw-r--r--arch/h8300/include/asm/switch_to.h50
-rw-r--r--arch/h8300/include/asm/system.h140
10 files changed, 157 insertions, 144 deletions
diff --git a/arch/h8300/include/asm/atomic.h b/arch/h8300/include/asm/atomic.h
index f5a38c1f5489..40901e353c21 100644
--- a/arch/h8300/include/asm/atomic.h
+++ b/arch/h8300/include/asm/atomic.h
@@ -2,6 +2,7 @@
2#define __ARCH_H8300_ATOMIC__ 2#define __ARCH_H8300_ATOMIC__
3 3
4#include <linux/types.h> 4#include <linux/types.h>
5#include <asm/cmpxchg.h>
5 6
6/* 7/*
7 * Atomic operations that C can't guarantee us. Useful for 8 * Atomic operations that C can't guarantee us. Useful for
@@ -13,7 +14,6 @@
13#define atomic_read(v) (*(volatile int *)&(v)->counter) 14#define atomic_read(v) (*(volatile int *)&(v)->counter)
14#define atomic_set(v, i) (((v)->counter) = i) 15#define atomic_set(v, i) (((v)->counter) = i)
15 16
16#include <asm/system.h>
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18 18
19static __inline__ int atomic_add_return(int i, atomic_t *v) 19static __inline__ int atomic_add_return(int i, atomic_t *v)
@@ -102,8 +102,6 @@ static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
102 return ret; 102 return ret;
103} 103}
104 104
105#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
106
107static inline int __atomic_add_unless(atomic_t *v, int a, int u) 105static inline int __atomic_add_unless(atomic_t *v, int a, int u)
108{ 106{
109 int ret; 107 int ret;
diff --git a/arch/h8300/include/asm/barrier.h b/arch/h8300/include/asm/barrier.h
new file mode 100644
index 000000000000..c7283c343c55
--- /dev/null
+++ b/arch/h8300/include/asm/barrier.h
@@ -0,0 +1,27 @@
1#ifndef _H8300_BARRIER_H
2#define _H8300_BARRIER_H
3
4#define nop() asm volatile ("nop"::)
5
6/*
7 * Force strict CPU ordering.
8 * Not really required on H8...
9 */
10#define mb() asm volatile ("" : : :"memory")
11#define rmb() asm volatile ("" : : :"memory")
12#define wmb() asm volatile ("" : : :"memory")
13#define set_mb(var, value) do { xchg(&var, value); } while (0)
14
15#ifdef CONFIG_SMP
16#define smp_mb() mb()
17#define smp_rmb() rmb()
18#define smp_wmb() wmb()
19#define smp_read_barrier_depends() read_barrier_depends()
20#else
21#define smp_mb() barrier()
22#define smp_rmb() barrier()
23#define smp_wmb() barrier()
24#define smp_read_barrier_depends() do { } while(0)
25#endif
26
27#endif /* _H8300_BARRIER_H */
diff --git a/arch/h8300/include/asm/bitops.h b/arch/h8300/include/asm/bitops.h
index e856c1bb3415..eb34e0cd33d5 100644
--- a/arch/h8300/include/asm/bitops.h
+++ b/arch/h8300/include/asm/bitops.h
@@ -7,7 +7,6 @@
7 */ 7 */
8 8
9#include <linux/compiler.h> 9#include <linux/compiler.h>
10#include <asm/system.h>
11 10
12#ifdef __KERNEL__ 11#ifdef __KERNEL__
13 12
diff --git a/arch/h8300/include/asm/bug.h b/arch/h8300/include/asm/bug.h
index 887c19773185..1e1be8119935 100644
--- a/arch/h8300/include/asm/bug.h
+++ b/arch/h8300/include/asm/bug.h
@@ -5,4 +5,8 @@
5#define is_valid_bugaddr(addr) (1) 5#define is_valid_bugaddr(addr) (1)
6 6
7#include <asm-generic/bug.h> 7#include <asm-generic/bug.h>
8
9struct pt_regs;
10extern void die(const char *str, struct pt_regs *fp, unsigned long err);
11
8#endif 12#endif
diff --git a/arch/h8300/include/asm/cmpxchg.h b/arch/h8300/include/asm/cmpxchg.h
new file mode 100644
index 000000000000..cdb203ef681f
--- /dev/null
+++ b/arch/h8300/include/asm/cmpxchg.h
@@ -0,0 +1,60 @@
1#ifndef __ARCH_H8300_CMPXCHG__
2#define __ARCH_H8300_CMPXCHG__
3
4#include <linux/irqflags.h>
5
6#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
7
8struct __xchg_dummy { unsigned long a[100]; };
9#define __xg(x) ((volatile struct __xchg_dummy *)(x))
10
11static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
12{
13 unsigned long tmp, flags;
14
15 local_irq_save(flags);
16
17 switch (size) {
18 case 1:
19 __asm__ __volatile__
20 ("mov.b %2,%0\n\t"
21 "mov.b %1,%2"
22 : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
23 break;
24 case 2:
25 __asm__ __volatile__
26 ("mov.w %2,%0\n\t"
27 "mov.w %1,%2"
28 : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
29 break;
30 case 4:
31 __asm__ __volatile__
32 ("mov.l %2,%0\n\t"
33 "mov.l %1,%2"
34 : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
35 break;
36 default:
37 tmp = 0;
38 }
39 local_irq_restore(flags);
40 return tmp;
41}
42
43#include <asm-generic/cmpxchg-local.h>
44
45/*
46 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
47 * them available.
48 */
49#define cmpxchg_local(ptr, o, n) \
50 ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
51 (unsigned long)(n), sizeof(*(ptr))))
52#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
53
54#ifndef CONFIG_SMP
55#include <asm-generic/cmpxchg.h>
56#endif
57
58#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
59
60#endif /* __ARCH_H8300_CMPXCHG__ */
diff --git a/arch/h8300/include/asm/exec.h b/arch/h8300/include/asm/exec.h
new file mode 100644
index 000000000000..c01c45ccadf9
--- /dev/null
+++ b/arch/h8300/include/asm/exec.h
@@ -0,0 +1,6 @@
1#ifndef _H8300_EXEC_H
2#define _H8300_EXEC_H
3
4#define arch_align_stack(x) (x)
5
6#endif /* _H8300_EXEC_H */
diff --git a/arch/h8300/include/asm/processor.h b/arch/h8300/include/asm/processor.h
index e834b6018897..61fabf1788c6 100644
--- a/arch/h8300/include/asm/processor.h
+++ b/arch/h8300/include/asm/processor.h
@@ -135,4 +135,9 @@ unsigned long get_wchan(struct task_struct *p);
135 135
136#define cpu_relax() barrier() 136#define cpu_relax() barrier()
137 137
138#define HARD_RESET_NOW() ({ \
139 local_irq_disable(); \
140 asm("jmp @@0"); \
141})
142
138#endif 143#endif
diff --git a/arch/h8300/include/asm/socket.h b/arch/h8300/include/asm/socket.h
index cf1daab6f27e..ec4554e7b04b 100644
--- a/arch/h8300/include/asm/socket.h
+++ b/arch/h8300/include/asm/socket.h
@@ -64,5 +64,9 @@
64 64
65#define SO_WIFI_STATUS 41 65#define SO_WIFI_STATUS 41
66#define SCM_WIFI_STATUS SO_WIFI_STATUS 66#define SCM_WIFI_STATUS SO_WIFI_STATUS
67#define SO_PEEK_OFF 42
68
69/* Instruct lower device to use last 4-bytes of skb data as FCS */
70#define SO_NOFCS 43
67 71
68#endif /* _ASM_SOCKET_H */ 72#endif /* _ASM_SOCKET_H */
diff --git a/arch/h8300/include/asm/switch_to.h b/arch/h8300/include/asm/switch_to.h
new file mode 100644
index 000000000000..cdd8731ce487
--- /dev/null
+++ b/arch/h8300/include/asm/switch_to.h
@@ -0,0 +1,50 @@
1#ifndef _H8300_SWITCH_TO_H
2#define _H8300_SWITCH_TO_H
3
4/*
5 * switch_to(n) should switch tasks to task ptr, first checking that
6 * ptr isn't the current task, in which case it does nothing. This
7 * also clears the TS-flag if the task we switched to has used the
8 * math co-processor latest.
9 */
10/*
11 * switch_to() saves the extra registers, that are not saved
12 * automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and
13 * a0-a1. Some of these are used by schedule() and its predecessors
14 * and so we might get see unexpected behaviors when a task returns
15 * with unexpected register values.
16 *
17 * syscall stores these registers itself and none of them are used
18 * by syscall after the function in the syscall has been called.
19 *
20 * Beware that resume now expects *next to be in d1 and the offset of
21 * tss to be in a1. This saves a few instructions as we no longer have
22 * to push them onto the stack and read them back right after.
23 *
24 * 02/17/96 - Jes Sorensen (jds@kom.auc.dk)
25 *
26 * Changed 96/09/19 by Andreas Schwab
27 * pass prev in a0, next in a1, offset of tss in d1, and whether
28 * the mm structures are shared in d2 (to avoid atc flushing).
29 *
30 * H8/300 Porting 2002/09/04 Yoshinori Sato
31 */
32
33asmlinkage void resume(void);
34#define switch_to(prev,next,last) { \
35 void *_last; \
36 __asm__ __volatile__( \
37 "mov.l %1, er0\n\t" \
38 "mov.l %2, er1\n\t" \
39 "mov.l %3, er2\n\t" \
40 "jsr @_resume\n\t" \
41 "mov.l er2,%0\n\t" \
42 : "=r" (_last) \
43 : "r" (&(prev->thread)), \
44 "r" (&(next->thread)), \
45 "g" (prev) \
46 : "cc", "er0", "er1", "er2", "er3"); \
47 (last) = _last; \
48}
49
50#endif /* _H8300_SWITCH_TO_H */
diff --git a/arch/h8300/include/asm/system.h b/arch/h8300/include/asm/system.h
deleted file mode 100644
index 2c2382e50d93..000000000000
--- a/arch/h8300/include/asm/system.h
+++ /dev/null
@@ -1,140 +0,0 @@
1#ifndef _H8300_SYSTEM_H
2#define _H8300_SYSTEM_H
3
4#include <linux/linkage.h>
5#include <linux/irqflags.h>
6
7struct pt_regs;
8
9/*
10 * switch_to(n) should switch tasks to task ptr, first checking that
11 * ptr isn't the current task, in which case it does nothing. This
12 * also clears the TS-flag if the task we switched to has used the
13 * math co-processor latest.
14 */
15/*
16 * switch_to() saves the extra registers, that are not saved
17 * automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and
18 * a0-a1. Some of these are used by schedule() and its predecessors
19 * and so we might get see unexpected behaviors when a task returns
20 * with unexpected register values.
21 *
22 * syscall stores these registers itself and none of them are used
23 * by syscall after the function in the syscall has been called.
24 *
25 * Beware that resume now expects *next to be in d1 and the offset of
26 * tss to be in a1. This saves a few instructions as we no longer have
27 * to push them onto the stack and read them back right after.
28 *
29 * 02/17/96 - Jes Sorensen (jds@kom.auc.dk)
30 *
31 * Changed 96/09/19 by Andreas Schwab
32 * pass prev in a0, next in a1, offset of tss in d1, and whether
33 * the mm structures are shared in d2 (to avoid atc flushing).
34 *
35 * H8/300 Porting 2002/09/04 Yoshinori Sato
36 */
37
38asmlinkage void resume(void);
39#define switch_to(prev,next,last) { \
40 void *_last; \
41 __asm__ __volatile__( \
42 "mov.l %1, er0\n\t" \
43 "mov.l %2, er1\n\t" \
44 "mov.l %3, er2\n\t" \
45 "jsr @_resume\n\t" \
46 "mov.l er2,%0\n\t" \
47 : "=r" (_last) \
48 : "r" (&(prev->thread)), \
49 "r" (&(next->thread)), \
50 "g" (prev) \
51 : "cc", "er0", "er1", "er2", "er3"); \
52 (last) = _last; \
53}
54
55#define iret() __asm__ __volatile__ ("rte": : :"memory", "sp", "cc")
56
57/*
58 * Force strict CPU ordering.
59 * Not really required on H8...
60 */
61#define nop() asm volatile ("nop"::)
62#define mb() asm volatile ("" : : :"memory")
63#define rmb() asm volatile ("" : : :"memory")
64#define wmb() asm volatile ("" : : :"memory")
65#define set_mb(var, value) do { xchg(&var, value); } while (0)
66
67#ifdef CONFIG_SMP
68#define smp_mb() mb()
69#define smp_rmb() rmb()
70#define smp_wmb() wmb()
71#define smp_read_barrier_depends() read_barrier_depends()
72#else
73#define smp_mb() barrier()
74#define smp_rmb() barrier()
75#define smp_wmb() barrier()
76#define smp_read_barrier_depends() do { } while(0)
77#endif
78
79#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
80
81struct __xchg_dummy { unsigned long a[100]; };
82#define __xg(x) ((volatile struct __xchg_dummy *)(x))
83
84static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
85{
86 unsigned long tmp, flags;
87
88 local_irq_save(flags);
89
90 switch (size) {
91 case 1:
92 __asm__ __volatile__
93 ("mov.b %2,%0\n\t"
94 "mov.b %1,%2"
95 : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
96 break;
97 case 2:
98 __asm__ __volatile__
99 ("mov.w %2,%0\n\t"
100 "mov.w %1,%2"
101 : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
102 break;
103 case 4:
104 __asm__ __volatile__
105 ("mov.l %2,%0\n\t"
106 "mov.l %1,%2"
107 : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
108 break;
109 default:
110 tmp = 0;
111 }
112 local_irq_restore(flags);
113 return tmp;
114}
115
116#define HARD_RESET_NOW() ({ \
117 local_irq_disable(); \
118 asm("jmp @@0"); \
119})
120
121#include <asm-generic/cmpxchg-local.h>
122
123/*
124 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
125 * them available.
126 */
127#define cmpxchg_local(ptr, o, n) \
128 ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
129 (unsigned long)(n), sizeof(*(ptr))))
130#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
131
132#ifndef CONFIG_SMP
133#include <asm-generic/cmpxchg.h>
134#endif
135
136#define arch_align_stack(x) (x)
137
138extern void die(const char *str, struct pt_regs *fp, unsigned long err);
139
140#endif /* _H8300_SYSTEM_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 10:58:52 -0500