diff options
Diffstat (limited to 'arch/frv/kernel/irq.c')
-rw-r--r-- | arch/frv/kernel/irq.c | 80 |
1 files changed, 18 insertions, 62 deletions
diff --git a/arch/frv/kernel/irq.c b/arch/frv/kernel/irq.c index 625136625a7f..a5f624a9f559 100644 --- a/arch/frv/kernel/irq.c +++ b/arch/frv/kernel/irq.c | |||
@@ -47,89 +47,45 @@ extern void __init mb93493_init(void); | |||
47 | 47 | ||
48 | atomic_t irq_err_count; | 48 | atomic_t irq_err_count; |
49 | 49 | ||
50 | /* | 50 | int arch_show_interrupts(struct seq_file *p, int prec) |
51 | * Generic, controller-independent functions: | ||
52 | */ | ||
53 | int show_interrupts(struct seq_file *p, void *v) | ||
54 | { | 51 | { |
55 | int i = *(loff_t *) v, cpu; | 52 | seq_printf(p, "%*s: ", prec, "ERR"); |
56 | struct irqaction * action; | 53 | seq_printf(p, "%10u\n", atomic_read(&irq_err_count)); |
57 | unsigned long flags; | ||
58 | |||
59 | if (i == 0) { | ||
60 | char cpuname[12]; | ||
61 | |||
62 | seq_printf(p, " "); | ||
63 | for_each_present_cpu(cpu) { | ||
64 | sprintf(cpuname, "CPU%d", cpu); | ||
65 | seq_printf(p, " %10s", cpuname); | ||
66 | } | ||
67 | seq_putc(p, '\n'); | ||
68 | } | ||
69 | |||
70 | if (i < NR_IRQS) { | ||
71 | raw_spin_lock_irqsave(&irq_desc[i].lock, flags); | ||
72 | action = irq_desc[i].action; | ||
73 | if (action) { | ||
74 | seq_printf(p, "%3d: ", i); | ||
75 | for_each_present_cpu(cpu) | ||
76 | seq_printf(p, "%10u ", kstat_irqs_cpu(i, cpu)); | ||
77 | seq_printf(p, " %10s", irq_desc[i].chip->name ? : "-"); | ||
78 | seq_printf(p, " %s", action->name); | ||
79 | for (action = action->next; | ||
80 | action; | ||
81 | action = action->next) | ||
82 | seq_printf(p, ", %s", action->name); | ||
83 | |||
84 | seq_putc(p, '\n'); | ||
85 | } | ||
86 | |||
87 | raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags); | ||
88 | } else if (i == NR_IRQS) { | ||
89 | seq_printf(p, "Err: %10u\n", atomic_read(&irq_err_count)); | ||
90 | } | ||
91 | |||
92 | return 0; | 54 | return 0; |
93 | } | 55 | } |
94 | 56 | ||
95 | /* | 57 | /* |
96 | * on-CPU PIC operations | 58 | * on-CPU PIC operations |
97 | */ | 59 | */ |
98 | static void frv_cpupic_ack(unsigned int irqlevel) | 60 | static void frv_cpupic_ack(struct irq_data *d) |
99 | { | 61 | { |
100 | __clr_RC(irqlevel); | 62 | __clr_RC(d->irq); |
101 | __clr_IRL(); | 63 | __clr_IRL(); |
102 | } | 64 | } |
103 | 65 | ||
104 | static void frv_cpupic_mask(unsigned int irqlevel) | 66 | static void frv_cpupic_mask(struct irq_data *d) |
105 | { | 67 | { |
106 | __set_MASK(irqlevel); | 68 | __set_MASK(d->irq); |
107 | } | 69 | } |
108 | 70 | ||
109 | static void frv_cpupic_mask_ack(unsigned int irqlevel) | 71 | static void frv_cpupic_mask_ack(struct irq_data *d) |
110 | { | 72 | { |
111 | __set_MASK(irqlevel); | 73 | __set_MASK(d->irq); |
112 | __clr_RC(irqlevel); | 74 | __clr_RC(d->irq); |
113 | __clr_IRL(); | 75 | __clr_IRL(); |
114 | } | 76 | } |
115 | 77 | ||
116 | static void frv_cpupic_unmask(unsigned int irqlevel) | 78 | static void frv_cpupic_unmask(struct irq_data *d) |
117 | { | ||
118 | __clr_MASK(irqlevel); | ||
119 | } | ||
120 | |||
121 | static void frv_cpupic_end(unsigned int irqlevel) | ||
122 | { | 79 | { |
123 | __clr_MASK(irqlevel); | 80 | __clr_MASK(d->irq); |
124 | } | 81 | } |
125 | 82 | ||
126 | static struct irq_chip frv_cpu_pic = { | 83 | static struct irq_chip frv_cpu_pic = { |
127 | .name = "cpu", | 84 | .name = "cpu", |
128 | .ack = frv_cpupic_ack, | 85 | .irq_ack = frv_cpupic_ack, |
129 | .mask = frv_cpupic_mask, | 86 | .irq_mask = frv_cpupic_mask, |
130 | .mask_ack = frv_cpupic_mask_ack, | 87 | .irq_mask_ack = frv_cpupic_mask_ack, |
131 | .unmask = frv_cpupic_unmask, | 88 | .irq_unmask = frv_cpupic_unmask, |
132 | .end = frv_cpupic_end, | ||
133 | }; | 89 | }; |
134 | 90 | ||
135 | /* | 91 | /* |
@@ -161,10 +117,10 @@ void __init init_IRQ(void) | |||
161 | int level; | 117 | int level; |
162 | 118 | ||
163 | for (level = 1; level <= 14; level++) | 119 | for (level = 1; level <= 14; level++) |
164 | set_irq_chip_and_handler(level, &frv_cpu_pic, | 120 | irq_set_chip_and_handler(level, &frv_cpu_pic, |
165 | handle_level_irq); | 121 | handle_level_irq); |
166 | 122 | ||
167 | set_irq_handler(IRQ_CPU_TIMER0, handle_edge_irq); | 123 | irq_set_handler(IRQ_CPU_TIMER0, handle_edge_irq); |
168 | 124 | ||
169 | /* set the trigger levels for internal interrupt sources | 125 | /* set the trigger levels for internal interrupt sources |
170 | * - timers all falling-edge | 126 | * - timers all falling-edge |