diff options
Diffstat (limited to 'arch/frv/include/asm/system.h')
| -rw-r--r-- | arch/frv/include/asm/system.h | 136 |
1 files changed, 0 insertions, 136 deletions
diff --git a/arch/frv/include/asm/system.h b/arch/frv/include/asm/system.h index efd22d9077ac..0a6d8d9ca45b 100644 --- a/arch/frv/include/asm/system.h +++ b/arch/frv/include/asm/system.h | |||
| @@ -37,142 +37,6 @@ do { \ | |||
| 37 | } while(0) | 37 | } while(0) |
| 38 | 38 | ||
| 39 | /* | 39 | /* |
| 40 | * interrupt flag manipulation | ||
| 41 | * - use virtual interrupt management since touching the PSR is slow | ||
| 42 | * - ICC2.Z: T if interrupts virtually disabled | ||
| 43 | * - ICC2.C: F if interrupts really disabled | ||
| 44 | * - if Z==1 upon interrupt: | ||
| 45 | * - C is set to 0 | ||
| 46 | * - interrupts are really disabled | ||
| 47 | * - entry.S returns immediately | ||
| 48 | * - uses TIHI (TRAP if Z==0 && C==0) #2 to really reenable interrupts | ||
| 49 | * - if taken, the trap: | ||
| 50 | * - sets ICC2.C | ||
| 51 | * - enables interrupts | ||
| 52 | */ | ||
| 53 | #define local_irq_disable() \ | ||
| 54 | do { \ | ||
| 55 | /* set Z flag, but don't change the C flag */ \ | ||
| 56 | asm volatile(" andcc gr0,gr0,gr0,icc2 \n" \ | ||
| 57 | : \ | ||
| 58 | : \ | ||
| 59 | : "memory", "icc2" \ | ||
| 60 | ); \ | ||
| 61 | } while(0) | ||
| 62 | |||
| 63 | #define local_irq_enable() \ | ||
| 64 | do { \ | ||
| 65 | /* clear Z flag and then test the C flag */ \ | ||
| 66 | asm volatile(" oricc gr0,#1,gr0,icc2 \n" \ | ||
| 67 | " tihi icc2,gr0,#2 \n" \ | ||
| 68 | : \ | ||
| 69 | : \ | ||
| 70 | : "memory", "icc2" \ | ||
| 71 | ); \ | ||
| 72 | } while(0) | ||
| 73 | |||
| 74 | #define local_save_flags(flags) \ | ||
| 75 | do { \ | ||
| 76 | typecheck(unsigned long, flags); \ | ||
| 77 | asm volatile("movsg ccr,%0" \ | ||
| 78 | : "=r"(flags) \ | ||
| 79 | : \ | ||
| 80 | : "memory"); \ | ||
| 81 | \ | ||
| 82 | /* shift ICC2.Z to bit 0 */ \ | ||
| 83 | flags >>= 26; \ | ||
| 84 | \ | ||
| 85 | /* make flags 1 if interrupts disabled, 0 otherwise */ \ | ||
| 86 | flags &= 1UL; \ | ||
| 87 | } while(0) | ||
| 88 | |||
| 89 | #define irqs_disabled() \ | ||
| 90 | ({unsigned long flags; local_save_flags(flags); !!flags; }) | ||
| 91 | |||
| 92 | #define local_irq_save(flags) \ | ||
| 93 | do { \ | ||
| 94 | typecheck(unsigned long, flags); \ | ||
| 95 | local_save_flags(flags); \ | ||
| 96 | local_irq_disable(); \ | ||
| 97 | } while(0) | ||
| 98 | |||
| 99 | #define local_irq_restore(flags) \ | ||
| 100 | do { \ | ||
| 101 | typecheck(unsigned long, flags); \ | ||
| 102 | \ | ||
| 103 | /* load the Z flag by turning 1 if disabled into 0 if disabled \ | ||
| 104 | * and thus setting the Z flag but not the C flag */ \ | ||
| 105 | asm volatile(" xoricc %0,#1,gr0,icc2 \n" \ | ||
| 106 | /* then test Z=0 and C=0 */ \ | ||
| 107 | " tihi icc2,gr0,#2 \n" \ | ||
| 108 | : \ | ||
| 109 | : "r"(flags) \ | ||
| 110 | : "memory", "icc2" \ | ||
| 111 | ); \ | ||
| 112 | \ | ||
| 113 | } while(0) | ||
| 114 | |||
| 115 | /* | ||
| 116 | * real interrupt flag manipulation | ||
| 117 | */ | ||
| 118 | #define __local_irq_disable() \ | ||
| 119 | do { \ | ||
| 120 | unsigned long psr; \ | ||
| 121 | asm volatile(" movsg psr,%0 \n" \ | ||
| 122 | " andi %0,%2,%0 \n" \ | ||
| 123 | " ori %0,%1,%0 \n" \ | ||
| 124 | " movgs %0,psr \n" \ | ||
| 125 | : "=r"(psr) \ | ||
| 126 | : "i" (PSR_PIL_14), "i" (~PSR_PIL) \ | ||
| 127 | : "memory"); \ | ||
| 128 | } while(0) | ||
| 129 | |||
| 130 | #define __local_irq_enable() \ | ||
| 131 | do { \ | ||
| 132 | unsigned long psr; \ | ||
| 133 | asm volatile(" movsg psr,%0 \n" \ | ||
| 134 | " andi %0,%1,%0 \n" \ | ||
| 135 | " movgs %0,psr \n" \ | ||
| 136 | : "=r"(psr) \ | ||
| 137 | : "i" (~PSR_PIL) \ | ||
| 138 | : "memory"); \ | ||
| 139 | } while(0) | ||
| 140 | |||
| 141 | #define __local_save_flags(flags) \ | ||
| 142 | do { \ | ||
| 143 | typecheck(unsigned long, flags); \ | ||
| 144 | asm("movsg psr,%0" \ | ||
| 145 | : "=r"(flags) \ | ||
| 146 | : \ | ||
| 147 | : "memory"); \ | ||
| 148 | } while(0) | ||
| 149 | |||
| 150 | #define __local_irq_save(flags) \ | ||
| 151 | do { \ | ||
| 152 | unsigned long npsr; \ | ||
| 153 | typecheck(unsigned long, flags); \ | ||
| 154 | asm volatile(" movsg psr,%0 \n" \ | ||
| 155 | " andi %0,%3,%1 \n" \ | ||
| 156 | " ori %1,%2,%1 \n" \ | ||
| 157 | " movgs %1,psr \n" \ | ||
| 158 | : "=r"(flags), "=r"(npsr) \ | ||
| 159 | : "i" (PSR_PIL_14), "i" (~PSR_PIL) \ | ||
| 160 | : "memory"); \ | ||
| 161 | } while(0) | ||
| 162 | |||
| 163 | #define __local_irq_restore(flags) \ | ||
| 164 | do { \ | ||
| 165 | typecheck(unsigned long, flags); \ | ||
| 166 | asm volatile(" movgs %0,psr \n" \ | ||
| 167 | : \ | ||
| 168 | : "r" (flags) \ | ||
| 169 | : "memory"); \ | ||
| 170 | } while(0) | ||
| 171 | |||
| 172 | #define __irqs_disabled() \ | ||
| 173 | ((__get_PSR() & PSR_PIL) >= PSR_PIL_14) | ||
| 174 | |||
| 175 | /* | ||
| 176 | * Force strict CPU ordering. | 40 | * Force strict CPU ordering. |
| 177 | */ | 41 | */ |
| 178 | #define nop() asm volatile ("nop"::) | 42 | #define nop() asm volatile ("nop"::) |