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-rw-r--r--arch/cris/include/arch-v10/arch/mmu.h9
-rw-r--r--arch/cris/include/arch-v32/arch/mmu.h10
-rw-r--r--arch/cris/include/asm/pgtable.h2
3 files changed, 13 insertions, 8 deletions
diff --git a/arch/cris/include/arch-v10/arch/mmu.h b/arch/cris/include/arch-v10/arch/mmu.h
index df84f1716e6b..e829e5a37bbe 100644
--- a/arch/cris/include/arch-v10/arch/mmu.h
+++ b/arch/cris/include/arch-v10/arch/mmu.h
@@ -33,10 +33,10 @@ typedef struct
33 33
34/* CRIS PTE bits (see R_TLB_LO in the register description) 34/* CRIS PTE bits (see R_TLB_LO in the register description)
35 * 35 *
36 * Bit: 31-13 12-------4 3 2 1 0 36 * Bit: 31 30-13 12-------4 3 2 1 0
37 * ________________________________________________ 37 * _______________________________________________________
38 * | pfn | reserved | global | valid | kernel | we | 38 * | cache |pfn | reserved | global | valid | kernel | we |
39 * |_____|__________|________|_______|________|_____| 39 * |_______|____|__________|________|_______|________|_____|
40 * 40 *
41 * (pfn = physical frame number) 41 * (pfn = physical frame number)
42 */ 42 */
@@ -53,6 +53,7 @@ typedef struct
53#define _PAGE_VALID (1<<2) /* page is valid */ 53#define _PAGE_VALID (1<<2) /* page is valid */
54#define _PAGE_SILENT_READ (1<<2) /* synonym */ 54#define _PAGE_SILENT_READ (1<<2) /* synonym */
55#define _PAGE_GLOBAL (1<<3) /* global page - context is ignored */ 55#define _PAGE_GLOBAL (1<<3) /* global page - context is ignored */
56#define _PAGE_NO_CACHE (1<<31) /* part of the uncached memory map */
56 57
57/* Bits the HW doesn't care about but the kernel uses them in SW */ 58/* Bits the HW doesn't care about but the kernel uses them in SW */
58 59
diff --git a/arch/cris/include/arch-v32/arch/mmu.h b/arch/cris/include/arch-v32/arch/mmu.h
index 6bcdc3fdf7dc..c1a13e05e963 100644
--- a/arch/cris/include/arch-v32/arch/mmu.h
+++ b/arch/cris/include/arch-v32/arch/mmu.h
@@ -28,10 +28,10 @@ typedef struct
28/* 28/*
29 * CRISv32 PTE bits: 29 * CRISv32 PTE bits:
30 * 30 *
31 * Bit: 31-13 12-5 4 3 2 1 0 31 * Bit: 31 30-13 12-5 4 3 2 1 0
32 * +-----+------+--------+-------+--------+-------+---------+ 32 * +-------+-----+------+--------+-------+--------+-------+---------+
33 * | pfn | zero | global | valid | kernel | write | execute | 33 * | cache | pfn | zero | global | valid | kernel | write | execute |
34 * +-----+------+--------+-------+--------+-------+---------+ 34 * +-------+-----+------+--------+-------+--------+-------+---------+
35 */ 35 */
36 36
37/* 37/*
@@ -45,6 +45,8 @@ typedef struct
45#define _PAGE_VALID (1 << 3) /* Page is valid. */ 45#define _PAGE_VALID (1 << 3) /* Page is valid. */
46#define _PAGE_SILENT_READ (1 << 3) /* Same as above. */ 46#define _PAGE_SILENT_READ (1 << 3) /* Same as above. */
47#define _PAGE_GLOBAL (1 << 4) /* Global page. */ 47#define _PAGE_GLOBAL (1 << 4) /* Global page. */
48#define _PAGE_NO_CACHE (1 << 31) /* part of the uncached memory map */
49
48 50
49/* 51/*
50 * The hardware doesn't care about these bits, but the kernel uses them in 52 * The hardware doesn't care about these bits, but the kernel uses them in
diff --git a/arch/cris/include/asm/pgtable.h b/arch/cris/include/asm/pgtable.h
index 50aa974aa834..1fcce00f01f4 100644
--- a/arch/cris/include/asm/pgtable.h
+++ b/arch/cris/include/asm/pgtable.h
@@ -197,6 +197,8 @@ static inline pte_t __mk_pte(void * page, pgprot_t pgprot)
197static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 197static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
198{ pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; } 198{ pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
199 199
200#define pgprot_noncached(prot) __pgprot((pgprot_val(prot) | _PAGE_NO_CACHE))
201
200 202
201/* pte_val refers to a page in the 0x4xxxxxxx physical DRAM interval 203/* pte_val refers to a page in the 0x4xxxxxxx physical DRAM interval
202 * __pte_page(pte_val) refers to the "virtual" DRAM interval 204 * __pte_page(pte_val) refers to the "virtual" DRAM interval