diff options
Diffstat (limited to 'arch/cris')
| -rw-r--r-- | arch/cris/include/arch-v32/arch/memmap.h | 25 | ||||
| -rw-r--r-- | arch/cris/include/arch-v32/mach-fs/mach/memmap.h | 24 |
2 files changed, 25 insertions, 24 deletions
diff --git a/arch/cris/include/arch-v32/arch/memmap.h b/arch/cris/include/arch-v32/arch/memmap.h index d29df5644d3e..81985c0a6789 100644 --- a/arch/cris/include/arch-v32/arch/memmap.h +++ b/arch/cris/include/arch-v32/arch/memmap.h | |||
| @@ -1,24 +1 @@ | |||
| 1 | #ifndef _ASM_ARCH_MEMMAP_H | #include <mach/memmap.h> | |
| 2 | #define _ASM_ARCH_MEMMAP_H | ||
| 3 | |||
| 4 | #define MEM_CSE0_START (0x00000000) | ||
| 5 | #define MEM_CSE0_SIZE (0x04000000) | ||
| 6 | #define MEM_CSE1_START (0x04000000) | ||
| 7 | #define MEM_CSE1_SIZE (0x04000000) | ||
| 8 | #define MEM_CSR0_START (0x08000000) | ||
| 9 | #define MEM_CSR1_START (0x0c000000) | ||
| 10 | #define MEM_CSP0_START (0x10000000) | ||
| 11 | #define MEM_CSP1_START (0x14000000) | ||
| 12 | #define MEM_CSP2_START (0x18000000) | ||
| 13 | #define MEM_CSP3_START (0x1c000000) | ||
| 14 | #define MEM_CSP4_START (0x20000000) | ||
| 15 | #define MEM_CSP5_START (0x24000000) | ||
| 16 | #define MEM_CSP6_START (0x28000000) | ||
| 17 | #define MEM_CSP7_START (0x2c000000) | ||
| 18 | #define MEM_INTMEM_START (0x38000000) | ||
| 19 | #define MEM_INTMEM_SIZE (0x00020000) | ||
| 20 | #define MEM_DRAM_START (0x40000000) | ||
| 21 | |||
| 22 | #define MEM_NON_CACHEABLE (0x80000000) | ||
| 23 | |||
| 24 | #endif | ||
diff --git a/arch/cris/include/arch-v32/mach-fs/mach/memmap.h b/arch/cris/include/arch-v32/mach-fs/mach/memmap.h new file mode 100644 index 000000000000..d29df5644d3e --- /dev/null +++ b/arch/cris/include/arch-v32/mach-fs/mach/memmap.h | |||
| @@ -0,0 +1,24 @@ | |||
| 1 | #ifndef _ASM_ARCH_MEMMAP_H | ||
| 2 | #define _ASM_ARCH_MEMMAP_H | ||
| 3 | |||
| 4 | #define MEM_CSE0_START (0x00000000) | ||
| 5 | #define MEM_CSE0_SIZE (0x04000000) | ||
| 6 | #define MEM_CSE1_START (0x04000000) | ||
| 7 | #define MEM_CSE1_SIZE (0x04000000) | ||
| 8 | #define MEM_CSR0_START (0x08000000) | ||
| 9 | #define MEM_CSR1_START (0x0c000000) | ||
| 10 | #define MEM_CSP0_START (0x10000000) | ||
| 11 | #define MEM_CSP1_START (0x14000000) | ||
| 12 | #define MEM_CSP2_START (0x18000000) | ||
| 13 | #define MEM_CSP3_START (0x1c000000) | ||
| 14 | #define MEM_CSP4_START (0x20000000) | ||
| 15 | #define MEM_CSP5_START (0x24000000) | ||
| 16 | #define MEM_CSP6_START (0x28000000) | ||
| 17 | #define MEM_CSP7_START (0x2c000000) | ||
| 18 | #define MEM_INTMEM_START (0x38000000) | ||
| 19 | #define MEM_INTMEM_SIZE (0x00020000) | ||
| 20 | #define MEM_DRAM_START (0x40000000) | ||
| 21 | |||
| 22 | #define MEM_NON_CACHEABLE (0x80000000) | ||
| 23 | |||
| 24 | #endif | ||