diff options
Diffstat (limited to 'arch/cris/arch-v32/lib/hw_settings.S')
| -rw-r--r-- | arch/cris/arch-v32/lib/hw_settings.S | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/arch/cris/arch-v32/lib/hw_settings.S b/arch/cris/arch-v32/lib/hw_settings.S new file mode 100644 index 000000000000..5182e8c2cff2 --- /dev/null +++ b/arch/cris/arch-v32/lib/hw_settings.S | |||
| @@ -0,0 +1,73 @@ | |||
| 1 | /* | ||
| 2 | * $Id: hw_settings.S,v 1.3 2005/04/24 18:36:57 starvik Exp $ | ||
| 3 | * | ||
| 4 | * This table is used by some tools to extract hardware parameters. | ||
| 5 | * The table should be included in the kernel and the decompressor. | ||
| 6 | * Don't forget to update the tools if you change this table. | ||
| 7 | * | ||
| 8 | * Copyright (C) 2001 Axis Communications AB | ||
| 9 | * | ||
| 10 | * Authors: Mikael Starvik (starvik@axis.com) | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/config.h> | ||
| 14 | #include <asm/arch/hwregs/asm/reg_map_asm.h> | ||
| 15 | #include <asm/arch/hwregs/asm/bif_core_defs_asm.h> | ||
| 16 | #include <asm/arch/hwregs/asm/gio_defs_asm.h> | ||
| 17 | |||
| 18 | .ascii "HW_PARAM_MAGIC" ; Magic number | ||
| 19 | .dword 0xc0004000 ; Kernel start address | ||
| 20 | |||
| 21 | ; Debug port | ||
| 22 | #ifdef CONFIG_ETRAX_DEBUG_PORT0 | ||
| 23 | .dword 0 | ||
| 24 | #elif defined(CONFIG_ETRAX_DEBUG_PORT1) | ||
| 25 | .dword 1 | ||
| 26 | #elif defined(CONFIG_ETRAX_DEBUG_PORT2) | ||
| 27 | .dword 2 | ||
| 28 | #elif defined(CONFIG_ETRAX_DEBUG_PORT3) | ||
| 29 | .dword 3 | ||
| 30 | #else | ||
| 31 | .dword 4 ; No debug | ||
| 32 | #endif | ||
| 33 | |||
| 34 | ; Register values | ||
| 35 | .dword REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg) | ||
| 36 | .dword CONFIG_ETRAX_MEM_GRP1_CONFIG | ||
| 37 | .dword REG_ADDR(bif_core, regi_bif_core, rw_grp2_cfg) | ||
| 38 | .dword CONFIG_ETRAX_MEM_GRP2_CONFIG | ||
| 39 | .dword REG_ADDR(bif_core, regi_bif_core, rw_grp3_cfg) | ||
| 40 | .dword CONFIG_ETRAX_MEM_GRP3_CONFIG | ||
| 41 | .dword REG_ADDR(bif_core, regi_bif_core, rw_grp4_cfg) | ||
| 42 | .dword CONFIG_ETRAX_MEM_GRP4_CONFIG | ||
| 43 | .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp0) | ||
| 44 | .dword CONFIG_ETRAX_SDRAM_GRP0_CONFIG | ||
| 45 | .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp1) | ||
| 46 | .dword CONFIG_ETRAX_SDRAM_GRP1_CONFIG | ||
| 47 | .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing) | ||
| 48 | .dword CONFIG_ETRAX_SDRAM_TIMING | ||
| 49 | .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cmd) | ||
| 50 | .dword CONFIG_ETRAX_SDRAM_COMMAND | ||
| 51 | |||
| 52 | .dword REG_ADDR(gio, regi_gio, rw_pa_dout) | ||
| 53 | .dword CONFIG_ETRAX_DEF_GIO_PA_OUT | ||
| 54 | .dword REG_ADDR(gio, regi_gio, rw_pa_oe) | ||
| 55 | .dword CONFIG_ETRAX_DEF_GIO_PA_OE | ||
| 56 | .dword REG_ADDR(gio, regi_gio, rw_pb_dout) | ||
| 57 | .dword CONFIG_ETRAX_DEF_GIO_PB_OUT | ||
| 58 | .dword REG_ADDR(gio, regi_gio, rw_pb_oe) | ||
| 59 | .dword CONFIG_ETRAX_DEF_GIO_PB_OE | ||
| 60 | .dword REG_ADDR(gio, regi_gio, rw_pc_dout) | ||
| 61 | .dword CONFIG_ETRAX_DEF_GIO_PC_OUT | ||
| 62 | .dword REG_ADDR(gio, regi_gio, rw_pc_oe) | ||
| 63 | .dword CONFIG_ETRAX_DEF_GIO_PC_OE | ||
| 64 | .dword REG_ADDR(gio, regi_gio, rw_pd_dout) | ||
| 65 | .dword CONFIG_ETRAX_DEF_GIO_PD_OUT | ||
| 66 | .dword REG_ADDR(gio, regi_gio, rw_pd_oe) | ||
| 67 | .dword CONFIG_ETRAX_DEF_GIO_PD_OE | ||
| 68 | .dword REG_ADDR(gio, regi_gio, rw_pe_dout) | ||
| 69 | .dword CONFIG_ETRAX_DEF_GIO_PE_OUT | ||
| 70 | .dword REG_ADDR(gio, regi_gio, rw_pe_oe) | ||
| 71 | .dword CONFIG_ETRAX_DEF_GIO_PE_OE | ||
| 72 | |||
| 73 | .dword 0 ; No more register values | ||