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path: root/arch/cris/arch-v32/drivers/mach-a3/nandflash.c
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Diffstat (limited to 'arch/cris/arch-v32/drivers/mach-a3/nandflash.c')
-rw-r--r--arch/cris/arch-v32/drivers/mach-a3/nandflash.c22
1 files changed, 12 insertions, 10 deletions
diff --git a/arch/cris/arch-v32/drivers/mach-a3/nandflash.c b/arch/cris/arch-v32/drivers/mach-a3/nandflash.c
index 2fda3db0249d..01ed0be2d0d1 100644
--- a/arch/cris/arch-v32/drivers/mach-a3/nandflash.c
+++ b/arch/cris/arch-v32/drivers/mach-a3/nandflash.c
@@ -35,6 +35,11 @@
35#define ALE_BIT 11 35#define ALE_BIT 11
36#define CE_BIT 12 36#define CE_BIT 12
37 37
38struct mtd_info_wrapper {
39 struct mtd_info info;
40 struct nand_chip chip;
41};
42
38/* Bitmask for control pins */ 43/* Bitmask for control pins */
39#define PIN_BITMASK ((1 << CE_BIT) | (1 << CLE_BIT) | (1 << ALE_BIT)) 44#define PIN_BITMASK ((1 << CE_BIT) | (1 << CLE_BIT) | (1 << ALE_BIT))
40 45
@@ -88,7 +93,7 @@ static void crisv32_hwcontrol(struct mtd_info *mtd, int cmd,
88/* 93/*
89* read device ready pin 94* read device ready pin
90*/ 95*/
91int crisv32_device_ready(struct mtd_info *mtd) 96static int crisv32_device_ready(struct mtd_info *mtd)
92{ 97{
93 reg_pio_r_din din = REG_RD(pio, regi_pio, r_din); 98 reg_pio_r_din din = REG_RD(pio, regi_pio, r_din);
94 return din.rdy; 99 return din.rdy;
@@ -102,6 +107,7 @@ struct mtd_info *__init crisv32_nand_flash_probe(void)
102 void __iomem *read_cs; 107 void __iomem *read_cs;
103 void __iomem *write_cs; 108 void __iomem *write_cs;
104 109
110 struct mtd_info_wrapper *wrapper;
105 struct nand_chip *this; 111 struct nand_chip *this;
106 int err = 0; 112 int err = 0;
107 113
@@ -129,9 +135,8 @@ struct mtd_info *__init crisv32_nand_flash_probe(void)
129 REG_WR(pio, regi_pio, rw_oe, oe); 135 REG_WR(pio, regi_pio, rw_oe, oe);
130 136
131 /* Allocate memory for MTD device structure and private data */ 137 /* Allocate memory for MTD device structure and private data */
132 crisv32_mtd = kmalloc(sizeof(struct mtd_info) + 138 wrapper = kzalloc(sizeof(struct mtd_info_wrapper), GFP_KERNEL);
133 sizeof(struct nand_chip), GFP_KERNEL); 139 if (!wrapper) {
134 if (!crisv32_mtd) {
135 printk(KERN_ERR "Unable to allocate CRISv32 NAND MTD " 140 printk(KERN_ERR "Unable to allocate CRISv32 NAND MTD "
136 "device structure.\n"); 141 "device structure.\n");
137 err = -ENOMEM; 142 err = -ENOMEM;
@@ -142,11 +147,8 @@ struct mtd_info *__init crisv32_nand_flash_probe(void)
142 rw_io_access0); 147 rw_io_access0);
143 148
144 /* Get pointer to private data */ 149 /* Get pointer to private data */
145 this = (struct nand_chip *) (&crisv32_mtd[1]); 150 this = &wrapper->chip;
146 151 crisv32_mtd = &wrapper->info;
147 /* Initialize structures */
148 memset((char *) crisv32_mtd, 0, sizeof(struct mtd_info));
149 memset((char *) this, 0, sizeof(struct nand_chip));
150 152
151 /* Link the private data with the MTD structure */ 153 /* Link the private data with the MTD structure */
152 crisv32_mtd->priv = this; 154 crisv32_mtd->priv = this;
@@ -172,7 +174,7 @@ struct mtd_info *__init crisv32_nand_flash_probe(void)
172 return crisv32_mtd; 174 return crisv32_mtd;
173 175
174out_mtd: 176out_mtd:
175 kfree(crisv32_mtd); 177 kfree(wrapper);
176 return NULL; 178 return NULL;
177} 179}
178 180