diff options
Diffstat (limited to 'arch/cris/arch-v32/drivers/i2c.c')
-rw-r--r-- | arch/cris/arch-v32/drivers/i2c.c | 611 |
1 files changed, 611 insertions, 0 deletions
diff --git a/arch/cris/arch-v32/drivers/i2c.c b/arch/cris/arch-v32/drivers/i2c.c new file mode 100644 index 000000000000..440c20a94963 --- /dev/null +++ b/arch/cris/arch-v32/drivers/i2c.c | |||
@@ -0,0 +1,611 @@ | |||
1 | /*!*************************************************************************** | ||
2 | *! | ||
3 | *! FILE NAME : i2c.c | ||
4 | *! | ||
5 | *! DESCRIPTION: implements an interface for IIC/I2C, both directly from other | ||
6 | *! kernel modules (i2c_writereg/readreg) and from userspace using | ||
7 | *! ioctl()'s | ||
8 | *! | ||
9 | *! Nov 30 1998 Torbjorn Eliasson Initial version. | ||
10 | *! Bjorn Wesen Elinux kernel version. | ||
11 | *! Jan 14 2000 Johan Adolfsson Fixed PB shadow register stuff - | ||
12 | *! don't use PB_I2C if DS1302 uses same bits, | ||
13 | *! use PB. | ||
14 | *| June 23 2003 Pieter Grimmerink Added 'i2c_sendnack'. i2c_readreg now | ||
15 | *| generates nack on last received byte, | ||
16 | *| instead of ack. | ||
17 | *| i2c_getack changed data level while clock | ||
18 | *| was high, causing DS75 to see a stop condition | ||
19 | *! | ||
20 | *! --------------------------------------------------------------------------- | ||
21 | *! | ||
22 | *! (C) Copyright 1999-2002 Axis Communications AB, LUND, SWEDEN | ||
23 | *! | ||
24 | *!***************************************************************************/ | ||
25 | /* $Id: i2c.c,v 1.2 2005/05/09 15:29:49 starvik Exp $ */ | ||
26 | /****************** INCLUDE FILES SECTION ***********************************/ | ||
27 | |||
28 | #include <linux/module.h> | ||
29 | #include <linux/sched.h> | ||
30 | #include <linux/slab.h> | ||
31 | #include <linux/errno.h> | ||
32 | #include <linux/kernel.h> | ||
33 | #include <linux/fs.h> | ||
34 | #include <linux/string.h> | ||
35 | #include <linux/init.h> | ||
36 | #include <linux/config.h> | ||
37 | |||
38 | #include <asm/etraxi2c.h> | ||
39 | |||
40 | #include <asm/system.h> | ||
41 | #include <asm/io.h> | ||
42 | #include <asm/delay.h> | ||
43 | |||
44 | #include "i2c.h" | ||
45 | |||
46 | /****************** I2C DEFINITION SECTION *************************/ | ||
47 | |||
48 | #define D(x) | ||
49 | |||
50 | #define I2C_MAJOR 123 /* LOCAL/EXPERIMENTAL */ | ||
51 | static const char i2c_name[] = "i2c"; | ||
52 | |||
53 | #define CLOCK_LOW_TIME 8 | ||
54 | #define CLOCK_HIGH_TIME 8 | ||
55 | #define START_CONDITION_HOLD_TIME 8 | ||
56 | #define STOP_CONDITION_HOLD_TIME 8 | ||
57 | #define ENABLE_OUTPUT 0x01 | ||
58 | #define ENABLE_INPUT 0x00 | ||
59 | #define I2C_CLOCK_HIGH 1 | ||
60 | #define I2C_CLOCK_LOW 0 | ||
61 | #define I2C_DATA_HIGH 1 | ||
62 | #define I2C_DATA_LOW 0 | ||
63 | |||
64 | #define i2c_enable() | ||
65 | #define i2c_disable() | ||
66 | |||
67 | /* enable or disable output-enable, to select output or input on the i2c bus */ | ||
68 | |||
69 | #define i2c_dir_out() crisv32_io_set_dir(&cris_i2c_data, crisv32_io_dir_out) | ||
70 | #define i2c_dir_in() crisv32_io_set_dir(&cris_i2c_data, crisv32_io_dir_in) | ||
71 | |||
72 | /* control the i2c clock and data signals */ | ||
73 | |||
74 | #define i2c_clk(x) crisv32_io_set(&cris_i2c_clk, x) | ||
75 | #define i2c_data(x) crisv32_io_set(&cris_i2c_data, x) | ||
76 | |||
77 | /* read a bit from the i2c interface */ | ||
78 | |||
79 | #define i2c_getbit() crisv32_io_rd(&cris_i2c_data) | ||
80 | |||
81 | #define i2c_delay(usecs) udelay(usecs) | ||
82 | |||
83 | /****************** VARIABLE SECTION ************************************/ | ||
84 | |||
85 | static struct crisv32_iopin cris_i2c_clk; | ||
86 | static struct crisv32_iopin cris_i2c_data; | ||
87 | |||
88 | /****************** FUNCTION DEFINITION SECTION *************************/ | ||
89 | |||
90 | |||
91 | /* generate i2c start condition */ | ||
92 | |||
93 | void | ||
94 | i2c_start(void) | ||
95 | { | ||
96 | /* | ||
97 | * SCL=1 SDA=1 | ||
98 | */ | ||
99 | i2c_dir_out(); | ||
100 | i2c_delay(CLOCK_HIGH_TIME/6); | ||
101 | i2c_data(I2C_DATA_HIGH); | ||
102 | i2c_clk(I2C_CLOCK_HIGH); | ||
103 | i2c_delay(CLOCK_HIGH_TIME); | ||
104 | /* | ||
105 | * SCL=1 SDA=0 | ||
106 | */ | ||
107 | i2c_data(I2C_DATA_LOW); | ||
108 | i2c_delay(START_CONDITION_HOLD_TIME); | ||
109 | /* | ||
110 | * SCL=0 SDA=0 | ||
111 | */ | ||
112 | i2c_clk(I2C_CLOCK_LOW); | ||
113 | i2c_delay(CLOCK_LOW_TIME); | ||
114 | } | ||
115 | |||
116 | /* generate i2c stop condition */ | ||
117 | |||
118 | void | ||
119 | i2c_stop(void) | ||
120 | { | ||
121 | i2c_dir_out(); | ||
122 | |||
123 | /* | ||
124 | * SCL=0 SDA=0 | ||
125 | */ | ||
126 | i2c_clk(I2C_CLOCK_LOW); | ||
127 | i2c_data(I2C_DATA_LOW); | ||
128 | i2c_delay(CLOCK_LOW_TIME*2); | ||
129 | /* | ||
130 | * SCL=1 SDA=0 | ||
131 | */ | ||
132 | i2c_clk(I2C_CLOCK_HIGH); | ||
133 | i2c_delay(CLOCK_HIGH_TIME*2); | ||
134 | /* | ||
135 | * SCL=1 SDA=1 | ||
136 | */ | ||
137 | i2c_data(I2C_DATA_HIGH); | ||
138 | i2c_delay(STOP_CONDITION_HOLD_TIME); | ||
139 | |||
140 | i2c_dir_in(); | ||
141 | } | ||
142 | |||
143 | /* write a byte to the i2c interface */ | ||
144 | |||
145 | void | ||
146 | i2c_outbyte(unsigned char x) | ||
147 | { | ||
148 | int i; | ||
149 | |||
150 | i2c_dir_out(); | ||
151 | |||
152 | for (i = 0; i < 8; i++) { | ||
153 | if (x & 0x80) { | ||
154 | i2c_data(I2C_DATA_HIGH); | ||
155 | } else { | ||
156 | i2c_data(I2C_DATA_LOW); | ||
157 | } | ||
158 | |||
159 | i2c_delay(CLOCK_LOW_TIME/2); | ||
160 | i2c_clk(I2C_CLOCK_HIGH); | ||
161 | i2c_delay(CLOCK_HIGH_TIME); | ||
162 | i2c_clk(I2C_CLOCK_LOW); | ||
163 | i2c_delay(CLOCK_LOW_TIME/2); | ||
164 | x <<= 1; | ||
165 | } | ||
166 | i2c_data(I2C_DATA_LOW); | ||
167 | i2c_delay(CLOCK_LOW_TIME/2); | ||
168 | |||
169 | /* | ||
170 | * enable input | ||
171 | */ | ||
172 | i2c_dir_in(); | ||
173 | } | ||
174 | |||
175 | /* read a byte from the i2c interface */ | ||
176 | |||
177 | unsigned char | ||
178 | i2c_inbyte(void) | ||
179 | { | ||
180 | unsigned char aBitByte = 0; | ||
181 | int i; | ||
182 | |||
183 | /* Switch off I2C to get bit */ | ||
184 | i2c_disable(); | ||
185 | i2c_dir_in(); | ||
186 | i2c_delay(CLOCK_HIGH_TIME/2); | ||
187 | |||
188 | /* Get bit */ | ||
189 | aBitByte |= i2c_getbit(); | ||
190 | |||
191 | /* Enable I2C */ | ||
192 | i2c_enable(); | ||
193 | i2c_delay(CLOCK_LOW_TIME/2); | ||
194 | |||
195 | for (i = 1; i < 8; i++) { | ||
196 | aBitByte <<= 1; | ||
197 | /* Clock pulse */ | ||
198 | i2c_clk(I2C_CLOCK_HIGH); | ||
199 | i2c_delay(CLOCK_HIGH_TIME); | ||
200 | i2c_clk(I2C_CLOCK_LOW); | ||
201 | i2c_delay(CLOCK_LOW_TIME); | ||
202 | |||
203 | /* Switch off I2C to get bit */ | ||
204 | i2c_disable(); | ||
205 | i2c_dir_in(); | ||
206 | i2c_delay(CLOCK_HIGH_TIME/2); | ||
207 | |||
208 | /* Get bit */ | ||
209 | aBitByte |= i2c_getbit(); | ||
210 | |||
211 | /* Enable I2C */ | ||
212 | i2c_enable(); | ||
213 | i2c_delay(CLOCK_LOW_TIME/2); | ||
214 | } | ||
215 | i2c_clk(I2C_CLOCK_HIGH); | ||
216 | i2c_delay(CLOCK_HIGH_TIME); | ||
217 | |||
218 | /* | ||
219 | * we leave the clock low, getbyte is usually followed | ||
220 | * by sendack/nack, they assume the clock to be low | ||
221 | */ | ||
222 | i2c_clk(I2C_CLOCK_LOW); | ||
223 | return aBitByte; | ||
224 | } | ||
225 | |||
226 | /*#--------------------------------------------------------------------------- | ||
227 | *# | ||
228 | *# FUNCTION NAME: i2c_getack | ||
229 | *# | ||
230 | *# DESCRIPTION : checks if ack was received from ic2 | ||
231 | *# | ||
232 | *#--------------------------------------------------------------------------*/ | ||
233 | |||
234 | int | ||
235 | i2c_getack(void) | ||
236 | { | ||
237 | int ack = 1; | ||
238 | /* | ||
239 | * enable output | ||
240 | */ | ||
241 | i2c_dir_out(); | ||
242 | /* | ||
243 | * Release data bus by setting | ||
244 | * data high | ||
245 | */ | ||
246 | i2c_data(I2C_DATA_HIGH); | ||
247 | /* | ||
248 | * enable input | ||
249 | */ | ||
250 | i2c_dir_in(); | ||
251 | i2c_delay(CLOCK_HIGH_TIME/4); | ||
252 | /* | ||
253 | * generate ACK clock pulse | ||
254 | */ | ||
255 | i2c_clk(I2C_CLOCK_HIGH); | ||
256 | /* | ||
257 | * Use PORT PB instead of I2C | ||
258 | * for input. (I2C not working) | ||
259 | */ | ||
260 | i2c_clk(1); | ||
261 | i2c_data(1); | ||
262 | /* | ||
263 | * switch off I2C | ||
264 | */ | ||
265 | i2c_data(1); | ||
266 | i2c_disable(); | ||
267 | i2c_dir_in(); | ||
268 | /* | ||
269 | * now wait for ack | ||
270 | */ | ||
271 | i2c_delay(CLOCK_HIGH_TIME/2); | ||
272 | /* | ||
273 | * check for ack | ||
274 | */ | ||
275 | if(i2c_getbit()) | ||
276 | ack = 0; | ||
277 | i2c_delay(CLOCK_HIGH_TIME/2); | ||
278 | if(!ack){ | ||
279 | if(!i2c_getbit()) /* receiver pulld SDA low */ | ||
280 | ack = 1; | ||
281 | i2c_delay(CLOCK_HIGH_TIME/2); | ||
282 | } | ||
283 | |||
284 | /* | ||
285 | * our clock is high now, make sure data is low | ||
286 | * before we enable our output. If we keep data high | ||
287 | * and enable output, we would generate a stop condition. | ||
288 | */ | ||
289 | i2c_data(I2C_DATA_LOW); | ||
290 | |||
291 | /* | ||
292 | * end clock pulse | ||
293 | */ | ||
294 | i2c_enable(); | ||
295 | i2c_dir_out(); | ||
296 | i2c_clk(I2C_CLOCK_LOW); | ||
297 | i2c_delay(CLOCK_HIGH_TIME/4); | ||
298 | /* | ||
299 | * enable output | ||
300 | */ | ||
301 | i2c_dir_out(); | ||
302 | /* | ||
303 | * remove ACK clock pulse | ||
304 | */ | ||
305 | i2c_data(I2C_DATA_HIGH); | ||
306 | i2c_delay(CLOCK_LOW_TIME/2); | ||
307 | return ack; | ||
308 | } | ||
309 | |||
310 | /*#--------------------------------------------------------------------------- | ||
311 | *# | ||
312 | *# FUNCTION NAME: I2C::sendAck | ||
313 | *# | ||
314 | *# DESCRIPTION : Send ACK on received data | ||
315 | *# | ||
316 | *#--------------------------------------------------------------------------*/ | ||
317 | void | ||
318 | i2c_sendack(void) | ||
319 | { | ||
320 | /* | ||
321 | * enable output | ||
322 | */ | ||
323 | i2c_delay(CLOCK_LOW_TIME); | ||
324 | i2c_dir_out(); | ||
325 | /* | ||
326 | * set ack pulse high | ||
327 | */ | ||
328 | i2c_data(I2C_DATA_LOW); | ||
329 | /* | ||
330 | * generate clock pulse | ||
331 | */ | ||
332 | i2c_delay(CLOCK_HIGH_TIME/6); | ||
333 | i2c_clk(I2C_CLOCK_HIGH); | ||
334 | i2c_delay(CLOCK_HIGH_TIME); | ||
335 | i2c_clk(I2C_CLOCK_LOW); | ||
336 | i2c_delay(CLOCK_LOW_TIME/6); | ||
337 | /* | ||
338 | * reset data out | ||
339 | */ | ||
340 | i2c_data(I2C_DATA_HIGH); | ||
341 | i2c_delay(CLOCK_LOW_TIME); | ||
342 | |||
343 | i2c_dir_in(); | ||
344 | } | ||
345 | |||
346 | /*#--------------------------------------------------------------------------- | ||
347 | *# | ||
348 | *# FUNCTION NAME: i2c_sendnack | ||
349 | *# | ||
350 | *# DESCRIPTION : Sends NACK on received data | ||
351 | *# | ||
352 | *#--------------------------------------------------------------------------*/ | ||
353 | void | ||
354 | i2c_sendnack(void) | ||
355 | { | ||
356 | /* | ||
357 | * enable output | ||
358 | */ | ||
359 | i2c_delay(CLOCK_LOW_TIME); | ||
360 | i2c_dir_out(); | ||
361 | /* | ||
362 | * set data high | ||
363 | */ | ||
364 | i2c_data(I2C_DATA_HIGH); | ||
365 | /* | ||
366 | * generate clock pulse | ||
367 | */ | ||
368 | i2c_delay(CLOCK_HIGH_TIME/6); | ||
369 | i2c_clk(I2C_CLOCK_HIGH); | ||
370 | i2c_delay(CLOCK_HIGH_TIME); | ||
371 | i2c_clk(I2C_CLOCK_LOW); | ||
372 | i2c_delay(CLOCK_LOW_TIME); | ||
373 | |||
374 | i2c_dir_in(); | ||
375 | } | ||
376 | |||
377 | /*#--------------------------------------------------------------------------- | ||
378 | *# | ||
379 | *# FUNCTION NAME: i2c_writereg | ||
380 | *# | ||
381 | *# DESCRIPTION : Writes a value to an I2C device | ||
382 | *# | ||
383 | *#--------------------------------------------------------------------------*/ | ||
384 | int | ||
385 | i2c_writereg(unsigned char theSlave, unsigned char theReg, | ||
386 | unsigned char theValue) | ||
387 | { | ||
388 | int error, cntr = 3; | ||
389 | unsigned long flags; | ||
390 | |||
391 | do { | ||
392 | error = 0; | ||
393 | /* | ||
394 | * we don't like to be interrupted | ||
395 | */ | ||
396 | local_irq_save(flags); | ||
397 | |||
398 | i2c_start(); | ||
399 | /* | ||
400 | * send slave address | ||
401 | */ | ||
402 | i2c_outbyte((theSlave & 0xfe)); | ||
403 | /* | ||
404 | * wait for ack | ||
405 | */ | ||
406 | if(!i2c_getack()) | ||
407 | error = 1; | ||
408 | /* | ||
409 | * now select register | ||
410 | */ | ||
411 | i2c_dir_out(); | ||
412 | i2c_outbyte(theReg); | ||
413 | /* | ||
414 | * now it's time to wait for ack | ||
415 | */ | ||
416 | if(!i2c_getack()) | ||
417 | error |= 2; | ||
418 | /* | ||
419 | * send register register data | ||
420 | */ | ||
421 | i2c_outbyte(theValue); | ||
422 | /* | ||
423 | * now it's time to wait for ack | ||
424 | */ | ||
425 | if(!i2c_getack()) | ||
426 | error |= 4; | ||
427 | /* | ||
428 | * end byte stream | ||
429 | */ | ||
430 | i2c_stop(); | ||
431 | /* | ||
432 | * enable interrupt again | ||
433 | */ | ||
434 | local_irq_restore(flags); | ||
435 | |||
436 | } while(error && cntr--); | ||
437 | |||
438 | i2c_delay(CLOCK_LOW_TIME); | ||
439 | |||
440 | return -error; | ||
441 | } | ||
442 | |||
443 | /*#--------------------------------------------------------------------------- | ||
444 | *# | ||
445 | *# FUNCTION NAME: i2c_readreg | ||
446 | *# | ||
447 | *# DESCRIPTION : Reads a value from the decoder registers. | ||
448 | *# | ||
449 | *#--------------------------------------------------------------------------*/ | ||
450 | unsigned char | ||
451 | i2c_readreg(unsigned char theSlave, unsigned char theReg) | ||
452 | { | ||
453 | unsigned char b = 0; | ||
454 | int error, cntr = 3; | ||
455 | unsigned long flags; | ||
456 | |||
457 | do { | ||
458 | error = 0; | ||
459 | /* | ||
460 | * we don't like to be interrupted | ||
461 | */ | ||
462 | local_irq_save(flags); | ||
463 | /* | ||
464 | * generate start condition | ||
465 | */ | ||
466 | i2c_start(); | ||
467 | |||
468 | /* | ||
469 | * send slave address | ||
470 | */ | ||
471 | i2c_outbyte((theSlave & 0xfe)); | ||
472 | /* | ||
473 | * wait for ack | ||
474 | */ | ||
475 | if(!i2c_getack()) | ||
476 | error = 1; | ||
477 | /* | ||
478 | * now select register | ||
479 | */ | ||
480 | i2c_dir_out(); | ||
481 | i2c_outbyte(theReg); | ||
482 | /* | ||
483 | * now it's time to wait for ack | ||
484 | */ | ||
485 | if(!i2c_getack()) | ||
486 | error = 1; | ||
487 | /* | ||
488 | * repeat start condition | ||
489 | */ | ||
490 | i2c_delay(CLOCK_LOW_TIME); | ||
491 | i2c_start(); | ||
492 | /* | ||
493 | * send slave address | ||
494 | */ | ||
495 | i2c_outbyte(theSlave | 0x01); | ||
496 | /* | ||
497 | * wait for ack | ||
498 | */ | ||
499 | if(!i2c_getack()) | ||
500 | error = 1; | ||
501 | /* | ||
502 | * fetch register | ||
503 | */ | ||
504 | b = i2c_inbyte(); | ||
505 | /* | ||
506 | * last received byte needs to be nacked | ||
507 | * instead of acked | ||
508 | */ | ||
509 | i2c_sendnack(); | ||
510 | /* | ||
511 | * end sequence | ||
512 | */ | ||
513 | i2c_stop(); | ||
514 | /* | ||
515 | * enable interrupt again | ||
516 | */ | ||
517 | local_irq_restore(flags); | ||
518 | |||
519 | } while(error && cntr--); | ||
520 | |||
521 | return b; | ||
522 | } | ||
523 | |||
524 | static int | ||
525 | i2c_open(struct inode *inode, struct file *filp) | ||
526 | { | ||
527 | return 0; | ||
528 | } | ||
529 | |||
530 | static int | ||
531 | i2c_release(struct inode *inode, struct file *filp) | ||
532 | { | ||
533 | return 0; | ||
534 | } | ||
535 | |||
536 | /* Main device API. ioctl's to write or read to/from i2c registers. | ||
537 | */ | ||
538 | |||
539 | static int | ||
540 | i2c_ioctl(struct inode *inode, struct file *file, | ||
541 | unsigned int cmd, unsigned long arg) | ||
542 | { | ||
543 | if(_IOC_TYPE(cmd) != ETRAXI2C_IOCTYPE) { | ||
544 | return -EINVAL; | ||
545 | } | ||
546 | |||
547 | switch (_IOC_NR(cmd)) { | ||
548 | case I2C_WRITEREG: | ||
549 | /* write to an i2c slave */ | ||
550 | D(printk("i2cw %d %d %d\n", | ||
551 | I2C_ARGSLAVE(arg), | ||
552 | I2C_ARGREG(arg), | ||
553 | I2C_ARGVALUE(arg))); | ||
554 | |||
555 | return i2c_writereg(I2C_ARGSLAVE(arg), | ||
556 | I2C_ARGREG(arg), | ||
557 | I2C_ARGVALUE(arg)); | ||
558 | case I2C_READREG: | ||
559 | { | ||
560 | unsigned char val; | ||
561 | /* read from an i2c slave */ | ||
562 | D(printk("i2cr %d %d ", | ||
563 | I2C_ARGSLAVE(arg), | ||
564 | I2C_ARGREG(arg))); | ||
565 | val = i2c_readreg(I2C_ARGSLAVE(arg), I2C_ARGREG(arg)); | ||
566 | D(printk("= %d\n", val)); | ||
567 | return val; | ||
568 | } | ||
569 | default: | ||
570 | return -EINVAL; | ||
571 | |||
572 | } | ||
573 | |||
574 | return 0; | ||
575 | } | ||
576 | |||
577 | static struct file_operations i2c_fops = { | ||
578 | owner: THIS_MODULE, | ||
579 | ioctl: i2c_ioctl, | ||
580 | open: i2c_open, | ||
581 | release: i2c_release, | ||
582 | }; | ||
583 | |||
584 | int __init | ||
585 | i2c_init(void) | ||
586 | { | ||
587 | int res; | ||
588 | |||
589 | /* Setup and enable the Port B I2C interface */ | ||
590 | |||
591 | crisv32_io_get_name(&cris_i2c_data, CONFIG_ETRAX_I2C_DATA_PORT); | ||
592 | crisv32_io_get_name(&cris_i2c_clk, CONFIG_ETRAX_I2C_CLK_PORT); | ||
593 | |||
594 | /* register char device */ | ||
595 | |||
596 | res = register_chrdev(I2C_MAJOR, i2c_name, &i2c_fops); | ||
597 | if(res < 0) { | ||
598 | printk(KERN_ERR "i2c: couldn't get a major number.\n"); | ||
599 | return res; | ||
600 | } | ||
601 | |||
602 | printk(KERN_INFO "I2C driver v2.2, (c) 1999-2001 Axis Communications AB\n"); | ||
603 | |||
604 | return 0; | ||
605 | } | ||
606 | |||
607 | /* this makes sure that i2c_init is called during boot */ | ||
608 | |||
609 | module_init(i2c_init); | ||
610 | |||
611 | /****************** END OF FILE i2c.c ********************************/ | ||