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-rw-r--r--arch/cris/arch-v32/drivers/axisflashmap.c455
1 files changed, 455 insertions, 0 deletions
diff --git a/arch/cris/arch-v32/drivers/axisflashmap.c b/arch/cris/arch-v32/drivers/axisflashmap.c
new file mode 100644
index 000000000000..78ed52b1cdac
--- /dev/null
+++ b/arch/cris/arch-v32/drivers/axisflashmap.c
@@ -0,0 +1,455 @@
1/*
2 * Physical mapping layer for MTD using the Axis partitiontable format
3 *
4 * Copyright (c) 2001, 2002, 2003 Axis Communications AB
5 *
6 * This file is under the GPL.
7 *
8 * First partition is always sector 0 regardless of if we find a partitiontable
9 * or not. In the start of the next sector, there can be a partitiontable that
10 * tells us what other partitions to define. If there isn't, we use a default
11 * partition split defined below.
12 *
13 * Copy of os/lx25/arch/cris/arch-v10/drivers/axisflashmap.c 1.5
14 * with minor changes.
15 *
16 */
17
18#include <linux/module.h>
19#include <linux/types.h>
20#include <linux/kernel.h>
21#include <linux/config.h>
22#include <linux/init.h>
23
24#include <linux/mtd/concat.h>
25#include <linux/mtd/map.h>
26#include <linux/mtd/mtd.h>
27#include <linux/mtd/mtdram.h>
28#include <linux/mtd/partitions.h>
29
30#include <asm/arch/hwregs/config_defs.h>
31#include <asm/axisflashmap.h>
32#include <asm/mmu.h>
33
34#define MEM_CSE0_SIZE (0x04000000)
35#define MEM_CSE1_SIZE (0x04000000)
36
37#define FLASH_UNCACHED_ADDR KSEG_E
38#define FLASH_CACHED_ADDR KSEG_F
39
40#if CONFIG_ETRAX_FLASH_BUSWIDTH==1
41#define flash_data __u8
42#elif CONFIG_ETRAX_FLASH_BUSWIDTH==2
43#define flash_data __u16
44#elif CONFIG_ETRAX_FLASH_BUSWIDTH==4
45#define flash_data __u16
46#endif
47
48/* From head.S */
49extern unsigned long romfs_start, romfs_length, romfs_in_flash;
50
51/* The master mtd for the entire flash. */
52struct mtd_info* axisflash_mtd = NULL;
53
54/* Map driver functions. */
55
56static map_word flash_read(struct map_info *map, unsigned long ofs)
57{
58 map_word tmp;
59 tmp.x[0] = *(flash_data *)(map->map_priv_1 + ofs);
60 return tmp;
61}
62
63static void flash_copy_from(struct map_info *map, void *to,
64 unsigned long from, ssize_t len)
65{
66 memcpy(to, (void *)(map->map_priv_1 + from), len);
67}
68
69static void flash_write(struct map_info *map, map_word d, unsigned long adr)
70{
71 *(flash_data *)(map->map_priv_1 + adr) = (flash_data)d.x[0];
72}
73
74/*
75 * The map for chip select e0.
76 *
77 * We run into tricky coherence situations if we mix cached with uncached
78 * accesses to we only use the uncached version here.
79 *
80 * The size field is the total size where the flash chips may be mapped on the
81 * chip select. MTD probes should find all devices there and it does not matter
82 * if there are unmapped gaps or aliases (mirrors of flash devices). The MTD
83 * probes will ignore them.
84 *
85 * The start address in map_priv_1 is in virtual memory so we cannot use
86 * MEM_CSE0_START but must rely on that FLASH_UNCACHED_ADDR is the start
87 * address of cse0.
88 */
89static struct map_info map_cse0 = {
90 .name = "cse0",
91 .size = MEM_CSE0_SIZE,
92 .bankwidth = CONFIG_ETRAX_FLASH_BUSWIDTH,
93 .read = flash_read,
94 .copy_from = flash_copy_from,
95 .write = flash_write,
96 .map_priv_1 = FLASH_UNCACHED_ADDR
97};
98
99/*
100 * The map for chip select e1.
101 *
102 * If there was a gap between cse0 and cse1, map_priv_1 would get the wrong
103 * address, but there isn't.
104 */
105static struct map_info map_cse1 = {
106 .name = "cse1",
107 .size = MEM_CSE1_SIZE,
108 .bankwidth = CONFIG_ETRAX_FLASH_BUSWIDTH,
109 .read = flash_read,
110 .copy_from = flash_copy_from,
111 .write = flash_write,
112 .map_priv_1 = FLASH_UNCACHED_ADDR + MEM_CSE0_SIZE
113};
114
115/* If no partition-table was found, we use this default-set. */
116#define MAX_PARTITIONS 7
117#define NUM_DEFAULT_PARTITIONS 3
118
119/*
120 * Default flash size is 2MB. CONFIG_ETRAX_PTABLE_SECTOR is most likely the
121 * size of one flash block and "filesystem"-partition needs 5 blocks to be able
122 * to use JFFS.
123 */
124static struct mtd_partition axis_default_partitions[NUM_DEFAULT_PARTITIONS] = {
125 {
126 .name = "boot firmware",
127 .size = CONFIG_ETRAX_PTABLE_SECTOR,
128 .offset = 0
129 },
130 {
131 .name = "kernel",
132 .size = 0x200000 - (6 * CONFIG_ETRAX_PTABLE_SECTOR),
133 .offset = CONFIG_ETRAX_PTABLE_SECTOR
134 },
135 {
136 .name = "filesystem",
137 .size = 5 * CONFIG_ETRAX_PTABLE_SECTOR,
138 .offset = 0x200000 - (5 * CONFIG_ETRAX_PTABLE_SECTOR)
139 }
140};
141
142/* Initialize the ones normally used. */
143static struct mtd_partition axis_partitions[MAX_PARTITIONS] = {
144 {
145 .name = "part0",
146 .size = CONFIG_ETRAX_PTABLE_SECTOR,
147 .offset = 0
148 },
149 {
150 .name = "part1",
151 .size = 0,
152 .offset = 0
153 },
154 {
155 .name = "part2",
156 .size = 0,
157 .offset = 0
158 },
159 {
160 .name = "part3",
161 .size = 0,
162 .offset = 0
163 },
164 {
165 .name = "part4",
166 .size = 0,
167 .offset = 0
168 },
169 {
170 .name = "part5",
171 .size = 0,
172 .offset = 0
173 },
174 {
175 .name = "part6",
176 .size = 0,
177 .offset = 0
178 },
179};
180
181/*
182 * Probe a chip select for AMD-compatible (JEDEC) or CFI-compatible flash
183 * chips in that order (because the amd_flash-driver is faster).
184 */
185static struct mtd_info *probe_cs(struct map_info *map_cs)
186{
187 struct mtd_info *mtd_cs = NULL;
188
189 printk(KERN_INFO
190 "%s: Probing a 0x%08lx bytes large window at 0x%08lx.\n",
191 map_cs->name, map_cs->size, map_cs->map_priv_1);
192
193#ifdef CONFIG_MTD_AMDSTD
194 mtd_cs = do_map_probe("amd_flash", map_cs);
195#endif
196#ifdef CONFIG_MTD_CFI
197 if (!mtd_cs) {
198 mtd_cs = do_map_probe("cfi_probe", map_cs);
199 }
200#endif
201
202 return mtd_cs;
203}
204
205/*
206 * Probe each chip select individually for flash chips. If there are chips on
207 * both cse0 and cse1, the mtd_info structs will be concatenated to one struct
208 * so that MTD partitions can cross chip boundries.
209 *
210 * The only known restriction to how you can mount your chips is that each
211 * chip select must hold similar flash chips. But you need external hardware
212 * to do that anyway and you can put totally different chips on cse0 and cse1
213 * so it isn't really much of a restriction.
214 */
215extern struct mtd_info* __init crisv32_nand_flash_probe (void);
216static struct mtd_info *flash_probe(void)
217{
218 struct mtd_info *mtd_cse0;
219 struct mtd_info *mtd_cse1;
220 struct mtd_info *mtd_nand = NULL;
221 struct mtd_info *mtd_total;
222 struct mtd_info *mtds[3];
223 int count = 0;
224
225 if ((mtd_cse0 = probe_cs(&map_cse0)) != NULL)
226 mtds[count++] = mtd_cse0;
227 if ((mtd_cse1 = probe_cs(&map_cse1)) != NULL)
228 mtds[count++] = mtd_cse1;
229
230#ifdef CONFIG_ETRAX_NANDFLASH
231 if ((mtd_nand = crisv32_nand_flash_probe()) != NULL)
232 mtds[count++] = mtd_nand;
233#endif
234
235 if (!mtd_cse0 && !mtd_cse1 && !mtd_nand) {
236 /* No chip found. */
237 return NULL;
238 }
239
240 if (count > 1) {
241#ifdef CONFIG_MTD_CONCAT
242 /* Since the concatenation layer adds a small overhead we
243 * could try to figure out if the chips in cse0 and cse1 are
244 * identical and reprobe the whole cse0+cse1 window. But since
245 * flash chips are slow, the overhead is relatively small.
246 * So we use the MTD concatenation layer instead of further
247 * complicating the probing procedure.
248 */
249 mtd_total = mtd_concat_create(mtds,
250 count,
251 "cse0+cse1+nand");
252#else
253 printk(KERN_ERR "%s and %s: Cannot concatenate due to kernel "
254 "(mis)configuration!\n", map_cse0.name, map_cse1.name);
255 mtd_toal = NULL;
256#endif
257 if (!mtd_total) {
258 printk(KERN_ERR "%s and %s: Concatenation failed!\n",
259 map_cse0.name, map_cse1.name);
260
261 /* The best we can do now is to only use what we found
262 * at cse0.
263 */
264 mtd_total = mtd_cse0;
265 map_destroy(mtd_cse1);
266 }
267 } else {
268 mtd_total = mtd_cse0? mtd_cse0 : mtd_cse1 ? mtd_cse1 : mtd_nand;
269
270 }
271
272 return mtd_total;
273}
274
275extern unsigned long crisv32_nand_boot;
276extern unsigned long crisv32_nand_cramfs_offset;
277
278/*
279 * Probe the flash chip(s) and, if it succeeds, read the partition-table
280 * and register the partitions with MTD.
281 */
282static int __init init_axis_flash(void)
283{
284 struct mtd_info *mymtd;
285 int err = 0;
286 int pidx = 0;
287 struct partitiontable_head *ptable_head = NULL;
288 struct partitiontable_entry *ptable;
289 int use_default_ptable = 1; /* Until proven otherwise. */
290 const char *pmsg = KERN_INFO " /dev/flash%d at 0x%08x, size 0x%08x\n";
291 static char page[512];
292 size_t len;
293
294#ifndef CONFIG_ETRAXFS_SIM
295 mymtd = flash_probe();
296 mymtd->read(mymtd, CONFIG_ETRAX_PTABLE_SECTOR, 512, &len, page);
297 ptable_head = (struct partitiontable_head *)(page + PARTITION_TABLE_OFFSET);
298
299 if (!mymtd) {
300 /* There's no reason to use this module if no flash chip can
301 * be identified. Make sure that's understood.
302 */
303 printk(KERN_INFO "axisflashmap: Found no flash chip.\n");
304 } else {
305 printk(KERN_INFO "%s: 0x%08x bytes of flash memory.\n",
306 mymtd->name, mymtd->size);
307 axisflash_mtd = mymtd;
308 }
309
310 if (mymtd) {
311 mymtd->owner = THIS_MODULE;
312 }
313 pidx++; /* First partition is always set to the default. */
314
315 if (ptable_head && (ptable_head->magic == PARTITION_TABLE_MAGIC)
316 && (ptable_head->size <
317 (MAX_PARTITIONS * sizeof(struct partitiontable_entry) +
318 PARTITIONTABLE_END_MARKER_SIZE))
319 && (*(unsigned long*)((void*)ptable_head + sizeof(*ptable_head) +
320 ptable_head->size -
321 PARTITIONTABLE_END_MARKER_SIZE)
322 == PARTITIONTABLE_END_MARKER)) {
323 /* Looks like a start, sane length and end of a
324 * partition table, lets check csum etc.
325 */
326 int ptable_ok = 0;
327 struct partitiontable_entry *max_addr =
328 (struct partitiontable_entry *)
329 ((unsigned long)ptable_head + sizeof(*ptable_head) +
330 ptable_head->size);
331 unsigned long offset = CONFIG_ETRAX_PTABLE_SECTOR;
332 unsigned char *p;
333 unsigned long csum = 0;
334
335 ptable = (struct partitiontable_entry *)
336 ((unsigned long)ptable_head + sizeof(*ptable_head));
337
338 /* Lets be PARANOID, and check the checksum. */
339 p = (unsigned char*) ptable;
340
341 while (p <= (unsigned char*)max_addr) {
342 csum += *p++;
343 csum += *p++;
344 csum += *p++;
345 csum += *p++;
346 }
347 ptable_ok = (csum == ptable_head->checksum);
348
349 /* Read the entries and use/show the info. */
350 printk(KERN_INFO " Found a%s partition table at 0x%p-0x%p.\n",
351 (ptable_ok ? " valid" : "n invalid"), ptable_head,
352 max_addr);
353
354 /* We have found a working bootblock. Now read the
355 * partition table. Scan the table. It ends when
356 * there is 0xffffffff, that is, empty flash.
357 */
358 while (ptable_ok
359 && ptable->offset != 0xffffffff
360 && ptable < max_addr
361 && pidx < MAX_PARTITIONS) {
362
363 axis_partitions[pidx].offset = offset + ptable->offset + (crisv32_nand_boot ? 16384 : 0);
364 axis_partitions[pidx].size = ptable->size;
365
366 printk(pmsg, pidx, axis_partitions[pidx].offset,
367 axis_partitions[pidx].size);
368 pidx++;
369 ptable++;
370 }
371 use_default_ptable = !ptable_ok;
372 }
373
374 if (romfs_in_flash) {
375 /* Add an overlapping device for the root partition (romfs). */
376
377 axis_partitions[pidx].name = "romfs";
378 if (crisv32_nand_boot) {
379 char* data = kmalloc(1024, GFP_KERNEL);
380 int len;
381 int offset = crisv32_nand_cramfs_offset & ~(1024-1);
382 char* tmp;
383
384 mymtd->read(mymtd, offset, 1024, &len, data);
385 tmp = &data[crisv32_nand_cramfs_offset % 512];
386 axis_partitions[pidx].size = *(unsigned*)(tmp + 4);
387 axis_partitions[pidx].offset = crisv32_nand_cramfs_offset;
388 kfree(data);
389 } else {
390 axis_partitions[pidx].size = romfs_length;
391 axis_partitions[pidx].offset = romfs_start - FLASH_CACHED_ADDR;
392 }
393
394 axis_partitions[pidx].mask_flags |= MTD_WRITEABLE;
395
396 printk(KERN_INFO
397 " Adding readonly flash partition for romfs image:\n");
398 printk(pmsg, pidx, axis_partitions[pidx].offset,
399 axis_partitions[pidx].size);
400 pidx++;
401 }
402
403 if (mymtd) {
404 if (use_default_ptable) {
405 printk(KERN_INFO " Using default partition table.\n");
406 err = add_mtd_partitions(mymtd, axis_default_partitions,
407 NUM_DEFAULT_PARTITIONS);
408 } else {
409 err = add_mtd_partitions(mymtd, axis_partitions, pidx);
410 }
411
412 if (err) {
413 panic("axisflashmap could not add MTD partitions!\n");
414 }
415 }
416/* CONFIG_EXTRAXFS_SIM */
417#endif
418
419 if (!romfs_in_flash) {
420 /* Create an RAM device for the root partition (romfs). */
421
422#if !defined(CONFIG_MTD_MTDRAM) || (CONFIG_MTDRAM_TOTAL_SIZE != 0) || (CONFIG_MTDRAM_ABS_POS != 0)
423 /* No use trying to boot this kernel from RAM. Panic! */
424 printk(KERN_EMERG "axisflashmap: Cannot create an MTD RAM "
425 "device due to kernel (mis)configuration!\n");
426 panic("This kernel cannot boot from RAM!\n");
427#else
428 struct mtd_info *mtd_ram;
429
430 mtd_ram = (struct mtd_info *)kmalloc(sizeof(struct mtd_info),
431 GFP_KERNEL);
432 if (!mtd_ram) {
433 panic("axisflashmap couldn't allocate memory for "
434 "mtd_info!\n");
435 }
436
437 printk(KERN_INFO " Adding RAM partition for romfs image:\n");
438 printk(pmsg, pidx, romfs_start, romfs_length);
439
440 err = mtdram_init_device(mtd_ram, (void*)romfs_start,
441 romfs_length, "romfs");
442 if (err) {
443 panic("axisflashmap could not initialize MTD RAM "
444 "device!\n");
445 }
446#endif
447 }
448
449 return err;
450}
451
452/* This adds the above to the kernels init-call chain. */
453module_init(init_axis_flash);
454
455EXPORT_SYMBOL(axisflash_mtd);