diff options
Diffstat (limited to 'arch/cris/arch-v32/boot/compressed/misc.c')
-rw-r--r-- | arch/cris/arch-v32/boot/compressed/misc.c | 72 |
1 files changed, 53 insertions, 19 deletions
diff --git a/arch/cris/arch-v32/boot/compressed/misc.c b/arch/cris/arch-v32/boot/compressed/misc.c index 0169ba1ca9c9..55b2695c5d70 100644 --- a/arch/cris/arch-v32/boot/compressed/misc.c +++ b/arch/cris/arch-v32/boot/compressed/misc.c | |||
@@ -1,8 +1,6 @@ | |||
1 | /* | 1 | /* |
2 | * misc.c | 2 | * misc.c |
3 | * | 3 | * |
4 | * $Id: misc.c,v 1.8 2005/04/24 18:34:29 starvik Exp $ | ||
5 | * | ||
6 | * This is a collection of several routines from gzip-1.0.3 | 4 | * This is a collection of several routines from gzip-1.0.3 |
7 | * adapted for Linux. | 5 | * adapted for Linux. |
8 | * | 6 | * |
@@ -22,9 +20,13 @@ | |||
22 | 20 | ||
23 | 21 | ||
24 | #include <linux/types.h> | 22 | #include <linux/types.h> |
25 | #include <asm/arch/hwregs/reg_rdwr.h> | 23 | #include <hwregs/reg_rdwr.h> |
26 | #include <asm/arch/hwregs/reg_map.h> | 24 | #include <hwregs/reg_map.h> |
27 | #include <asm/arch/hwregs/ser_defs.h> | 25 | #include <hwregs/ser_defs.h> |
26 | #include <hwregs/pinmux_defs.h> | ||
27 | #ifdef CONFIG_CRIS_MACH_ARTPEC3 | ||
28 | #include <hwregs/clkgen_defs.h> | ||
29 | #endif | ||
28 | 30 | ||
29 | /* | 31 | /* |
30 | * gzip declarations | 32 | * gzip declarations |
@@ -85,7 +87,6 @@ static unsigned outcnt = 0; /* bytes in output buffer */ | |||
85 | # define Tracecv(c,x) | 87 | # define Tracecv(c,x) |
86 | #endif | 88 | #endif |
87 | 89 | ||
88 | static int fill_inbuf(void); | ||
89 | static void flush_window(void); | 90 | static void flush_window(void); |
90 | static void error(char *m); | 91 | static void error(char *m); |
91 | static void gzip_mark(void **); | 92 | static void gzip_mark(void **); |
@@ -186,6 +187,8 @@ memset(void* s, int c, size_t n) | |||
186 | char *ss = (char*)s; | 187 | char *ss = (char*)s; |
187 | 188 | ||
188 | for (i=0;i<n;i++) ss[i] = c; | 189 | for (i=0;i<n;i++) ss[i] = c; |
190 | |||
191 | return s; | ||
189 | } | 192 | } |
190 | 193 | ||
191 | void* | 194 | void* |
@@ -196,6 +199,8 @@ memcpy(void* __dest, __const void* __src, | |||
196 | char *d = (char *)__dest, *s = (char *)__src; | 199 | char *d = (char *)__dest, *s = (char *)__src; |
197 | 200 | ||
198 | for (i=0;i<__n;i++) d[i] = s[i]; | 201 | for (i=0;i<__n;i++) d[i] = s[i]; |
202 | |||
203 | return __dest; | ||
199 | } | 204 | } |
200 | 205 | ||
201 | /* =========================================================================== | 206 | /* =========================================================================== |
@@ -225,15 +230,15 @@ flush_window() | |||
225 | static void | 230 | static void |
226 | error(char *x) | 231 | error(char *x) |
227 | { | 232 | { |
228 | puts("\n\n"); | 233 | puts("\r\n\n"); |
229 | puts(x); | 234 | puts(x); |
230 | puts("\n\n -- System halted\n"); | 235 | puts("\r\n\n -- System halted\n"); |
231 | 236 | ||
232 | while(1); /* Halt */ | 237 | while(1); /* Halt */ |
233 | } | 238 | } |
234 | 239 | ||
235 | void | 240 | void |
236 | setup_normal_output_buffer() | 241 | setup_normal_output_buffer(void) |
237 | { | 242 | { |
238 | output_data = (char *)KERNEL_LOAD_ADR; | 243 | output_data = (char *)KERNEL_LOAD_ADR; |
239 | } | 244 | } |
@@ -262,15 +267,17 @@ serial_setup(reg_scope_instances regi_ser) | |||
262 | rec_baud = REG_RD(ser, regi_ser, rw_rec_baud_div); | 267 | rec_baud = REG_RD(ser, regi_ser, rw_rec_baud_div); |
263 | 268 | ||
264 | tr_ctrl.stop_bits = 1; /* 2 stop bits. */ | 269 | tr_ctrl.stop_bits = 1; /* 2 stop bits. */ |
270 | tr_ctrl.en = 1; /* enable transmitter */ | ||
271 | rec_ctrl.en = 1; /* enabler receiver */ | ||
265 | 272 | ||
266 | /* | 273 | /* |
267 | * The baudrate setup is a bit fishy, but in the end the transceiver is | 274 | * The baudrate setup used to be a bit fishy, but now transmitter and |
268 | * set to 4800 and the receiver to 115200. The magic value is | 275 | * receiver are both set to the intended baud rate, 115200. |
269 | * 29.493 MHz. | 276 | * The magic value is 29.493 MHz. |
270 | */ | 277 | */ |
271 | tr_ctrl.base_freq = regk_ser_f29_493; | 278 | tr_ctrl.base_freq = regk_ser_f29_493; |
272 | rec_ctrl.base_freq = regk_ser_f29_493; | 279 | rec_ctrl.base_freq = regk_ser_f29_493; |
273 | tr_baud.div = (29493000 / 8) / 4800; | 280 | tr_baud.div = (29493000 / 8) / 115200; |
274 | rec_baud.div = (29493000 / 8) / 115200; | 281 | rec_baud.div = (29493000 / 8) / 115200; |
275 | 282 | ||
276 | REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl); | 283 | REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl); |
@@ -280,25 +287,52 @@ serial_setup(reg_scope_instances regi_ser) | |||
280 | } | 287 | } |
281 | 288 | ||
282 | void | 289 | void |
283 | decompress_kernel() | 290 | decompress_kernel(void) |
284 | { | 291 | { |
285 | char revision; | 292 | char revision; |
286 | 293 | ||
287 | /* input_data is set in head.S */ | 294 | #if defined(CONFIG_ETRAX_DEBUG_PORT1) || \ |
288 | inbuf = input_data; | 295 | defined(CONFIG_ETRAX_DEBUG_PORT2) || \ |
296 | defined(CONFIG_ETRAX_DEBUG_PORT3) | ||
297 | reg_pinmux_rw_hwprot hwprot; | ||
298 | |||
299 | #ifdef CONFIG_CRIS_MACH_ARTPEC3 | ||
300 | reg_clkgen_rw_clk_ctrl clk_ctrl; | ||
301 | |||
302 | /* Enable corresponding clock region when serial 1..3 selected */ | ||
303 | |||
304 | clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl); | ||
305 | clk_ctrl.sser_ser_dma6_7 = regk_clkgen_yes; | ||
306 | REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl); | ||
307 | #endif | ||
308 | |||
309 | /* pinmux setup for ports 1..3 */ | ||
310 | hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot); | ||
311 | #endif | ||
289 | 312 | ||
290 | #ifdef CONFIG_ETRAX_DEBUG_PORT0 | 313 | #ifdef CONFIG_ETRAX_DEBUG_PORT0 |
291 | serial_setup(regi_ser0); | 314 | serial_setup(regi_ser0); |
292 | #endif | 315 | #endif |
293 | #ifdef CONFIG_ETRAX_DEBUG_PORT1 | 316 | #ifdef CONFIG_ETRAX_DEBUG_PORT1 |
317 | hwprot.ser1 = regk_pinmux_yes; | ||
294 | serial_setup(regi_ser1); | 318 | serial_setup(regi_ser1); |
295 | #endif | 319 | #endif |
296 | #ifdef CONFIG_ETRAX_DEBUG_PORT2 | 320 | #ifdef CONFIG_ETRAX_DEBUG_PORT2 |
321 | hwprot.ser2 = regk_pinmux_yes; | ||
297 | serial_setup(regi_ser2); | 322 | serial_setup(regi_ser2); |
298 | #endif | 323 | #endif |
299 | #ifdef CONFIG_ETRAX_DEBUG_PORT3 | 324 | #ifdef CONFIG_ETRAX_DEBUG_PORT3 |
325 | hwprot.ser3 = regk_pinmux_yes; | ||
300 | serial_setup(regi_ser3); | 326 | serial_setup(regi_ser3); |
301 | #endif | 327 | #endif |
328 | #if defined(CONFIG_ETRAX_DEBUG_PORT1) || \ | ||
329 | defined(CONFIG_ETRAX_DEBUG_PORT2) || \ | ||
330 | defined(CONFIG_ETRAX_DEBUG_PORT3) | ||
331 | REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot); | ||
332 | #endif | ||
333 | |||
334 | /* input_data is set in head.S */ | ||
335 | inbuf = input_data; | ||
302 | 336 | ||
303 | setup_normal_output_buffer(); | 337 | setup_normal_output_buffer(); |
304 | 338 | ||
@@ -307,11 +341,11 @@ decompress_kernel() | |||
307 | __asm__ volatile ("move $vr,%0" : "=rm" (revision)); | 341 | __asm__ volatile ("move $vr,%0" : "=rm" (revision)); |
308 | if (revision < 32) | 342 | if (revision < 32) |
309 | { | 343 | { |
310 | puts("You need an ETRAX FS to run Linux 2.6/crisv32.\n"); | 344 | puts("You need an ETRAX FS to run Linux 2.6/crisv32.\r\n"); |
311 | while(1); | 345 | while(1); |
312 | } | 346 | } |
313 | 347 | ||
314 | puts("Uncompressing Linux...\n"); | 348 | puts("Uncompressing Linux...\r\n"); |
315 | gunzip(); | 349 | gunzip(); |
316 | puts("Done. Now booting the kernel.\n"); | 350 | puts("Done. Now booting the kernel.\r\n"); |
317 | } | 351 | } |