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-rw-r--r--arch/cris/arch-v10/mm/fault.c26
1 files changed, 2 insertions, 24 deletions
diff --git a/arch/cris/arch-v10/mm/fault.c b/arch/cris/arch-v10/mm/fault.c
index 6805cdb25a53..fe2615022b97 100644
--- a/arch/cris/arch-v10/mm/fault.c
+++ b/arch/cris/arch-v10/mm/fault.c
@@ -14,6 +14,7 @@
14#include <asm/uaccess.h> 14#include <asm/uaccess.h>
15#include <asm/pgtable.h> 15#include <asm/pgtable.h>
16#include <asm/arch/svinto.h> 16#include <asm/arch/svinto.h>
17#include <asm/mmu_context.h>
17 18
18/* debug of low-level TLB reload */ 19/* debug of low-level TLB reload */
19#undef DEBUG 20#undef DEBUG
@@ -24,8 +25,6 @@
24#define D(x) 25#define D(x)
25#endif 26#endif
26 27
27extern volatile pgd_t *current_pgd;
28
29extern const struct exception_table_entry 28extern const struct exception_table_entry
30 *search_exception_tables(unsigned long addr); 29 *search_exception_tables(unsigned long addr);
31 30
@@ -46,7 +45,7 @@ handle_mmu_bus_fault(struct pt_regs *regs)
46 int page_id; 45 int page_id;
47 int acc, inv; 46 int acc, inv;
48#endif 47#endif
49 pgd_t* pgd = (pgd_t*)current_pgd; 48 pgd_t* pgd = (pgd_t*)per_cpu(current_pgd, smp_processor_id());
50 pmd_t *pmd; 49 pmd_t *pmd;
51 pte_t pte; 50 pte_t pte;
52 int miss, we, writeac; 51 int miss, we, writeac;
@@ -94,24 +93,3 @@ handle_mmu_bus_fault(struct pt_regs *regs)
94 *R_TLB_LO = pte_val(pte); 93 *R_TLB_LO = pte_val(pte);
95 local_irq_restore(flags); 94 local_irq_restore(flags);
96} 95}
97
98/* Called from arch/cris/mm/fault.c to find fixup code. */
99int
100find_fixup_code(struct pt_regs *regs)
101{
102 const struct exception_table_entry *fixup;
103
104 if ((fixup = search_exception_tables(regs->irp)) != 0) {
105 /* Adjust the instruction pointer in the stackframe. */
106 regs->irp = fixup->fixup;
107
108 /*
109 * Don't return by restoring the CPU state, so switch
110 * frame-type.
111 */
112 regs->frametype = CRIS_FRAME_NORMAL;
113 return 1;
114 }
115
116 return 0;
117}