diff options
Diffstat (limited to 'arch/blackfin')
26 files changed, 998 insertions, 788 deletions
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index ba21e33b8b1f..368bc7fe167e 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig | |||
@@ -544,7 +544,7 @@ config EXCPT_IRQ_SYSC_L1 | |||
544 | default y | 544 | default y |
545 | help | 545 | help |
546 | If enabled, the entire ASM lowlevel exception and interrupt entry code | 546 | If enabled, the entire ASM lowlevel exception and interrupt entry code |
547 | (STORE/RESTORE CONTEXT) is linked into L1 instruction memory. | 547 | (STORE/RESTORE CONTEXT) is linked into L1 instruction memory. |
548 | (less latency) | 548 | (less latency) |
549 | 549 | ||
550 | config DO_IRQ_L1 | 550 | config DO_IRQ_L1 |
@@ -904,29 +904,38 @@ config ARCH_SUSPEND_POSSIBLE | |||
904 | depends on !SMP | 904 | depends on !SMP |
905 | 905 | ||
906 | choice | 906 | choice |
907 | prompt "Select PM Wakeup Event Source" | 907 | prompt "Default Power Saving Mode" |
908 | default PM_WAKEUP_GPIO_BY_SIC_IWR | ||
909 | depends on PM | 908 | depends on PM |
910 | help | 909 | default PM_BFIN_SLEEP_DEEPER |
911 | If you have a GPIO already configured as input with the corresponding PORTx_MASK | 910 | config PM_BFIN_SLEEP_DEEPER |
912 | bit set - "Specify Wakeup Event by SIC_IWR value" | 911 | bool "Sleep Deeper" |
912 | help | ||
913 | Sleep "Deeper" Mode (High Power Savings) - This mode reduces dynamic | ||
914 | power dissipation by disabling the clock to the processor core (CCLK). | ||
915 | Furthermore, Standby sets the internal power supply voltage (VDDINT) | ||
916 | to 0.85 V to provide the greatest power savings, while preserving the | ||
917 | processor state. | ||
918 | The PLL and system clock (SCLK) continue to operate at a very low | ||
919 | frequency of about 3.3 MHz. To preserve data integrity in the SDRAM, | ||
920 | the SDRAM is put into Self Refresh Mode. Typically an external event | ||
921 | such as GPIO interrupt or RTC activity wakes up the processor. | ||
922 | Various Peripherals such as UART, SPORT, PPI may not function as | ||
923 | normal during Sleep Deeper, due to the reduced SCLK frequency. | ||
924 | When in the sleep mode, system DMA access to L1 memory is not supported. | ||
925 | |||
926 | config PM_BFIN_SLEEP | ||
927 | bool "Sleep" | ||
928 | help | ||
929 | Sleep Mode (High Power Savings) - The sleep mode reduces power | ||
930 | dissipation by disabling the clock to the processor core (CCLK). | ||
931 | The PLL and system clock (SCLK), however, continue to operate in | ||
932 | this mode. Typically an external event or RTC activity will wake | ||
933 | up the processor. When in the sleep mode, | ||
934 | system DMA access to L1 memory is not supported. | ||
935 | endchoice | ||
913 | 936 | ||
914 | config PM_WAKEUP_GPIO_BY_SIC_IWR | ||
915 | bool "Specify Wakeup Event by SIC_IWR value" | ||
916 | config PM_WAKEUP_BY_GPIO | 937 | config PM_WAKEUP_BY_GPIO |
917 | bool "Cause Wakeup Event by GPIO" | 938 | bool "Cause Wakeup Event by GPIO" |
918 | config PM_WAKEUP_GPIO_API | ||
919 | bool "Configure Wakeup Event by PM GPIO API" | ||
920 | |||
921 | endchoice | ||
922 | |||
923 | config PM_WAKEUP_SIC_IWR | ||
924 | hex "Wakeup Events (SIC_IWR)" | ||
925 | depends on PM_WAKEUP_GPIO_BY_SIC_IWR | ||
926 | default 0x8 if (BF537 || BF536 || BF534) | ||
927 | default 0x80 if (BF533 || BF532 || BF531) | ||
928 | default 0x80 if (BF54x) | ||
929 | default 0x80 if (BF52x) | ||
930 | 939 | ||
931 | config PM_WAKEUP_GPIO_NUMBER | 940 | config PM_WAKEUP_GPIO_NUMBER |
932 | int "Wakeup GPIO number" | 941 | int "Wakeup GPIO number" |
diff --git a/arch/blackfin/Kconfig.debug b/arch/blackfin/Kconfig.debug index 59b87a483c68..c61bdebb9974 100644 --- a/arch/blackfin/Kconfig.debug +++ b/arch/blackfin/Kconfig.debug | |||
@@ -164,7 +164,7 @@ config DUAL_CORE_TEST_MODULE | |||
164 | config CPLB_INFO | 164 | config CPLB_INFO |
165 | bool "Display the CPLB information" | 165 | bool "Display the CPLB information" |
166 | help | 166 | help |
167 | Display the CPLB information. | 167 | Display the CPLB information via /proc/cplbinfo. |
168 | 168 | ||
169 | config ACCESS_CHECK | 169 | config ACCESS_CHECK |
170 | bool "Check the user pointer address" | 170 | bool "Check the user pointer address" |
diff --git a/arch/blackfin/Makefile b/arch/blackfin/Makefile index 0edc402fef54..fe254f886a6e 100644 --- a/arch/blackfin/Makefile +++ b/arch/blackfin/Makefile | |||
@@ -119,6 +119,7 @@ archclean: | |||
119 | $(Q)$(MAKE) $(clean)=$(boot) | 119 | $(Q)$(MAKE) $(clean)=$(boot) |
120 | 120 | ||
121 | 121 | ||
122 | INSTALL_PATH ?= /tftpboot | ||
122 | boot := arch/$(ARCH)/boot | 123 | boot := arch/$(ARCH)/boot |
123 | BOOT_TARGETS = vmImage | 124 | BOOT_TARGETS = vmImage |
124 | PHONY += $(BOOT_TARGETS) install | 125 | PHONY += $(BOOT_TARGETS) install |
diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig index 9b7123cf27a3..198f4123af4b 100644 --- a/arch/blackfin/configs/BF533-STAMP_defconfig +++ b/arch/blackfin/configs/BF533-STAMP_defconfig | |||
@@ -216,8 +216,6 @@ CONFIG_MEM_SIZE=128 | |||
216 | CONFIG_MEM_ADD_WIDTH=11 | 216 | CONFIG_MEM_ADD_WIDTH=11 |
217 | CONFIG_ENET_FLASH_PIN=0 | 217 | CONFIG_ENET_FLASH_PIN=0 |
218 | CONFIG_BOOT_LOAD=0x1000 | 218 | CONFIG_BOOT_LOAD=0x1000 |
219 | |||
220 | |||
221 | CONFIG_BFIN_SCRATCH_REG_RETN=y | 219 | CONFIG_BFIN_SCRATCH_REG_RETN=y |
222 | # CONFIG_BFIN_SCRATCH_REG_RETE is not set | 220 | # CONFIG_BFIN_SCRATCH_REG_RETE is not set |
223 | # CONFIG_BFIN_SCRATCH_REG_CYCLES is not set | 221 | # CONFIG_BFIN_SCRATCH_REG_CYCLES is not set |
@@ -483,7 +481,7 @@ CONFIG_MTD=y | |||
483 | # CONFIG_MTD_CONCAT is not set | 481 | # CONFIG_MTD_CONCAT is not set |
484 | CONFIG_MTD_PARTITIONS=y | 482 | CONFIG_MTD_PARTITIONS=y |
485 | # CONFIG_MTD_REDBOOT_PARTS is not set | 483 | # CONFIG_MTD_REDBOOT_PARTS is not set |
486 | # CONFIG_MTD_CMDLINE_PARTS is not set | 484 | CONFIG_MTD_CMDLINE_PARTS=y |
487 | 485 | ||
488 | # | 486 | # |
489 | # User Modules And Translation Layers | 487 | # User Modules And Translation Layers |
@@ -500,8 +498,8 @@ CONFIG_MTD_BLOCK=y | |||
500 | # | 498 | # |
501 | # RAM/ROM/Flash chip drivers | 499 | # RAM/ROM/Flash chip drivers |
502 | # | 500 | # |
503 | # CONFIG_MTD_CFI is not set | 501 | CONFIG_MTD_CFI=m |
504 | CONFIG_MTD_JEDECPROBE=m | 502 | # CONFIG_MTD_JEDECPROBE is not set |
505 | CONFIG_MTD_GEN_PROBE=m | 503 | CONFIG_MTD_GEN_PROBE=m |
506 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | 504 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set |
507 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | 505 | CONFIG_MTD_MAP_BANK_WIDTH_1=y |
@@ -515,8 +513,9 @@ CONFIG_MTD_CFI_I2=y | |||
515 | # CONFIG_MTD_CFI_I4 is not set | 513 | # CONFIG_MTD_CFI_I4 is not set |
516 | # CONFIG_MTD_CFI_I8 is not set | 514 | # CONFIG_MTD_CFI_I8 is not set |
517 | # CONFIG_MTD_CFI_INTELEXT is not set | 515 | # CONFIG_MTD_CFI_INTELEXT is not set |
518 | # CONFIG_MTD_CFI_AMDSTD is not set | 516 | CONFIG_MTD_CFI_AMDSTD=m |
519 | # CONFIG_MTD_CFI_STAA is not set | 517 | # CONFIG_MTD_CFI_STAA is not set |
518 | CONFIG_MTD_CFI_UTIL=m | ||
520 | CONFIG_MTD_RAM=y | 519 | CONFIG_MTD_RAM=y |
521 | CONFIG_MTD_ROM=m | 520 | CONFIG_MTD_ROM=m |
522 | # CONFIG_MTD_ABSENT is not set | 521 | # CONFIG_MTD_ABSENT is not set |
@@ -526,6 +525,11 @@ CONFIG_MTD_ROM=m | |||
526 | # | 525 | # |
527 | CONFIG_MTD_COMPLEX_MAPPINGS=y | 526 | CONFIG_MTD_COMPLEX_MAPPINGS=y |
528 | # CONFIG_MTD_PHYSMAP is not set | 527 | # CONFIG_MTD_PHYSMAP is not set |
528 | CONFIG_MTD_BF5xx=m | ||
529 | CONFIG_BFIN_FLASH_BANK_0=0x7BB0 | ||
530 | CONFIG_BFIN_FLASH_BANK_1=0x7BB0 | ||
531 | CONFIG_BFIN_FLASH_BANK_2=0x7BB0 | ||
532 | CONFIG_BFIN_FLASH_BANK_3=0x7BB0 | ||
529 | # CONFIG_MTD_UCLINUX is not set | 533 | # CONFIG_MTD_UCLINUX is not set |
530 | # CONFIG_MTD_PLATRAM is not set | 534 | # CONFIG_MTD_PLATRAM is not set |
531 | 535 | ||
diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c index fa9debe8d5f4..5453bc3664fc 100644 --- a/arch/blackfin/kernel/bfin_dma_5xx.c +++ b/arch/blackfin/kernel/bfin_dma_5xx.c | |||
@@ -104,6 +104,16 @@ int request_dma(unsigned int channel, char *device_id) | |||
104 | 104 | ||
105 | mutex_unlock(&(dma_ch[channel].dmalock)); | 105 | mutex_unlock(&(dma_ch[channel].dmalock)); |
106 | 106 | ||
107 | #ifdef CONFIG_BF54x | ||
108 | if (channel >= CH_UART2_RX && channel <= CH_UART3_TX && | ||
109 | strncmp(device_id, "BFIN_UART", 9) == 0) | ||
110 | dma_ch[channel].regs->peripheral_map |= | ||
111 | (channel - CH_UART2_RX + 0xC); | ||
112 | else | ||
113 | dma_ch[channel].regs->peripheral_map |= | ||
114 | (channel - CH_UART2_RX + 0x6); | ||
115 | #endif | ||
116 | |||
107 | dma_ch[channel].device_id = device_id; | 117 | dma_ch[channel].device_id = device_id; |
108 | dma_ch[channel].irq_callback = NULL; | 118 | dma_ch[channel].irq_callback = NULL; |
109 | 119 | ||
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c index 6bbe0a2fccb8..08788f7bbfba 100644 --- a/arch/blackfin/kernel/bfin_gpio.c +++ b/arch/blackfin/kernel/bfin_gpio.c | |||
@@ -186,7 +186,7 @@ static struct str_ident { | |||
186 | char name[RESOURCE_LABEL_SIZE]; | 186 | char name[RESOURCE_LABEL_SIZE]; |
187 | } str_ident[MAX_RESOURCES]; | 187 | } str_ident[MAX_RESOURCES]; |
188 | 188 | ||
189 | #ifdef CONFIG_PM | 189 | #if defined(CONFIG_PM) && !defined(CONFIG_BF54x) |
190 | static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)]; | 190 | static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)]; |
191 | static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS]; | 191 | static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS]; |
192 | static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)]; | 192 | static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)]; |
@@ -696,9 +696,8 @@ static int bfin_gpio_wakeup_type(unsigned gpio, unsigned char type) | |||
696 | return 0; | 696 | return 0; |
697 | } | 697 | } |
698 | 698 | ||
699 | u32 gpio_pm_setup(void) | 699 | u32 bfin_pm_setup(void) |
700 | { | 700 | { |
701 | u32 sic_iwr = 0; | ||
702 | u16 bank, mask, i, gpio; | 701 | u16 bank, mask, i, gpio; |
703 | 702 | ||
704 | for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { | 703 | for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { |
@@ -723,7 +722,8 @@ u32 gpio_pm_setup(void) | |||
723 | gpio = i; | 722 | gpio = i; |
724 | 723 | ||
725 | while (mask) { | 724 | while (mask) { |
726 | if (mask & 1) { | 725 | if ((mask & 1) && (wakeup_flags_map[gpio] != |
726 | PM_WAKE_IGNORE)) { | ||
727 | reserved_gpio_map[gpio_bank(gpio)] |= | 727 | reserved_gpio_map[gpio_bank(gpio)] |= |
728 | gpio_bit(gpio); | 728 | gpio_bit(gpio); |
729 | bfin_gpio_wakeup_type(gpio, | 729 | bfin_gpio_wakeup_type(gpio, |
@@ -734,21 +734,17 @@ u32 gpio_pm_setup(void) | |||
734 | mask >>= 1; | 734 | mask >>= 1; |
735 | } | 735 | } |
736 | 736 | ||
737 | sic_iwr |= 1 << | 737 | bfin_internal_set_wake(sic_iwr_irqs[bank], 1); |
738 | (sic_iwr_irqs[bank] - (IRQ_CORETMR + 1)); | ||
739 | gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)]; | 738 | gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)]; |
740 | } | 739 | } |
741 | } | 740 | } |
742 | 741 | ||
743 | AWA_DUMMY_READ(maskb_set); | 742 | AWA_DUMMY_READ(maskb_set); |
744 | 743 | ||
745 | if (sic_iwr) | 744 | return 0; |
746 | return sic_iwr; | ||
747 | else | ||
748 | return IWR_ENABLE_ALL; | ||
749 | } | 745 | } |
750 | 746 | ||
751 | void gpio_pm_restore(void) | 747 | void bfin_pm_restore(void) |
752 | { | 748 | { |
753 | u16 bank, mask, i; | 749 | u16 bank, mask, i; |
754 | 750 | ||
@@ -768,7 +764,7 @@ void gpio_pm_restore(void) | |||
768 | 764 | ||
769 | reserved_gpio_map[bank] = | 765 | reserved_gpio_map[bank] = |
770 | gpio_bank_saved[bank].reserved; | 766 | gpio_bank_saved[bank].reserved; |
771 | 767 | bfin_internal_set_wake(sic_iwr_irqs[bank], 0); | |
772 | } | 768 | } |
773 | 769 | ||
774 | gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb; | 770 | gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb; |
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinit.c b/arch/blackfin/kernel/cplb-mpu/cplbinit.c index e2e2b5079f5b..dc6e8a7a8bda 100644 --- a/arch/blackfin/kernel/cplb-mpu/cplbinit.c +++ b/arch/blackfin/kernel/cplb-mpu/cplbinit.c | |||
@@ -26,6 +26,10 @@ | |||
26 | #include <asm/cplb.h> | 26 | #include <asm/cplb.h> |
27 | #include <asm/cplbinit.h> | 27 | #include <asm/cplbinit.h> |
28 | 28 | ||
29 | #if ANOMALY_05000263 | ||
30 | # error the MPU will not function safely while Anomaly 05000263 applies | ||
31 | #endif | ||
32 | |||
29 | struct cplb_entry icplb_tbl[MAX_CPLBS]; | 33 | struct cplb_entry icplb_tbl[MAX_CPLBS]; |
30 | struct cplb_entry dcplb_tbl[MAX_CPLBS]; | 34 | struct cplb_entry dcplb_tbl[MAX_CPLBS]; |
31 | 35 | ||
diff --git a/arch/blackfin/kernel/init_task.c b/arch/blackfin/kernel/init_task.c index 673c860ffc23..c640154030e2 100644 --- a/arch/blackfin/kernel/init_task.c +++ b/arch/blackfin/kernel/init_task.c | |||
@@ -57,5 +57,5 @@ EXPORT_SYMBOL(init_task); | |||
57 | * "init_task" linker map entry. | 57 | * "init_task" linker map entry. |
58 | */ | 58 | */ |
59 | union thread_union init_thread_union | 59 | union thread_union init_thread_union |
60 | __attribute__ ((__section__(".data.init_task"))) = { | 60 | __attribute__ ((__section__(".init_task.data"))) = { |
61 | INIT_THREAD_INFO(init_task)}; | 61 | INIT_THREAD_INFO(init_task)}; |
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c index 023dc80af187..6b8459c66163 100644 --- a/arch/blackfin/kernel/process.c +++ b/arch/blackfin/kernel/process.c | |||
@@ -31,7 +31,6 @@ | |||
31 | #include <linux/smp_lock.h> | 31 | #include <linux/smp_lock.h> |
32 | #include <linux/unistd.h> | 32 | #include <linux/unistd.h> |
33 | #include <linux/user.h> | 33 | #include <linux/user.h> |
34 | #include <linux/a.out.h> | ||
35 | #include <linux/uaccess.h> | 34 | #include <linux/uaccess.h> |
36 | #include <linux/fs.h> | 35 | #include <linux/fs.h> |
37 | #include <linux/err.h> | 36 | #include <linux/err.h> |
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index 6e106b3d7729..8229b1090eb9 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c | |||
@@ -1,30 +1,11 @@ | |||
1 | /* | 1 | /* |
2 | * File: arch/blackfin/kernel/setup.c | 2 | * arch/blackfin/kernel/setup.c |
3 | * Based on: | ||
4 | * Author: | ||
5 | * | 3 | * |
6 | * Created: | 4 | * Copyright 2004-2006 Analog Devices Inc. |
7 | * Description: | ||
8 | * | 5 | * |
9 | * Modified: | 6 | * Enter bugs at http://blackfin.uclinux.org/ |
10 | * Copyright 2004-2006 Analog Devices Inc. | ||
11 | * | 7 | * |
12 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 8 | * Licensed under the GPL-2 or later. |
13 | * | ||
14 | * This program is free software; you can redistribute it and/or modify | ||
15 | * it under the terms of the GNU General Public License as published by | ||
16 | * the Free Software Foundation; either version 2 of the License, or | ||
17 | * (at your option) any later version. | ||
18 | * | ||
19 | * This program is distributed in the hope that it will be useful, | ||
20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
22 | * GNU General Public License for more details. | ||
23 | * | ||
24 | * You should have received a copy of the GNU General Public License | ||
25 | * along with this program; if not, see the file COPYING, or write | ||
26 | * to the Free Software Foundation, Inc., | ||
27 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
28 | */ | 9 | */ |
29 | 10 | ||
30 | #include <linux/delay.h> | 11 | #include <linux/delay.h> |
@@ -34,6 +15,7 @@ | |||
34 | #include <linux/cpu.h> | 15 | #include <linux/cpu.h> |
35 | #include <linux/module.h> | 16 | #include <linux/module.h> |
36 | #include <linux/tty.h> | 17 | #include <linux/tty.h> |
18 | #include <linux/pfn.h> | ||
37 | 19 | ||
38 | #include <linux/ext2_fs.h> | 20 | #include <linux/ext2_fs.h> |
39 | #include <linux/cramfs_fs.h> | 21 | #include <linux/cramfs_fs.h> |
@@ -47,6 +29,8 @@ | |||
47 | #include <asm/fixed_code.h> | 29 | #include <asm/fixed_code.h> |
48 | #include <asm/early_printk.h> | 30 | #include <asm/early_printk.h> |
49 | 31 | ||
32 | static DEFINE_PER_CPU(struct cpu, cpu_devices); | ||
33 | |||
50 | u16 _bfin_swrst; | 34 | u16 _bfin_swrst; |
51 | 35 | ||
52 | unsigned long memory_start, memory_end, physical_mem_end; | 36 | unsigned long memory_start, memory_end, physical_mem_end; |
@@ -67,6 +51,29 @@ EXPORT_SYMBOL(mtd_size); | |||
67 | 51 | ||
68 | char __initdata command_line[COMMAND_LINE_SIZE]; | 52 | char __initdata command_line[COMMAND_LINE_SIZE]; |
69 | 53 | ||
54 | /* boot memmap, for parsing "memmap=" */ | ||
55 | #define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */ | ||
56 | #define BFIN_MEMMAP_RAM 1 | ||
57 | #define BFIN_MEMMAP_RESERVED 2 | ||
58 | struct bfin_memmap { | ||
59 | int nr_map; | ||
60 | struct bfin_memmap_entry { | ||
61 | unsigned long long addr; /* start of memory segment */ | ||
62 | unsigned long long size; | ||
63 | unsigned long type; | ||
64 | } map[BFIN_MEMMAP_MAX]; | ||
65 | } bfin_memmap __initdata; | ||
66 | |||
67 | /* for memmap sanitization */ | ||
68 | struct change_member { | ||
69 | struct bfin_memmap_entry *pentry; /* pointer to original entry */ | ||
70 | unsigned long long addr; /* address for this change point */ | ||
71 | }; | ||
72 | static struct change_member change_point_list[2*BFIN_MEMMAP_MAX] __initdata; | ||
73 | static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata; | ||
74 | static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata; | ||
75 | static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata; | ||
76 | |||
70 | void __init bf53x_cache_init(void) | 77 | void __init bf53x_cache_init(void) |
71 | { | 78 | { |
72 | #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE) | 79 | #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE) |
@@ -123,12 +130,224 @@ void __init bf53x_relocate_l1_mem(void) | |||
123 | 130 | ||
124 | } | 131 | } |
125 | 132 | ||
133 | /* add_memory_region to memmap */ | ||
134 | static void __init add_memory_region(unsigned long long start, | ||
135 | unsigned long long size, int type) | ||
136 | { | ||
137 | int i; | ||
138 | |||
139 | i = bfin_memmap.nr_map; | ||
140 | |||
141 | if (i == BFIN_MEMMAP_MAX) { | ||
142 | printk(KERN_ERR "Ooops! Too many entries in the memory map!\n"); | ||
143 | return; | ||
144 | } | ||
145 | |||
146 | bfin_memmap.map[i].addr = start; | ||
147 | bfin_memmap.map[i].size = size; | ||
148 | bfin_memmap.map[i].type = type; | ||
149 | bfin_memmap.nr_map++; | ||
150 | } | ||
151 | |||
152 | /* | ||
153 | * Sanitize the boot memmap, removing overlaps. | ||
154 | */ | ||
155 | static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map) | ||
156 | { | ||
157 | struct change_member *change_tmp; | ||
158 | unsigned long current_type, last_type; | ||
159 | unsigned long long last_addr; | ||
160 | int chgidx, still_changing; | ||
161 | int overlap_entries; | ||
162 | int new_entry; | ||
163 | int old_nr, new_nr, chg_nr; | ||
164 | int i; | ||
165 | |||
166 | /* | ||
167 | Visually we're performing the following (1,2,3,4 = memory types) | ||
168 | |||
169 | Sample memory map (w/overlaps): | ||
170 | ____22__________________ | ||
171 | ______________________4_ | ||
172 | ____1111________________ | ||
173 | _44_____________________ | ||
174 | 11111111________________ | ||
175 | ____________________33__ | ||
176 | ___________44___________ | ||
177 | __________33333_________ | ||
178 | ______________22________ | ||
179 | ___________________2222_ | ||
180 | _________111111111______ | ||
181 | _____________________11_ | ||
182 | _________________4______ | ||
183 | |||
184 | Sanitized equivalent (no overlap): | ||
185 | 1_______________________ | ||
186 | _44_____________________ | ||
187 | ___1____________________ | ||
188 | ____22__________________ | ||
189 | ______11________________ | ||
190 | _________1______________ | ||
191 | __________3_____________ | ||
192 | ___________44___________ | ||
193 | _____________33_________ | ||
194 | _______________2________ | ||
195 | ________________1_______ | ||
196 | _________________4______ | ||
197 | ___________________2____ | ||
198 | ____________________33__ | ||
199 | ______________________4_ | ||
200 | */ | ||
201 | /* if there's only one memory region, don't bother */ | ||
202 | if (*pnr_map < 2) | ||
203 | return -1; | ||
204 | |||
205 | old_nr = *pnr_map; | ||
206 | |||
207 | /* bail out if we find any unreasonable addresses in memmap */ | ||
208 | for (i = 0; i < old_nr; i++) | ||
209 | if (map[i].addr + map[i].size < map[i].addr) | ||
210 | return -1; | ||
211 | |||
212 | /* create pointers for initial change-point information (for sorting) */ | ||
213 | for (i = 0; i < 2*old_nr; i++) | ||
214 | change_point[i] = &change_point_list[i]; | ||
215 | |||
216 | /* record all known change-points (starting and ending addresses), | ||
217 | omitting those that are for empty memory regions */ | ||
218 | chgidx = 0; | ||
219 | for (i = 0; i < old_nr; i++) { | ||
220 | if (map[i].size != 0) { | ||
221 | change_point[chgidx]->addr = map[i].addr; | ||
222 | change_point[chgidx++]->pentry = &map[i]; | ||
223 | change_point[chgidx]->addr = map[i].addr + map[i].size; | ||
224 | change_point[chgidx++]->pentry = &map[i]; | ||
225 | } | ||
226 | } | ||
227 | chg_nr = chgidx; /* true number of change-points */ | ||
228 | |||
229 | /* sort change-point list by memory addresses (low -> high) */ | ||
230 | still_changing = 1; | ||
231 | while (still_changing) { | ||
232 | still_changing = 0; | ||
233 | for (i = 1; i < chg_nr; i++) { | ||
234 | /* if <current_addr> > <last_addr>, swap */ | ||
235 | /* or, if current=<start_addr> & last=<end_addr>, swap */ | ||
236 | if ((change_point[i]->addr < change_point[i-1]->addr) || | ||
237 | ((change_point[i]->addr == change_point[i-1]->addr) && | ||
238 | (change_point[i]->addr == change_point[i]->pentry->addr) && | ||
239 | (change_point[i-1]->addr != change_point[i-1]->pentry->addr)) | ||
240 | ) { | ||
241 | change_tmp = change_point[i]; | ||
242 | change_point[i] = change_point[i-1]; | ||
243 | change_point[i-1] = change_tmp; | ||
244 | still_changing = 1; | ||
245 | } | ||
246 | } | ||
247 | } | ||
248 | |||
249 | /* create a new memmap, removing overlaps */ | ||
250 | overlap_entries = 0; /* number of entries in the overlap table */ | ||
251 | new_entry = 0; /* index for creating new memmap entries */ | ||
252 | last_type = 0; /* start with undefined memory type */ | ||
253 | last_addr = 0; /* start with 0 as last starting address */ | ||
254 | /* loop through change-points, determining affect on the new memmap */ | ||
255 | for (chgidx = 0; chgidx < chg_nr; chgidx++) { | ||
256 | /* keep track of all overlapping memmap entries */ | ||
257 | if (change_point[chgidx]->addr == change_point[chgidx]->pentry->addr) { | ||
258 | /* add map entry to overlap list (> 1 entry implies an overlap) */ | ||
259 | overlap_list[overlap_entries++] = change_point[chgidx]->pentry; | ||
260 | } else { | ||
261 | /* remove entry from list (order independent, so swap with last) */ | ||
262 | for (i = 0; i < overlap_entries; i++) { | ||
263 | if (overlap_list[i] == change_point[chgidx]->pentry) | ||
264 | overlap_list[i] = overlap_list[overlap_entries-1]; | ||
265 | } | ||
266 | overlap_entries--; | ||
267 | } | ||
268 | /* if there are overlapping entries, decide which "type" to use */ | ||
269 | /* (larger value takes precedence -- 1=usable, 2,3,4,4+=unusable) */ | ||
270 | current_type = 0; | ||
271 | for (i = 0; i < overlap_entries; i++) | ||
272 | if (overlap_list[i]->type > current_type) | ||
273 | current_type = overlap_list[i]->type; | ||
274 | /* continue building up new memmap based on this information */ | ||
275 | if (current_type != last_type) { | ||
276 | if (last_type != 0) { | ||
277 | new_map[new_entry].size = | ||
278 | change_point[chgidx]->addr - last_addr; | ||
279 | /* move forward only if the new size was non-zero */ | ||
280 | if (new_map[new_entry].size != 0) | ||
281 | if (++new_entry >= BFIN_MEMMAP_MAX) | ||
282 | break; /* no more space left for new entries */ | ||
283 | } | ||
284 | if (current_type != 0) { | ||
285 | new_map[new_entry].addr = change_point[chgidx]->addr; | ||
286 | new_map[new_entry].type = current_type; | ||
287 | last_addr = change_point[chgidx]->addr; | ||
288 | } | ||
289 | last_type = current_type; | ||
290 | } | ||
291 | } | ||
292 | new_nr = new_entry; /* retain count for new entries */ | ||
293 | |||
294 | /* copy new mapping into original location */ | ||
295 | memcpy(map, new_map, new_nr*sizeof(struct bfin_memmap_entry)); | ||
296 | *pnr_map = new_nr; | ||
297 | |||
298 | return 0; | ||
299 | } | ||
300 | |||
301 | static void __init print_memory_map(char *who) | ||
302 | { | ||
303 | int i; | ||
304 | |||
305 | for (i = 0; i < bfin_memmap.nr_map; i++) { | ||
306 | printk(KERN_DEBUG " %s: %016Lx - %016Lx ", who, | ||
307 | bfin_memmap.map[i].addr, | ||
308 | bfin_memmap.map[i].addr + bfin_memmap.map[i].size); | ||
309 | switch (bfin_memmap.map[i].type) { | ||
310 | case BFIN_MEMMAP_RAM: | ||
311 | printk("(usable)\n"); | ||
312 | break; | ||
313 | case BFIN_MEMMAP_RESERVED: | ||
314 | printk("(reserved)\n"); | ||
315 | break; | ||
316 | default: printk("type %lu\n", bfin_memmap.map[i].type); | ||
317 | break; | ||
318 | } | ||
319 | } | ||
320 | } | ||
321 | |||
322 | static __init int parse_memmap(char *arg) | ||
323 | { | ||
324 | unsigned long long start_at, mem_size; | ||
325 | |||
326 | if (!arg) | ||
327 | return -EINVAL; | ||
328 | |||
329 | mem_size = memparse(arg, &arg); | ||
330 | if (*arg == '@') { | ||
331 | start_at = memparse(arg+1, &arg); | ||
332 | add_memory_region(start_at, mem_size, BFIN_MEMMAP_RAM); | ||
333 | } else if (*arg == '$') { | ||
334 | start_at = memparse(arg+1, &arg); | ||
335 | add_memory_region(start_at, mem_size, BFIN_MEMMAP_RESERVED); | ||
336 | } | ||
337 | |||
338 | return 0; | ||
339 | } | ||
340 | |||
126 | /* | 341 | /* |
127 | * Initial parsing of the command line. Currently, we support: | 342 | * Initial parsing of the command line. Currently, we support: |
128 | * - Controlling the linux memory size: mem=xxx[KMG] | 343 | * - Controlling the linux memory size: mem=xxx[KMG] |
129 | * - Controlling the physical memory size: max_mem=xxx[KMG][$][#] | 344 | * - Controlling the physical memory size: max_mem=xxx[KMG][$][#] |
130 | * $ -> reserved memory is dcacheable | 345 | * $ -> reserved memory is dcacheable |
131 | * # -> reserved memory is icacheable | 346 | * # -> reserved memory is icacheable |
347 | * - "memmap=XXX[KkmM][@][$]XXX[KkmM]" defines a memory region | ||
348 | * @ from <start> to <start>+<mem>, type RAM | ||
349 | * $ from <start> to <start>+<mem>, type RESERVED | ||
350 | * | ||
132 | */ | 351 | */ |
133 | static __init void parse_cmdline_early(char *cmdline_p) | 352 | static __init void parse_cmdline_early(char *cmdline_p) |
134 | { | 353 | { |
@@ -136,7 +355,6 @@ static __init void parse_cmdline_early(char *cmdline_p) | |||
136 | unsigned int memsize; | 355 | unsigned int memsize; |
137 | for (;;) { | 356 | for (;;) { |
138 | if (c == ' ') { | 357 | if (c == ' ') { |
139 | |||
140 | if (!memcmp(to, "mem=", 4)) { | 358 | if (!memcmp(to, "mem=", 4)) { |
141 | to += 4; | 359 | to += 4; |
142 | memsize = memparse(to, &to); | 360 | memsize = memparse(to, &to); |
@@ -162,6 +380,9 @@ static __init void parse_cmdline_early(char *cmdline_p) | |||
162 | } else if (!memcmp(to, "earlyprintk=", 12)) { | 380 | } else if (!memcmp(to, "earlyprintk=", 12)) { |
163 | to += 12; | 381 | to += 12; |
164 | setup_early_printk(to); | 382 | setup_early_printk(to); |
383 | } else if (!memcmp(to, "memmap=", 7)) { | ||
384 | to += 7; | ||
385 | parse_memmap(to); | ||
165 | } | 386 | } |
166 | } | 387 | } |
167 | c = *(to++); | 388 | c = *(to++); |
@@ -170,75 +391,36 @@ static __init void parse_cmdline_early(char *cmdline_p) | |||
170 | } | 391 | } |
171 | } | 392 | } |
172 | 393 | ||
173 | void __init setup_arch(char **cmdline_p) | 394 | /* |
395 | * Setup memory defaults from user config. | ||
396 | * The physical memory layout looks like: | ||
397 | * | ||
398 | * [_rambase, _ramstart]: kernel image | ||
399 | * [memory_start, memory_end]: dynamic memory managed by kernel | ||
400 | * [memory_end, _ramend]: reserved memory | ||
401 | * [meory_mtd_start(memory_end), | ||
402 | * memory_mtd_start + mtd_size]: rootfs (if any) | ||
403 | * [_ramend - DMA_UNCACHED_REGION, | ||
404 | * _ramend]: uncached DMA region | ||
405 | * [_ramend, physical_mem_end]: memory not managed by kernel | ||
406 | * | ||
407 | */ | ||
408 | static __init void memory_setup(void) | ||
174 | { | 409 | { |
175 | int bootmap_size; | ||
176 | unsigned long l1_length, sclk, cclk; | ||
177 | #ifdef CONFIG_MTD_UCLINUX | 410 | #ifdef CONFIG_MTD_UCLINUX |
178 | unsigned long mtd_phys = 0; | 411 | unsigned long mtd_phys = 0; |
179 | #endif | 412 | #endif |
180 | 413 | ||
181 | #ifdef CONFIG_DUMMY_CONSOLE | 414 | _rambase = (unsigned long)_stext; |
182 | conswitchp = &dummy_con; | 415 | _ramstart = (unsigned long)_end; |
183 | #endif | ||
184 | |||
185 | #if defined(CONFIG_CMDLINE_BOOL) | ||
186 | strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line)); | ||
187 | command_line[sizeof(command_line) - 1] = 0; | ||
188 | #endif | ||
189 | |||
190 | /* Keep a copy of command line */ | ||
191 | *cmdline_p = &command_line[0]; | ||
192 | memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE); | ||
193 | boot_command_line[COMMAND_LINE_SIZE - 1] = '\0'; | ||
194 | |||
195 | /* setup memory defaults from the user config */ | ||
196 | physical_mem_end = 0; | ||
197 | _ramend = CONFIG_MEM_SIZE * 1024 * 1024; | ||
198 | |||
199 | parse_cmdline_early(&command_line[0]); | ||
200 | |||
201 | cclk = get_cclk(); | ||
202 | sclk = get_sclk(); | ||
203 | |||
204 | #if !defined(CONFIG_BFIN_KERNEL_CLOCK) | ||
205 | if (ANOMALY_05000273 && cclk == sclk) | ||
206 | panic("ANOMALY 05000273, SCLK can not be same as CCLK"); | ||
207 | #endif | ||
208 | 416 | ||
209 | #ifdef BF561_FAMILY | 417 | if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) { |
210 | if (ANOMALY_05000266) { | 418 | console_init(); |
211 | bfin_read_IMDMA_D0_IRQ_STATUS(); | 419 | panic("DMA region exceeds memory limit: %lu.\n", |
212 | bfin_read_IMDMA_D1_IRQ_STATUS(); | 420 | _ramend - _ramstart); |
213 | } | 421 | } |
214 | #endif | ||
215 | |||
216 | printk(KERN_INFO "Hardware Trace "); | ||
217 | if (bfin_read_TBUFCTL() & 0x1 ) | ||
218 | printk("Active "); | ||
219 | else | ||
220 | printk("Off "); | ||
221 | if (bfin_read_TBUFCTL() & 0x2) | ||
222 | printk("and Enabled\n"); | ||
223 | else | ||
224 | printk("and Disabled\n"); | ||
225 | |||
226 | |||
227 | #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH) | ||
228 | /* we need to initialize the Flashrom device here since we might | ||
229 | * do things with flash early on in the boot | ||
230 | */ | ||
231 | flash_probe(); | ||
232 | #endif | ||
233 | |||
234 | if (physical_mem_end == 0) | ||
235 | physical_mem_end = _ramend; | ||
236 | |||
237 | /* by now the stack is part of the init task */ | ||
238 | memory_end = _ramend - DMA_UNCACHED_REGION; | 422 | memory_end = _ramend - DMA_UNCACHED_REGION; |
239 | 423 | ||
240 | _ramstart = (unsigned long)__bss_stop; | ||
241 | _rambase = (unsigned long)_stext; | ||
242 | #ifdef CONFIG_MPU | 424 | #ifdef CONFIG_MPU |
243 | /* Round up to multiple of 4MB. */ | 425 | /* Round up to multiple of 4MB. */ |
244 | memory_start = (_ramstart + 0x3fffff) & ~0x3fffff; | 426 | memory_start = (_ramstart + 0x3fffff) & ~0x3fffff; |
@@ -292,7 +474,7 @@ void __init setup_arch(char **cmdline_p) | |||
292 | } | 474 | } |
293 | 475 | ||
294 | /* Relocate MTD image to the top of memory after the uncached memory area */ | 476 | /* Relocate MTD image to the top of memory after the uncached memory area */ |
295 | dma_memcpy((char *)memory_end, __bss_stop, mtd_size); | 477 | dma_memcpy((char *)memory_end, _end, mtd_size); |
296 | 478 | ||
297 | memory_mtd_start = memory_end; | 479 | memory_mtd_start = memory_end; |
298 | _ebss = memory_mtd_start; /* define _ebss for compatible */ | 480 | _ebss = memory_mtd_start; /* define _ebss for compatible */ |
@@ -319,13 +501,175 @@ void __init setup_arch(char **cmdline_p) | |||
319 | #endif | 501 | #endif |
320 | 502 | ||
321 | #if !defined(CONFIG_MTD_UCLINUX) | 503 | #if !defined(CONFIG_MTD_UCLINUX) |
322 | memory_end -= SIZE_4K; /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/ | 504 | /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/ |
505 | memory_end -= SIZE_4K; | ||
323 | #endif | 506 | #endif |
507 | |||
324 | init_mm.start_code = (unsigned long)_stext; | 508 | init_mm.start_code = (unsigned long)_stext; |
325 | init_mm.end_code = (unsigned long)_etext; | 509 | init_mm.end_code = (unsigned long)_etext; |
326 | init_mm.end_data = (unsigned long)_edata; | 510 | init_mm.end_data = (unsigned long)_edata; |
327 | init_mm.brk = (unsigned long)0; | 511 | init_mm.brk = (unsigned long)0; |
328 | 512 | ||
513 | printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20); | ||
514 | printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20); | ||
515 | |||
516 | printk(KERN_INFO "Memory map:\n" | ||
517 | KERN_INFO " text = 0x%p-0x%p\n" | ||
518 | KERN_INFO " rodata = 0x%p-0x%p\n" | ||
519 | KERN_INFO " bss = 0x%p-0x%p\n" | ||
520 | KERN_INFO " data = 0x%p-0x%p\n" | ||
521 | KERN_INFO " stack = 0x%p-0x%p\n" | ||
522 | KERN_INFO " init = 0x%p-0x%p\n" | ||
523 | KERN_INFO " available = 0x%p-0x%p\n" | ||
524 | #ifdef CONFIG_MTD_UCLINUX | ||
525 | KERN_INFO " rootfs = 0x%p-0x%p\n" | ||
526 | #endif | ||
527 | #if DMA_UNCACHED_REGION > 0 | ||
528 | KERN_INFO " DMA Zone = 0x%p-0x%p\n" | ||
529 | #endif | ||
530 | , _stext, _etext, | ||
531 | __start_rodata, __end_rodata, | ||
532 | __bss_start, __bss_stop, | ||
533 | _sdata, _edata, | ||
534 | (void *)&init_thread_union, | ||
535 | (void *)((int)(&init_thread_union) + 0x2000), | ||
536 | __init_begin, __init_end, | ||
537 | (void *)_ramstart, (void *)memory_end | ||
538 | #ifdef CONFIG_MTD_UCLINUX | ||
539 | , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size) | ||
540 | #endif | ||
541 | #if DMA_UNCACHED_REGION > 0 | ||
542 | , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend) | ||
543 | #endif | ||
544 | ); | ||
545 | } | ||
546 | |||
547 | static __init void setup_bootmem_allocator(void) | ||
548 | { | ||
549 | int bootmap_size; | ||
550 | int i; | ||
551 | unsigned long min_pfn, max_pfn; | ||
552 | unsigned long curr_pfn, last_pfn, size; | ||
553 | |||
554 | /* mark memory between memory_start and memory_end usable */ | ||
555 | add_memory_region(memory_start, | ||
556 | memory_end - memory_start, BFIN_MEMMAP_RAM); | ||
557 | /* sanity check for overlap */ | ||
558 | sanitize_memmap(bfin_memmap.map, &bfin_memmap.nr_map); | ||
559 | print_memory_map("boot memmap"); | ||
560 | |||
561 | min_pfn = PAGE_OFFSET >> PAGE_SHIFT; | ||
562 | max_pfn = memory_end >> PAGE_SHIFT; | ||
563 | |||
564 | /* | ||
565 | * give all the memory to the bootmap allocator, tell it to put the | ||
566 | * boot mem_map at the start of memory. | ||
567 | */ | ||
568 | bootmap_size = init_bootmem_node(NODE_DATA(0), | ||
569 | memory_start >> PAGE_SHIFT, /* map goes here */ | ||
570 | min_pfn, max_pfn); | ||
571 | |||
572 | /* register the memmap regions with the bootmem allocator */ | ||
573 | for (i = 0; i < bfin_memmap.nr_map; i++) { | ||
574 | /* | ||
575 | * Reserve usable memory | ||
576 | */ | ||
577 | if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM) | ||
578 | continue; | ||
579 | /* | ||
580 | * We are rounding up the start address of usable memory: | ||
581 | */ | ||
582 | curr_pfn = PFN_UP(bfin_memmap.map[i].addr); | ||
583 | if (curr_pfn >= max_pfn) | ||
584 | continue; | ||
585 | /* | ||
586 | * ... and at the end of the usable range downwards: | ||
587 | */ | ||
588 | last_pfn = PFN_DOWN(bfin_memmap.map[i].addr + | ||
589 | bfin_memmap.map[i].size); | ||
590 | |||
591 | if (last_pfn > max_pfn) | ||
592 | last_pfn = max_pfn; | ||
593 | |||
594 | /* | ||
595 | * .. finally, did all the rounding and playing | ||
596 | * around just make the area go away? | ||
597 | */ | ||
598 | if (last_pfn <= curr_pfn) | ||
599 | continue; | ||
600 | |||
601 | size = last_pfn - curr_pfn; | ||
602 | free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size)); | ||
603 | } | ||
604 | |||
605 | /* reserve memory before memory_start, including bootmap */ | ||
606 | reserve_bootmem(PAGE_OFFSET, | ||
607 | memory_start + bootmap_size + PAGE_SIZE - 1 - PAGE_OFFSET, | ||
608 | BOOTMEM_DEFAULT); | ||
609 | } | ||
610 | |||
611 | void __init setup_arch(char **cmdline_p) | ||
612 | { | ||
613 | unsigned long l1_length, sclk, cclk; | ||
614 | |||
615 | #ifdef CONFIG_DUMMY_CONSOLE | ||
616 | conswitchp = &dummy_con; | ||
617 | #endif | ||
618 | |||
619 | #if defined(CONFIG_CMDLINE_BOOL) | ||
620 | strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line)); | ||
621 | command_line[sizeof(command_line) - 1] = 0; | ||
622 | #endif | ||
623 | |||
624 | /* Keep a copy of command line */ | ||
625 | *cmdline_p = &command_line[0]; | ||
626 | memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE); | ||
627 | boot_command_line[COMMAND_LINE_SIZE - 1] = '\0'; | ||
628 | |||
629 | /* setup memory defaults from the user config */ | ||
630 | physical_mem_end = 0; | ||
631 | _ramend = CONFIG_MEM_SIZE * 1024 * 1024; | ||
632 | |||
633 | memset(&bfin_memmap, 0, sizeof(bfin_memmap)); | ||
634 | |||
635 | parse_cmdline_early(&command_line[0]); | ||
636 | |||
637 | if (physical_mem_end == 0) | ||
638 | physical_mem_end = _ramend; | ||
639 | |||
640 | memory_setup(); | ||
641 | |||
642 | cclk = get_cclk(); | ||
643 | sclk = get_sclk(); | ||
644 | |||
645 | #if !defined(CONFIG_BFIN_KERNEL_CLOCK) | ||
646 | if (ANOMALY_05000273 && cclk == sclk) | ||
647 | panic("ANOMALY 05000273, SCLK can not be same as CCLK"); | ||
648 | #endif | ||
649 | |||
650 | #ifdef BF561_FAMILY | ||
651 | if (ANOMALY_05000266) { | ||
652 | bfin_read_IMDMA_D0_IRQ_STATUS(); | ||
653 | bfin_read_IMDMA_D1_IRQ_STATUS(); | ||
654 | } | ||
655 | #endif | ||
656 | printk(KERN_INFO "Hardware Trace "); | ||
657 | if (bfin_read_TBUFCTL() & 0x1) | ||
658 | printk("Active "); | ||
659 | else | ||
660 | printk("Off "); | ||
661 | if (bfin_read_TBUFCTL() & 0x2) | ||
662 | printk("and Enabled\n"); | ||
663 | else | ||
664 | printk("and Disabled\n"); | ||
665 | |||
666 | #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH) | ||
667 | /* we need to initialize the Flashrom device here since we might | ||
668 | * do things with flash early on in the boot | ||
669 | */ | ||
670 | flash_probe(); | ||
671 | #endif | ||
672 | |||
329 | _bfin_swrst = bfin_read_SWRST(); | 673 | _bfin_swrst = bfin_read_SWRST(); |
330 | 674 | ||
331 | if (_bfin_swrst & RESET_DOUBLE) | 675 | if (_bfin_swrst & RESET_DOUBLE) |
@@ -335,7 +679,7 @@ void __init setup_arch(char **cmdline_p) | |||
335 | else if (_bfin_swrst & RESET_SOFTWARE) | 679 | else if (_bfin_swrst & RESET_SOFTWARE) |
336 | printk(KERN_NOTICE "Reset caused by Software reset\n"); | 680 | printk(KERN_NOTICE "Reset caused by Software reset\n"); |
337 | 681 | ||
338 | printk(KERN_INFO "Blackfin support (C) 2004-2007 Analog Devices, Inc.\n"); | 682 | printk(KERN_INFO "Blackfin support (C) 2004-2008 Analog Devices, Inc.\n"); |
339 | if (bfin_compiled_revid() == 0xffff) | 683 | if (bfin_compiled_revid() == 0xffff) |
340 | printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU); | 684 | printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU); |
341 | else if (bfin_compiled_revid() == -1) | 685 | else if (bfin_compiled_revid() == -1) |
@@ -361,55 +705,8 @@ void __init setup_arch(char **cmdline_p) | |||
361 | if (ANOMALY_05000273 && (cclk >> 1) <= sclk) | 705 | if (ANOMALY_05000273 && (cclk >> 1) <= sclk) |
362 | printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n"); | 706 | printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n"); |
363 | 707 | ||
364 | printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20); | 708 | setup_bootmem_allocator(); |
365 | printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20); | ||
366 | |||
367 | printk(KERN_INFO "Memory map:\n" | ||
368 | KERN_INFO " text = 0x%p-0x%p\n" | ||
369 | KERN_INFO " rodata = 0x%p-0x%p\n" | ||
370 | KERN_INFO " data = 0x%p-0x%p\n" | ||
371 | KERN_INFO " stack = 0x%p-0x%p\n" | ||
372 | KERN_INFO " init = 0x%p-0x%p\n" | ||
373 | KERN_INFO " bss = 0x%p-0x%p\n" | ||
374 | KERN_INFO " available = 0x%p-0x%p\n" | ||
375 | #ifdef CONFIG_MTD_UCLINUX | ||
376 | KERN_INFO " rootfs = 0x%p-0x%p\n" | ||
377 | #endif | ||
378 | #if DMA_UNCACHED_REGION > 0 | ||
379 | KERN_INFO " DMA Zone = 0x%p-0x%p\n" | ||
380 | #endif | ||
381 | , _stext, _etext, | ||
382 | __start_rodata, __end_rodata, | ||
383 | _sdata, _edata, | ||
384 | (void *)&init_thread_union, (void *)((int)(&init_thread_union) + 0x2000), | ||
385 | __init_begin, __init_end, | ||
386 | __bss_start, __bss_stop, | ||
387 | (void *)_ramstart, (void *)memory_end | ||
388 | #ifdef CONFIG_MTD_UCLINUX | ||
389 | , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size) | ||
390 | #endif | ||
391 | #if DMA_UNCACHED_REGION > 0 | ||
392 | , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend) | ||
393 | #endif | ||
394 | ); | ||
395 | 709 | ||
396 | /* | ||
397 | * give all the memory to the bootmap allocator, tell it to put the | ||
398 | * boot mem_map at the start of memory | ||
399 | */ | ||
400 | bootmap_size = init_bootmem_node(NODE_DATA(0), memory_start >> PAGE_SHIFT, /* map goes here */ | ||
401 | PAGE_OFFSET >> PAGE_SHIFT, | ||
402 | memory_end >> PAGE_SHIFT); | ||
403 | /* | ||
404 | * free the usable memory, we have to make sure we do not free | ||
405 | * the bootmem bitmap so we then reserve it after freeing it :-) | ||
406 | */ | ||
407 | free_bootmem(memory_start, memory_end - memory_start); | ||
408 | |||
409 | reserve_bootmem(memory_start, bootmap_size, BOOTMEM_DEFAULT); | ||
410 | /* | ||
411 | * get kmalloc into gear | ||
412 | */ | ||
413 | paging_init(); | 710 | paging_init(); |
414 | 711 | ||
415 | /* check the size of the l1 area */ | 712 | /* check the size of the l1 area */ |
@@ -450,15 +747,15 @@ void __init setup_arch(char **cmdline_p) | |||
450 | 747 | ||
451 | static int __init topology_init(void) | 748 | static int __init topology_init(void) |
452 | { | 749 | { |
453 | #if defined (CONFIG_BF561) | 750 | int cpu; |
454 | static struct cpu cpu[2]; | 751 | |
455 | register_cpu(&cpu[0], 0); | 752 | for_each_possible_cpu(cpu) { |
456 | register_cpu(&cpu[1], 1); | 753 | struct cpu *c = &per_cpu(cpu_devices, cpu); |
754 | |||
755 | register_cpu(c, cpu); | ||
756 | } | ||
757 | |||
457 | return 0; | 758 | return 0; |
458 | #else | ||
459 | static struct cpu cpu[1]; | ||
460 | return register_cpu(cpu, 0); | ||
461 | #endif | ||
462 | } | 759 | } |
463 | 760 | ||
464 | subsys_initcall(topology_init); | 761 | subsys_initcall(topology_init); |
@@ -700,7 +997,7 @@ static void c_stop(struct seq_file *m, void *v) | |||
700 | { | 997 | { |
701 | } | 998 | } |
702 | 999 | ||
703 | struct seq_operations cpuinfo_op = { | 1000 | const struct seq_operations cpuinfo_op = { |
704 | .start = c_start, | 1001 | .start = c_start, |
705 | .next = c_next, | 1002 | .next = c_next, |
706 | .stop = c_stop, | 1003 | .stop = c_stop, |
diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c index 66b5f3e3ae2a..58717cb19707 100644 --- a/arch/blackfin/kernel/traps.c +++ b/arch/blackfin/kernel/traps.c | |||
@@ -649,7 +649,7 @@ void dump_bfin_process(struct pt_regs *fp) | |||
649 | if (context & 0x0020 && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR) | 649 | if (context & 0x0020 && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR) |
650 | printk(KERN_NOTICE "HW Error context\n"); | 650 | printk(KERN_NOTICE "HW Error context\n"); |
651 | else if (context & 0x0020) | 651 | else if (context & 0x0020) |
652 | printk(KERN_NOTICE "Defered Exception context\n"); | 652 | printk(KERN_NOTICE "Deferred Exception context\n"); |
653 | else if (context & 0x3FC0) | 653 | else if (context & 0x3FC0) |
654 | printk(KERN_NOTICE "Interrupt context\n"); | 654 | printk(KERN_NOTICE "Interrupt context\n"); |
655 | else if (context & 0x4000) | 655 | else if (context & 0x4000) |
diff --git a/arch/blackfin/kernel/vmlinux.lds.S b/arch/blackfin/kernel/vmlinux.lds.S index 858722421b40..aed832540b3b 100644 --- a/arch/blackfin/kernel/vmlinux.lds.S +++ b/arch/blackfin/kernel/vmlinux.lds.S | |||
@@ -41,6 +41,9 @@ _jiffies = _jiffies_64; | |||
41 | SECTIONS | 41 | SECTIONS |
42 | { | 42 | { |
43 | . = CONFIG_BOOT_LOAD; | 43 | . = CONFIG_BOOT_LOAD; |
44 | /* Neither the text, ro_data or bss section need to be aligned | ||
45 | * So pack them back to back | ||
46 | */ | ||
44 | .text : | 47 | .text : |
45 | { | 48 | { |
46 | __text = .; | 49 | __text = .; |
@@ -58,22 +61,25 @@ SECTIONS | |||
58 | *(__ex_table) | 61 | *(__ex_table) |
59 | ___stop___ex_table = .; | 62 | ___stop___ex_table = .; |
60 | 63 | ||
61 | . = ALIGN(4); | ||
62 | __etext = .; | 64 | __etext = .; |
63 | } | 65 | } |
64 | 66 | ||
65 | RO_DATA(PAGE_SIZE) | 67 | /* Just in case the first read only is a 32-bit access */ |
68 | RO_DATA(4) | ||
69 | |||
70 | .bss : | ||
71 | { | ||
72 | . = ALIGN(4); | ||
73 | ___bss_start = .; | ||
74 | *(.bss .bss.*) | ||
75 | *(COMMON) | ||
76 | ___bss_stop = .; | ||
77 | } | ||
66 | 78 | ||
67 | .data : | 79 | .data : |
68 | { | 80 | { |
69 | /* make sure the init_task is aligned to the | ||
70 | * kernel thread size so we can locate the kernel | ||
71 | * stack properly and quickly. | ||
72 | */ | ||
73 | __sdata = .; | 81 | __sdata = .; |
74 | . = ALIGN(THREAD_SIZE); | 82 | /* This gets done first, so the glob doesn't suck it in */ |
75 | *(.data.init_task) | ||
76 | |||
77 | . = ALIGN(32); | 83 | . = ALIGN(32); |
78 | *(.data.cacheline_aligned) | 84 | *(.data.cacheline_aligned) |
79 | 85 | ||
@@ -81,10 +87,22 @@ SECTIONS | |||
81 | *(.data.*) | 87 | *(.data.*) |
82 | CONSTRUCTORS | 88 | CONSTRUCTORS |
83 | 89 | ||
90 | /* make sure the init_task is aligned to the | ||
91 | * kernel thread size so we can locate the kernel | ||
92 | * stack properly and quickly. | ||
93 | */ | ||
84 | . = ALIGN(THREAD_SIZE); | 94 | . = ALIGN(THREAD_SIZE); |
95 | *(.init_task.data) | ||
96 | |||
85 | __edata = .; | 97 | __edata = .; |
86 | } | 98 | } |
87 | 99 | ||
100 | /* The init section should be last, so when we free it, it goes into | ||
101 | * the general memory pool, and (hopefully) will decrease fragmentation | ||
102 | * a tiny bit. The init section has a _requirement_ that it be | ||
103 | * PAGE_SIZE aligned | ||
104 | */ | ||
105 | . = ALIGN(PAGE_SIZE); | ||
88 | ___init_begin = .; | 106 | ___init_begin = .; |
89 | 107 | ||
90 | .init.text : | 108 | .init.text : |
@@ -179,16 +197,7 @@ SECTIONS | |||
179 | . = ALIGN(PAGE_SIZE); | 197 | . = ALIGN(PAGE_SIZE); |
180 | ___init_end = .; | 198 | ___init_end = .; |
181 | 199 | ||
182 | .bss : | 200 | __end =.; |
183 | { | ||
184 | . = ALIGN(4); | ||
185 | ___bss_start = .; | ||
186 | *(.bss .bss.*) | ||
187 | *(COMMON) | ||
188 | . = ALIGN(4); | ||
189 | ___bss_stop = .; | ||
190 | __end = .; | ||
191 | } | ||
192 | 201 | ||
193 | STABS_DEBUG | 202 | STABS_DEBUG |
194 | 203 | ||
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c index 1795aab79064..337515fba612 100644 --- a/arch/blackfin/mach-bf527/boards/ezkit.c +++ b/arch/blackfin/mach-bf527/boards/ezkit.c | |||
@@ -41,7 +41,9 @@ | |||
41 | #include <linux/irq.h> | 41 | #include <linux/irq.h> |
42 | #include <linux/interrupt.h> | 42 | #include <linux/interrupt.h> |
43 | #include <linux/usb/sl811.h> | 43 | #include <linux/usb/sl811.h> |
44 | #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) | ||
44 | #include <linux/usb/musb.h> | 45 | #include <linux/usb/musb.h> |
46 | #endif | ||
45 | #include <asm/cplb.h> | 47 | #include <asm/cplb.h> |
46 | #include <asm/dma.h> | 48 | #include <asm/dma.h> |
47 | #include <asm/bfin5xx_spi.h> | 49 | #include <asm/bfin5xx_spi.h> |
@@ -517,6 +519,14 @@ static struct bfin5xx_spi_chip spi_wm8731_chip_info = { | |||
517 | .bits_per_word = 16, | 519 | .bits_per_word = 16, |
518 | }; | 520 | }; |
519 | #endif | 521 | #endif |
522 | |||
523 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
524 | static struct bfin5xx_spi_chip spidev_chip_info = { | ||
525 | .enable_dma = 0, | ||
526 | .bits_per_word = 8, | ||
527 | }; | ||
528 | #endif | ||
529 | |||
520 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | 530 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
521 | #if defined(CONFIG_MTD_M25P80) \ | 531 | #if defined(CONFIG_MTD_M25P80) \ |
522 | || defined(CONFIG_MTD_M25P80_MODULE) | 532 | || defined(CONFIG_MTD_M25P80_MODULE) |
@@ -634,6 +644,15 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
634 | .mode = SPI_MODE_0, | 644 | .mode = SPI_MODE_0, |
635 | }, | 645 | }, |
636 | #endif | 646 | #endif |
647 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
648 | { | ||
649 | .modalias = "spidev", | ||
650 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | ||
651 | .bus_num = 0, | ||
652 | .chip_select = 1, | ||
653 | .controller_data = &spidev_chip_info, | ||
654 | }, | ||
655 | #endif | ||
637 | }; | 656 | }; |
638 | 657 | ||
639 | /* SPI controller data */ | 658 | /* SPI controller data */ |
diff --git a/arch/blackfin/mach-bf533/boards/ezkit.c b/arch/blackfin/mach-bf533/boards/ezkit.c index 4026c2f3ab4e..2b09aa39f565 100644 --- a/arch/blackfin/mach-bf533/boards/ezkit.c +++ b/arch/blackfin/mach-bf533/boards/ezkit.c | |||
@@ -34,7 +34,9 @@ | |||
34 | #include <linux/mtd/partitions.h> | 34 | #include <linux/mtd/partitions.h> |
35 | #include <linux/spi/spi.h> | 35 | #include <linux/spi/spi.h> |
36 | #include <linux/spi/flash.h> | 36 | #include <linux/spi/flash.h> |
37 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | ||
37 | #include <linux/usb/isp1362.h> | 38 | #include <linux/usb/isp1362.h> |
39 | #endif | ||
38 | #include <linux/ata_platform.h> | 40 | #include <linux/ata_platform.h> |
39 | #include <linux/irq.h> | 41 | #include <linux/irq.h> |
40 | #include <asm/dma.h> | 42 | #include <asm/dma.h> |
@@ -134,6 +136,13 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |||
134 | }; | 136 | }; |
135 | #endif | 137 | #endif |
136 | 138 | ||
139 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
140 | static struct bfin5xx_spi_chip spidev_chip_info = { | ||
141 | .enable_dma = 0, | ||
142 | .bits_per_word = 8, | ||
143 | }; | ||
144 | #endif | ||
145 | |||
137 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | 146 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
138 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) | 147 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) |
139 | { | 148 | { |
@@ -168,6 +177,15 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
168 | .controller_data = &ad1836_spi_chip_info, | 177 | .controller_data = &ad1836_spi_chip_info, |
169 | }, | 178 | }, |
170 | #endif | 179 | #endif |
180 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
181 | { | ||
182 | .modalias = "spidev", | ||
183 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | ||
184 | .bus_num = 0, | ||
185 | .chip_select = 1, | ||
186 | .controller_data = &spidev_chip_info, | ||
187 | }, | ||
188 | #endif | ||
171 | }; | 189 | }; |
172 | 190 | ||
173 | /* SPI (0) */ | 191 | /* SPI (0) */ |
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c index 0185350feacc..a645f6fd091b 100644 --- a/arch/blackfin/mach-bf533/boards/stamp.c +++ b/arch/blackfin/mach-bf533/boards/stamp.c | |||
@@ -226,6 +226,13 @@ static struct bfin5xx_spi_chip spi_mmc_chip_info = { | |||
226 | }; | 226 | }; |
227 | #endif | 227 | #endif |
228 | 228 | ||
229 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
230 | static struct bfin5xx_spi_chip spidev_chip_info = { | ||
231 | .enable_dma = 0, | ||
232 | .bits_per_word = 8, | ||
233 | }; | ||
234 | #endif | ||
235 | |||
229 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | 236 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
230 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) | 237 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) |
231 | { | 238 | { |
@@ -312,6 +319,15 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
312 | .mode = SPI_MODE_2, | 319 | .mode = SPI_MODE_2, |
313 | }, | 320 | }, |
314 | #endif | 321 | #endif |
322 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
323 | { | ||
324 | .modalias = "spidev", | ||
325 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | ||
326 | .bus_num = 0, | ||
327 | .chip_select = 1, | ||
328 | .controller_data = &spidev_chip_info, | ||
329 | }, | ||
330 | #endif | ||
315 | }; | 331 | }; |
316 | 332 | ||
317 | /* SPI (0) */ | 333 | /* SPI (0) */ |
@@ -423,9 +439,9 @@ static struct platform_device bfin_pata_device = { | |||
423 | #include <linux/gpio_keys.h> | 439 | #include <linux/gpio_keys.h> |
424 | 440 | ||
425 | static struct gpio_keys_button bfin_gpio_keys_table[] = { | 441 | static struct gpio_keys_button bfin_gpio_keys_table[] = { |
426 | {BTN_0, GPIO_PF5, 1, "gpio-keys: BTN0"}, | 442 | {BTN_0, GPIO_PF5, 0, "gpio-keys: BTN0"}, |
427 | {BTN_1, GPIO_PF6, 1, "gpio-keys: BTN1"}, | 443 | {BTN_1, GPIO_PF6, 0, "gpio-keys: BTN1"}, |
428 | {BTN_2, GPIO_PF8, 1, "gpio-keys: BTN2"}, | 444 | {BTN_2, GPIO_PF8, 0, "gpio-keys: BTN2"}, |
429 | }; | 445 | }; |
430 | 446 | ||
431 | static struct gpio_keys_platform_data bfin_gpio_keys_data = { | 447 | static struct gpio_keys_platform_data bfin_gpio_keys_data = { |
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c index 119e6ea83384..9e2277e0d25c 100644 --- a/arch/blackfin/mach-bf537/boards/stamp.c +++ b/arch/blackfin/mach-bf537/boards/stamp.c | |||
@@ -487,6 +487,13 @@ static const struct ad7877_platform_data bfin_ad7877_ts_info = { | |||
487 | }; | 487 | }; |
488 | #endif | 488 | #endif |
489 | 489 | ||
490 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
491 | static struct bfin5xx_spi_chip spidev_chip_info = { | ||
492 | .enable_dma = 0, | ||
493 | .bits_per_word = 8, | ||
494 | }; | ||
495 | #endif | ||
496 | |||
490 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | 497 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
491 | #if defined(CONFIG_MTD_M25P80) \ | 498 | #if defined(CONFIG_MTD_M25P80) \ |
492 | || defined(CONFIG_MTD_M25P80_MODULE) | 499 | || defined(CONFIG_MTD_M25P80_MODULE) |
@@ -593,6 +600,15 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
593 | .controller_data = &spi_ad7877_chip_info, | 600 | .controller_data = &spi_ad7877_chip_info, |
594 | }, | 601 | }, |
595 | #endif | 602 | #endif |
603 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
604 | { | ||
605 | .modalias = "spidev", | ||
606 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | ||
607 | .bus_num = 0, | ||
608 | .chip_select = 1, | ||
609 | .controller_data = &spidev_chip_info, | ||
610 | }, | ||
611 | #endif | ||
596 | }; | 612 | }; |
597 | 613 | ||
598 | /* SPI controller data */ | 614 | /* SPI controller data */ |
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c index 14860f04d1bd..916e963e83ba 100644 --- a/arch/blackfin/mach-bf548/boards/ezkit.c +++ b/arch/blackfin/mach-bf548/boards/ezkit.c | |||
@@ -37,7 +37,9 @@ | |||
37 | #include <linux/spi/flash.h> | 37 | #include <linux/spi/flash.h> |
38 | #include <linux/irq.h> | 38 | #include <linux/irq.h> |
39 | #include <linux/interrupt.h> | 39 | #include <linux/interrupt.h> |
40 | #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) | ||
40 | #include <linux/usb/musb.h> | 41 | #include <linux/usb/musb.h> |
42 | #endif | ||
41 | #include <asm/bfin5xx_spi.h> | 43 | #include <asm/bfin5xx_spi.h> |
42 | #include <asm/cplb.h> | 44 | #include <asm/cplb.h> |
43 | #include <asm/dma.h> | 45 | #include <asm/dma.h> |
@@ -420,6 +422,13 @@ static const struct ad7877_platform_data bfin_ad7877_ts_info = { | |||
420 | }; | 422 | }; |
421 | #endif | 423 | #endif |
422 | 424 | ||
425 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
426 | static struct bfin5xx_spi_chip spidev_chip_info = { | ||
427 | .enable_dma = 0, | ||
428 | .bits_per_word = 8, | ||
429 | }; | ||
430 | #endif | ||
431 | |||
423 | static struct spi_board_info bf54x_spi_board_info[] __initdata = { | 432 | static struct spi_board_info bf54x_spi_board_info[] __initdata = { |
424 | #if defined(CONFIG_MTD_M25P80) \ | 433 | #if defined(CONFIG_MTD_M25P80) \ |
425 | || defined(CONFIG_MTD_M25P80_MODULE) | 434 | || defined(CONFIG_MTD_M25P80_MODULE) |
@@ -445,6 +454,15 @@ static struct spi_board_info bf54x_spi_board_info[] __initdata = { | |||
445 | .controller_data = &spi_ad7877_chip_info, | 454 | .controller_data = &spi_ad7877_chip_info, |
446 | }, | 455 | }, |
447 | #endif | 456 | #endif |
457 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
458 | { | ||
459 | .modalias = "spidev", | ||
460 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | ||
461 | .bus_num = 0, | ||
462 | .chip_select = 1, | ||
463 | .controller_data = &spidev_chip_info, | ||
464 | }, | ||
465 | #endif | ||
448 | }; | 466 | }; |
449 | 467 | ||
450 | /* SPI (0) */ | 468 | /* SPI (0) */ |
@@ -631,7 +649,7 @@ static struct platform_device *ezkit_devices[] __initdata = { | |||
631 | &ezkit_flash_device, | 649 | &ezkit_flash_device, |
632 | }; | 650 | }; |
633 | 651 | ||
634 | static int __init stamp_init(void) | 652 | static int __init ezkit_init(void) |
635 | { | 653 | { |
636 | printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); | 654 | printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); |
637 | platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices)); | 655 | platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices)); |
@@ -644,4 +662,4 @@ static int __init stamp_init(void) | |||
644 | return 0; | 662 | return 0; |
645 | } | 663 | } |
646 | 664 | ||
647 | arch_initcall(stamp_init); | 665 | arch_initcall(ezkit_init); |
diff --git a/arch/blackfin/mach-bf548/dma.c b/arch/blackfin/mach-bf548/dma.c index 957bf1366eff..374803a8d2e8 100644 --- a/arch/blackfin/mach-bf548/dma.c +++ b/arch/blackfin/mach-bf548/dma.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * File: arch/blackfin/mach-bf561/dma.c | 2 | * File: arch/blackfin/mach-bf548/dma.c |
3 | * Based on: | 3 | * Based on: |
4 | * Author: | 4 | * Author: |
5 | * | 5 | * |
@@ -7,7 +7,7 @@ | |||
7 | * Description: This file contains the simple DMA Implementation for Blackfin | 7 | * Description: This file contains the simple DMA Implementation for Blackfin |
8 | * | 8 | * |
9 | * Modified: | 9 | * Modified: |
10 | * Copyright 2004-2007 Analog Devices Inc. | 10 | * Copyright 2004-2008 Analog Devices Inc. |
11 | * | 11 | * |
12 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 12 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
13 | * | 13 | * |
diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c index ed863ce9a2d8..43c1b0982819 100644 --- a/arch/blackfin/mach-bf561/boards/ezkit.c +++ b/arch/blackfin/mach-bf561/boards/ezkit.c | |||
@@ -92,6 +92,68 @@ void __exit bfin_isp1761_exit(void) | |||
92 | arch_initcall(bfin_isp1761_init); | 92 | arch_initcall(bfin_isp1761_init); |
93 | #endif | 93 | #endif |
94 | 94 | ||
95 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | ||
96 | #include <linux/usb/isp1362.h> | ||
97 | |||
98 | static struct resource isp1362_hcd_resources[] = { | ||
99 | { | ||
100 | .start = 0x2c060000, | ||
101 | .end = 0x2c060000, | ||
102 | .flags = IORESOURCE_MEM, | ||
103 | }, { | ||
104 | .start = 0x2c060004, | ||
105 | .end = 0x2c060004, | ||
106 | .flags = IORESOURCE_MEM, | ||
107 | }, { | ||
108 | .start = IRQ_PF8, | ||
109 | .end = IRQ_PF8, | ||
110 | .flags = IORESOURCE_IRQ, | ||
111 | }, | ||
112 | }; | ||
113 | |||
114 | static struct isp1362_platform_data isp1362_priv = { | ||
115 | .sel15Kres = 1, | ||
116 | .clknotstop = 0, | ||
117 | .oc_enable = 0, | ||
118 | .int_act_high = 0, | ||
119 | .int_edge_triggered = 0, | ||
120 | .remote_wakeup_connected = 0, | ||
121 | .no_power_switching = 1, | ||
122 | .power_switching_mode = 0, | ||
123 | }; | ||
124 | |||
125 | static struct platform_device isp1362_hcd_device = { | ||
126 | .name = "isp1362-hcd", | ||
127 | .id = 0, | ||
128 | .dev = { | ||
129 | .platform_data = &isp1362_priv, | ||
130 | }, | ||
131 | .num_resources = ARRAY_SIZE(isp1362_hcd_resources), | ||
132 | .resource = isp1362_hcd_resources, | ||
133 | }; | ||
134 | #endif | ||
135 | |||
136 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | ||
137 | static struct resource net2272_bfin_resources[] = { | ||
138 | { | ||
139 | .start = 0x2C000000, | ||
140 | .end = 0x2C000000 + 0x7F, | ||
141 | .flags = IORESOURCE_MEM, | ||
142 | }, { | ||
143 | .start = IRQ_PF10, | ||
144 | .end = IRQ_PF10, | ||
145 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | ||
146 | }, | ||
147 | }; | ||
148 | |||
149 | static struct platform_device net2272_bfin_device = { | ||
150 | .name = "net2272", | ||
151 | .id = -1, | ||
152 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), | ||
153 | .resource = net2272_bfin_resources, | ||
154 | }; | ||
155 | #endif | ||
156 | |||
95 | /* | 157 | /* |
96 | * USB-LAN EzExtender board | 158 | * USB-LAN EzExtender board |
97 | * Driver needs to know address, irq and flag pin. | 159 | * Driver needs to know address, irq and flag pin. |
@@ -204,6 +266,13 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |||
204 | .bits_per_word = 16, | 266 | .bits_per_word = 16, |
205 | }; | 267 | }; |
206 | #endif | 268 | #endif |
269 | |||
270 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
271 | static struct bfin5xx_spi_chip spidev_chip_info = { | ||
272 | .enable_dma = 0, | ||
273 | .bits_per_word = 8, | ||
274 | }; | ||
275 | #endif | ||
207 | #endif | 276 | #endif |
208 | 277 | ||
209 | /* SPI (0) */ | 278 | /* SPI (0) */ |
@@ -248,6 +317,15 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
248 | .controller_data = &ad1836_spi_chip_info, | 317 | .controller_data = &ad1836_spi_chip_info, |
249 | }, | 318 | }, |
250 | #endif | 319 | #endif |
320 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
321 | { | ||
322 | .modalias = "spidev", | ||
323 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | ||
324 | .bus_num = 0, | ||
325 | .chip_select = 1, | ||
326 | .controller_data = &spidev_chip_info, | ||
327 | }, | ||
328 | #endif | ||
251 | }; | 329 | }; |
252 | 330 | ||
253 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | 331 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) |
@@ -340,6 +418,10 @@ static struct platform_device *ezkit_devices[] __initdata = { | |||
340 | &ax88180_device, | 418 | &ax88180_device, |
341 | #endif | 419 | #endif |
342 | 420 | ||
421 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | ||
422 | &net2272_bfin_device, | ||
423 | #endif | ||
424 | |||
343 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | 425 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
344 | &bfin_spi0_device, | 426 | &bfin_spi0_device, |
345 | #endif | 427 | #endif |
@@ -359,6 +441,11 @@ static struct platform_device *ezkit_devices[] __initdata = { | |||
359 | #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) | 441 | #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) |
360 | &i2c_gpio_device, | 442 | &i2c_gpio_device, |
361 | #endif | 443 | #endif |
444 | |||
445 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | ||
446 | &isp1362_hcd_device, | ||
447 | #endif | ||
448 | |||
362 | &ezkit_flash_device, | 449 | &ezkit_flash_device, |
363 | }; | 450 | }; |
364 | 451 | ||
diff --git a/arch/blackfin/mach-common/Makefile b/arch/blackfin/mach-common/Makefile index 8636d4284bdb..15e33ca1ce80 100644 --- a/arch/blackfin/mach-common/Makefile +++ b/arch/blackfin/mach-common/Makefile | |||
@@ -4,8 +4,6 @@ | |||
4 | 4 | ||
5 | obj-y := \ | 5 | obj-y := \ |
6 | cache.o cacheinit.o entry.o \ | 6 | cache.o cacheinit.o entry.o \ |
7 | interrupt.o lock.o irqpanic.o arch_checks.o | 7 | interrupt.o lock.o irqpanic.o arch_checks.o ints-priority.o |
8 | 8 | ||
9 | obj-$(CONFIG_BFIN_SINGLE_CORE) += ints-priority-sc.o | ||
10 | obj-$(CONFIG_BFIN_DUAL_CORE) += ints-priority-dc.o | ||
11 | obj-$(CONFIG_PM) += pm.o dpmc.o | 9 | obj-$(CONFIG_PM) += pm.o dpmc.o |
diff --git a/arch/blackfin/mach-common/dpmc.S b/arch/blackfin/mach-common/dpmc.S index b82c096e1980..b80ddd8b232d 100644 --- a/arch/blackfin/mach-common/dpmc.S +++ b/arch/blackfin/mach-common/dpmc.S | |||
@@ -191,6 +191,9 @@ ENTRY(_sleep_mode) | |||
191 | call _test_pll_locked; | 191 | call _test_pll_locked; |
192 | 192 | ||
193 | R0 = IWR_ENABLE(0); | 193 | R0 = IWR_ENABLE(0); |
194 | R1 = IWR_DISABLE_ALL; | ||
195 | R2 = IWR_DISABLE_ALL; | ||
196 | |||
194 | call _set_sic_iwr; | 197 | call _set_sic_iwr; |
195 | 198 | ||
196 | P0.H = hi(PLL_CTL); | 199 | P0.H = hi(PLL_CTL); |
@@ -237,6 +240,10 @@ ENTRY(_deep_sleep) | |||
237 | 240 | ||
238 | CLI R4; | 241 | CLI R4; |
239 | 242 | ||
243 | R0 = IWR_ENABLE(0); | ||
244 | R1 = IWR_DISABLE_ALL; | ||
245 | R2 = IWR_DISABLE_ALL; | ||
246 | |||
240 | call _set_sic_iwr; | 247 | call _set_sic_iwr; |
241 | 248 | ||
242 | call _set_dram_srfs; | 249 | call _set_dram_srfs; |
@@ -261,6 +268,9 @@ ENTRY(_deep_sleep) | |||
261 | call _test_pll_locked; | 268 | call _test_pll_locked; |
262 | 269 | ||
263 | R0 = IWR_ENABLE(0); | 270 | R0 = IWR_ENABLE(0); |
271 | R1 = IWR_DISABLE_ALL; | ||
272 | R2 = IWR_DISABLE_ALL; | ||
273 | |||
264 | call _set_sic_iwr; | 274 | call _set_sic_iwr; |
265 | 275 | ||
266 | P0.H = hi(PLL_CTL); | 276 | P0.H = hi(PLL_CTL); |
@@ -286,7 +296,13 @@ ENTRY(_sleep_deeper) | |||
286 | CLI R4; | 296 | CLI R4; |
287 | 297 | ||
288 | P3 = R0; | 298 | P3 = R0; |
299 | P4 = R1; | ||
300 | P5 = R2; | ||
301 | |||
289 | R0 = IWR_ENABLE(0); | 302 | R0 = IWR_ENABLE(0); |
303 | R1 = IWR_DISABLE_ALL; | ||
304 | R2 = IWR_DISABLE_ALL; | ||
305 | |||
290 | call _set_sic_iwr; | 306 | call _set_sic_iwr; |
291 | call _set_dram_srfs; /* Set SDRAM Self Refresh */ | 307 | call _set_dram_srfs; /* Set SDRAM Self Refresh */ |
292 | 308 | ||
@@ -327,6 +343,8 @@ ENTRY(_sleep_deeper) | |||
327 | call _test_pll_locked; | 343 | call _test_pll_locked; |
328 | 344 | ||
329 | R0 = P3; | 345 | R0 = P3; |
346 | R1 = P4; | ||
347 | R3 = P5; | ||
330 | call _set_sic_iwr; /* Set Awake from IDLE */ | 348 | call _set_sic_iwr; /* Set Awake from IDLE */ |
331 | 349 | ||
332 | P0.H = hi(PLL_CTL); | 350 | P0.H = hi(PLL_CTL); |
@@ -340,6 +358,9 @@ ENTRY(_sleep_deeper) | |||
340 | call _test_pll_locked; | 358 | call _test_pll_locked; |
341 | 359 | ||
342 | R0 = IWR_ENABLE(0); | 360 | R0 = IWR_ENABLE(0); |
361 | R1 = IWR_DISABLE_ALL; | ||
362 | R2 = IWR_DISABLE_ALL; | ||
363 | |||
343 | call _set_sic_iwr; /* Set Awake from IDLE PLL */ | 364 | call _set_sic_iwr; /* Set Awake from IDLE PLL */ |
344 | 365 | ||
345 | P0.H = hi(VR_CTL); | 366 | P0.H = hi(VR_CTL); |
@@ -417,14 +438,23 @@ ENTRY(_unset_dram_srfs) | |||
417 | RTS; | 438 | RTS; |
418 | 439 | ||
419 | ENTRY(_set_sic_iwr) | 440 | ENTRY(_set_sic_iwr) |
420 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) | 441 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) |
421 | P0.H = hi(SIC_IWR0); | 442 | P0.H = hi(SIC_IWR0); |
422 | P0.L = lo(SIC_IWR0); | 443 | P0.L = lo(SIC_IWR0); |
444 | P1.H = hi(SIC_IWR1); | ||
445 | P1.L = lo(SIC_IWR1); | ||
446 | [P1] = R1; | ||
447 | #if defined(CONFIG_BF54x) | ||
448 | P1.H = hi(SIC_IWR2); | ||
449 | P1.L = lo(SIC_IWR2); | ||
450 | [P1] = R2; | ||
451 | #endif | ||
423 | #else | 452 | #else |
424 | P0.H = hi(SIC_IWR); | 453 | P0.H = hi(SIC_IWR); |
425 | P0.L = lo(SIC_IWR); | 454 | P0.L = lo(SIC_IWR); |
426 | #endif | 455 | #endif |
427 | [P0] = R0; | 456 | [P0] = R0; |
457 | |||
428 | SSYNC; | 458 | SSYNC; |
429 | RTS; | 459 | RTS; |
430 | 460 | ||
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S index fdd9bf43361e..2cbb7a0bc38e 100644 --- a/arch/blackfin/mach-common/entry.S +++ b/arch/blackfin/mach-common/entry.S | |||
@@ -121,6 +121,7 @@ ENTRY(_ex_icplb_miss) | |||
121 | (R7:6,P5:4) = [sp++]; | 121 | (R7:6,P5:4) = [sp++]; |
122 | ASTAT = [sp++]; | 122 | ASTAT = [sp++]; |
123 | SAVE_ALL_SYS | 123 | SAVE_ALL_SYS |
124 | DEBUG_HWTRACE_SAVE(p5, r7) | ||
124 | #ifdef CONFIG_MPU | 125 | #ifdef CONFIG_MPU |
125 | R0 = SEQSTAT; | 126 | R0 = SEQSTAT; |
126 | R1 = SP; | 127 | R1 = SP; |
@@ -132,14 +133,13 @@ ENTRY(_ex_icplb_miss) | |||
132 | #else | 133 | #else |
133 | call __cplb_hdr; | 134 | call __cplb_hdr; |
134 | #endif | 135 | #endif |
135 | DEBUG_START_HWTRACE(p5, r7) | 136 | DEBUG_HWTRACE_RESTORE(p5, r7) |
136 | RESTORE_ALL_SYS | 137 | RESTORE_ALL_SYS |
137 | SP = EX_SCRATCH_REG; | 138 | SP = EX_SCRATCH_REG; |
138 | rtx; | 139 | rtx; |
139 | ENDPROC(_ex_icplb_miss) | 140 | ENDPROC(_ex_icplb_miss) |
140 | 141 | ||
141 | ENTRY(_ex_syscall) | 142 | ENTRY(_ex_syscall) |
142 | DEBUG_START_HWTRACE(p5, r7) | ||
143 | (R7:6,P5:4) = [sp++]; | 143 | (R7:6,P5:4) = [sp++]; |
144 | ASTAT = [sp++]; | 144 | ASTAT = [sp++]; |
145 | raise 15; /* invoked by TRAP #0, for sys call */ | 145 | raise 15; /* invoked by TRAP #0, for sys call */ |
@@ -178,7 +178,6 @@ ENTRY(_ex_single_step) | |||
178 | ENDPROC(_ex_single_step) | 178 | ENDPROC(_ex_single_step) |
179 | 179 | ||
180 | ENTRY(_bfin_return_from_exception) | 180 | ENTRY(_bfin_return_from_exception) |
181 | DEBUG_START_HWTRACE(p5, r7) | ||
182 | #if ANOMALY_05000257 | 181 | #if ANOMALY_05000257 |
183 | R7=LC0; | 182 | R7=LC0; |
184 | LC0=R7; | 183 | LC0=R7; |
@@ -200,10 +199,9 @@ ENTRY(_handle_bad_cplb) | |||
200 | * need to make a CPLB exception look like a normal exception | 199 | * need to make a CPLB exception look like a normal exception |
201 | */ | 200 | */ |
202 | 201 | ||
203 | DEBUG_START_HWTRACE(p5, r7) | ||
204 | RESTORE_ALL_SYS | 202 | RESTORE_ALL_SYS |
205 | [--sp] = ASTAT; | 203 | [--sp] = ASTAT; |
206 | [--sp] = (R7:6, P5:4); | 204 | [--sp] = (R7:6,P5:4); |
207 | 205 | ||
208 | ENTRY(_ex_replaceable) | 206 | ENTRY(_ex_replaceable) |
209 | nop; | 207 | nop; |
@@ -253,7 +251,6 @@ ENTRY(_ex_trap_c) | |||
253 | R6 = SEQSTAT; | 251 | R6 = SEQSTAT; |
254 | [P5] = R6; | 252 | [P5] = R6; |
255 | 253 | ||
256 | DEBUG_START_HWTRACE(p5, r7) | ||
257 | (R7:6,P5:4) = [sp++]; | 254 | (R7:6,P5:4) = [sp++]; |
258 | ASTAT = [sp++]; | 255 | ASTAT = [sp++]; |
259 | SP = EX_SCRATCH_REG; | 256 | SP = EX_SCRATCH_REG; |
@@ -382,8 +379,7 @@ ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/ | |||
382 | sp.h = _exception_stack_top; | 379 | sp.h = _exception_stack_top; |
383 | /* Try to deal with syscalls quickly. */ | 380 | /* Try to deal with syscalls quickly. */ |
384 | [--sp] = ASTAT; | 381 | [--sp] = ASTAT; |
385 | [--sp] = (R7:6, P5:4); | 382 | [--sp] = (R7:6,P5:4); |
386 | DEBUG_STOP_HWTRACE(p5, r7) | ||
387 | r7 = SEQSTAT; /* reason code is in bit 5:0 */ | 383 | r7 = SEQSTAT; /* reason code is in bit 5:0 */ |
388 | r6.l = lo(SEQSTAT_EXCAUSE); | 384 | r6.l = lo(SEQSTAT_EXCAUSE); |
389 | r6.h = hi(SEQSTAT_EXCAUSE); | 385 | r6.h = hi(SEQSTAT_EXCAUSE); |
diff --git a/arch/blackfin/mach-common/ints-priority-dc.c b/arch/blackfin/mach-common/ints-priority-dc.c deleted file mode 100644 index 8d18d6b163bb..000000000000 --- a/arch/blackfin/mach-common/ints-priority-dc.c +++ /dev/null | |||
@@ -1,484 +0,0 @@ | |||
1 | /* | ||
2 | * File: arch/blackfin/mach-common/ints-priority-dc.c | ||
3 | * Based on: | ||
4 | * Author: | ||
5 | * | ||
6 | * Created: ? | ||
7 | * Description: Set up the interrupt priorities | ||
8 | * | ||
9 | * Modified: | ||
10 | * 1996 Roman Zippel | ||
11 | * 1999 D. Jeff Dionne <jeff@uclinux.org> | ||
12 | * 2000-2001 Lineo, Inc. D. Jefff Dionne <jeff@lineo.ca> | ||
13 | * 2002 Arcturus Networks Inc. MaTed <mated@sympatico.ca> | ||
14 | * 2003 Metrowerks/Motorola | ||
15 | * 2003 Bas Vermeulen <bas@buyways.nl> | ||
16 | * Copyright 2004-2006 Analog Devices Inc. | ||
17 | * | ||
18 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | ||
19 | * | ||
20 | * This program is free software; you can redistribute it and/or modify | ||
21 | * it under the terms of the GNU General Public License as published by | ||
22 | * the Free Software Foundation; either version 2 of the License, or | ||
23 | * (at your option) any later version. | ||
24 | * | ||
25 | * This program is distributed in the hope that it will be useful, | ||
26 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
27 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
28 | * GNU General Public License for more details. | ||
29 | * | ||
30 | * You should have received a copy of the GNU General Public License | ||
31 | * along with this program; if not, see the file COPYING, or write | ||
32 | * to the Free Software Foundation, Inc., | ||
33 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
34 | */ | ||
35 | |||
36 | #include <linux/module.h> | ||
37 | #include <linux/kernel_stat.h> | ||
38 | #include <linux/seq_file.h> | ||
39 | #include <linux/irq.h> | ||
40 | #ifdef CONFIG_KGDB | ||
41 | #include <linux/kgdb.h> | ||
42 | #endif | ||
43 | #include <asm/traps.h> | ||
44 | #include <asm/blackfin.h> | ||
45 | #include <asm/gpio.h> | ||
46 | #include <asm/irq_handler.h> | ||
47 | |||
48 | /* | ||
49 | * NOTES: | ||
50 | * - we have separated the physical Hardware interrupt from the | ||
51 | * levels that the LINUX kernel sees (see the description in irq.h) | ||
52 | * - | ||
53 | */ | ||
54 | |||
55 | /* Initialize this to an actual value to force it into the .data | ||
56 | * section so that we know it is properly initialized at entry into | ||
57 | * the kernel but before bss is initialized to zero (which is where | ||
58 | * it would live otherwise). The 0x1f magic represents the IRQs we | ||
59 | * cannot actually mask out in hardware. | ||
60 | */ | ||
61 | unsigned long irq_flags = 0x1f; | ||
62 | |||
63 | /* The number of spurious interrupts */ | ||
64 | atomic_t num_spurious; | ||
65 | |||
66 | struct ivgx { | ||
67 | /* irq number for request_irq, available in mach-bf561/irq.h */ | ||
68 | int irqno; | ||
69 | /* corresponding bit in the SICA_ISR0 register */ | ||
70 | int isrflag0; | ||
71 | /* corresponding bit in the SICA_ISR1 register */ | ||
72 | int isrflag1; | ||
73 | } ivg_table[NR_PERI_INTS]; | ||
74 | |||
75 | struct ivg_slice { | ||
76 | /* position of first irq in ivg_table for given ivg */ | ||
77 | struct ivgx *ifirst; | ||
78 | struct ivgx *istop; | ||
79 | } ivg7_13[IVG13 - IVG7 + 1]; | ||
80 | |||
81 | static void search_IAR(void); | ||
82 | |||
83 | /* | ||
84 | * Search SIC_IAR and fill tables with the irqvalues | ||
85 | * and their positions in the SIC_ISR register. | ||
86 | */ | ||
87 | static void __init search_IAR(void) | ||
88 | { | ||
89 | unsigned ivg, irq_pos = 0; | ||
90 | for (ivg = 0; ivg <= IVG13 - IVG7; ivg++) { | ||
91 | int irqn; | ||
92 | |||
93 | ivg7_13[ivg].istop = ivg7_13[ivg].ifirst = &ivg_table[irq_pos]; | ||
94 | |||
95 | for (irqn = 0; irqn < NR_PERI_INTS; irqn++) { | ||
96 | int iar_shift = (irqn & 7) * 4; | ||
97 | if (ivg == | ||
98 | (0xf & | ||
99 | bfin_read32((unsigned long *)SICA_IAR0 + | ||
100 | (irqn >> 3)) >> iar_shift)) { | ||
101 | ivg_table[irq_pos].irqno = IVG7 + irqn; | ||
102 | ivg_table[irq_pos].isrflag0 = | ||
103 | (irqn < 32 ? (1 << irqn) : 0); | ||
104 | ivg_table[irq_pos].isrflag1 = | ||
105 | (irqn < 32 ? 0 : (1 << (irqn - 32))); | ||
106 | ivg7_13[ivg].istop++; | ||
107 | irq_pos++; | ||
108 | } | ||
109 | } | ||
110 | } | ||
111 | } | ||
112 | |||
113 | /* | ||
114 | * This is for BF561 internal IRQs | ||
115 | */ | ||
116 | |||
117 | static void ack_noop(unsigned int irq) | ||
118 | { | ||
119 | /* Dummy function. */ | ||
120 | } | ||
121 | |||
122 | static void bf561_core_mask_irq(unsigned int irq) | ||
123 | { | ||
124 | irq_flags &= ~(1 << irq); | ||
125 | if (!irqs_disabled()) | ||
126 | local_irq_enable(); | ||
127 | } | ||
128 | |||
129 | static void bf561_core_unmask_irq(unsigned int irq) | ||
130 | { | ||
131 | irq_flags |= 1 << irq; | ||
132 | /* | ||
133 | * If interrupts are enabled, IMASK must contain the same value | ||
134 | * as irq_flags. Make sure that invariant holds. If interrupts | ||
135 | * are currently disabled we need not do anything; one of the | ||
136 | * callers will take care of setting IMASK to the proper value | ||
137 | * when reenabling interrupts. | ||
138 | * local_irq_enable just does "STI irq_flags", so it's exactly | ||
139 | * what we need. | ||
140 | */ | ||
141 | if (!irqs_disabled()) | ||
142 | local_irq_enable(); | ||
143 | return; | ||
144 | } | ||
145 | |||
146 | static void bf561_internal_mask_irq(unsigned int irq) | ||
147 | { | ||
148 | unsigned long irq_mask; | ||
149 | if ((irq - (IRQ_CORETMR + 1)) < 32) { | ||
150 | irq_mask = (1 << (irq - (IRQ_CORETMR + 1))); | ||
151 | bfin_write_SICA_IMASK0(bfin_read_SICA_IMASK0() & ~irq_mask); | ||
152 | } else { | ||
153 | irq_mask = (1 << (irq - (IRQ_CORETMR + 1) - 32)); | ||
154 | bfin_write_SICA_IMASK1(bfin_read_SICA_IMASK1() & ~irq_mask); | ||
155 | } | ||
156 | } | ||
157 | |||
158 | static void bf561_internal_unmask_irq(unsigned int irq) | ||
159 | { | ||
160 | unsigned long irq_mask; | ||
161 | |||
162 | if ((irq - (IRQ_CORETMR + 1)) < 32) { | ||
163 | irq_mask = (1 << (irq - (IRQ_CORETMR + 1))); | ||
164 | bfin_write_SICA_IMASK0(bfin_read_SICA_IMASK0() | irq_mask); | ||
165 | } else { | ||
166 | irq_mask = (1 << (irq - (IRQ_CORETMR + 1) - 32)); | ||
167 | bfin_write_SICA_IMASK1(bfin_read_SICA_IMASK1() | irq_mask); | ||
168 | } | ||
169 | SSYNC(); | ||
170 | } | ||
171 | |||
172 | static struct irq_chip bf561_core_irqchip = { | ||
173 | .ack = ack_noop, | ||
174 | .mask = bf561_core_mask_irq, | ||
175 | .unmask = bf561_core_unmask_irq, | ||
176 | }; | ||
177 | |||
178 | static struct irq_chip bf561_internal_irqchip = { | ||
179 | .ack = ack_noop, | ||
180 | .mask = bf561_internal_mask_irq, | ||
181 | .unmask = bf561_internal_unmask_irq, | ||
182 | }; | ||
183 | |||
184 | static unsigned short gpio_enabled[gpio_bank(MAX_BLACKFIN_GPIOS)]; | ||
185 | static unsigned short gpio_edge_triggered[gpio_bank(MAX_BLACKFIN_GPIOS)]; | ||
186 | |||
187 | static void bf561_gpio_ack_irq(unsigned int irq) | ||
188 | { | ||
189 | u16 gpionr = irq - IRQ_PF0; | ||
190 | |||
191 | if (gpio_edge_triggered[gpio_bank(gpionr)] & gpio_bit(gpionr)) { | ||
192 | set_gpio_data(gpionr, 0); | ||
193 | SSYNC(); | ||
194 | } | ||
195 | } | ||
196 | |||
197 | static void bf561_gpio_mask_ack_irq(unsigned int irq) | ||
198 | { | ||
199 | u16 gpionr = irq - IRQ_PF0; | ||
200 | |||
201 | if (gpio_edge_triggered[gpio_bank(gpionr)] & gpio_bit(gpionr)) { | ||
202 | set_gpio_data(gpionr, 0); | ||
203 | SSYNC(); | ||
204 | } | ||
205 | |||
206 | set_gpio_maska(gpionr, 0); | ||
207 | SSYNC(); | ||
208 | } | ||
209 | |||
210 | static void bf561_gpio_mask_irq(unsigned int irq) | ||
211 | { | ||
212 | set_gpio_maska(irq - IRQ_PF0, 0); | ||
213 | SSYNC(); | ||
214 | } | ||
215 | |||
216 | static void bf561_gpio_unmask_irq(unsigned int irq) | ||
217 | { | ||
218 | set_gpio_maska(irq - IRQ_PF0, 1); | ||
219 | SSYNC(); | ||
220 | } | ||
221 | |||
222 | static unsigned int bf561_gpio_irq_startup(unsigned int irq) | ||
223 | { | ||
224 | unsigned int ret; | ||
225 | char buf[8]; | ||
226 | u16 gpionr = irq - IRQ_PF0; | ||
227 | |||
228 | if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) { | ||
229 | snprintf(buf, sizeof buf, "IRQ %d", irq); | ||
230 | ret = gpio_request(gpionr, buf); | ||
231 | if (ret) | ||
232 | return ret; | ||
233 | |||
234 | } | ||
235 | |||
236 | gpio_enabled[gpio_bank(gpionr)] |= gpio_bit(gpionr); | ||
237 | bf561_gpio_unmask_irq(irq); | ||
238 | |||
239 | return ret; | ||
240 | |||
241 | } | ||
242 | |||
243 | static void bf561_gpio_irq_shutdown(unsigned int irq) | ||
244 | { | ||
245 | bf561_gpio_mask_irq(irq); | ||
246 | gpio_free(irq - IRQ_PF0); | ||
247 | gpio_enabled[gpio_bank(irq - IRQ_PF0)] &= ~gpio_bit(irq - IRQ_PF0); | ||
248 | } | ||
249 | |||
250 | static int bf561_gpio_irq_type(unsigned int irq, unsigned int type) | ||
251 | { | ||
252 | |||
253 | unsigned int ret; | ||
254 | char buf[8]; | ||
255 | u16 gpionr = irq - IRQ_PF0; | ||
256 | |||
257 | |||
258 | if (type == IRQ_TYPE_PROBE) { | ||
259 | /* only probe unenabled GPIO interrupt lines */ | ||
260 | if (gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr)) | ||
261 | return 0; | ||
262 | type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING; | ||
263 | |||
264 | } | ||
265 | |||
266 | if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING | | ||
267 | IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) { | ||
268 | |||
269 | if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) { | ||
270 | snprintf(buf, sizeof buf, "IRQ %d", irq); | ||
271 | ret = gpio_request(gpionr, buf); | ||
272 | if (ret) | ||
273 | return ret; | ||
274 | |||
275 | } | ||
276 | |||
277 | gpio_enabled[gpio_bank(gpionr)] |= gpio_bit(gpionr); | ||
278 | } else { | ||
279 | gpio_enabled[gpio_bank(gpionr)] &= ~gpio_bit(gpionr); | ||
280 | return 0; | ||
281 | } | ||
282 | |||
283 | |||
284 | set_gpio_dir(gpionr, 0); | ||
285 | set_gpio_inen(gpionr, 1); | ||
286 | |||
287 | |||
288 | if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) { | ||
289 | gpio_edge_triggered[gpio_bank(gpionr)] |= gpio_bit(gpionr); | ||
290 | set_gpio_edge(gpionr, 1); | ||
291 | } else { | ||
292 | set_gpio_edge(gpionr, 0); | ||
293 | gpio_edge_triggered[gpio_bank(gpionr)] &= ~gpio_bit(gpionr); | ||
294 | } | ||
295 | |||
296 | if ((type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) | ||
297 | == (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) | ||
298 | set_gpio_both(gpionr, 1); | ||
299 | else | ||
300 | set_gpio_both(gpionr, 0); | ||
301 | |||
302 | if ((type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_LEVEL_LOW))) | ||
303 | set_gpio_polar(gpionr, 1); /* low or falling edge denoted by one */ | ||
304 | else | ||
305 | set_gpio_polar(gpionr, 0); /* high or rising edge denoted by zero */ | ||
306 | |||
307 | SSYNC(); | ||
308 | |||
309 | if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) | ||
310 | set_irq_handler(irq, handle_edge_irq); | ||
311 | else | ||
312 | set_irq_handler(irq, handle_level_irq); | ||
313 | |||
314 | return 0; | ||
315 | } | ||
316 | |||
317 | static struct irq_chip bf561_gpio_irqchip = { | ||
318 | .ack = bf561_gpio_ack_irq, | ||
319 | .mask = bf561_gpio_mask_irq, | ||
320 | .mask_ack = bf561_gpio_mask_ack_irq, | ||
321 | .unmask = bf561_gpio_unmask_irq, | ||
322 | .set_type = bf561_gpio_irq_type, | ||
323 | .startup = bf561_gpio_irq_startup, | ||
324 | .shutdown = bf561_gpio_irq_shutdown | ||
325 | }; | ||
326 | |||
327 | static void bf561_demux_gpio_irq(unsigned int inta_irq, | ||
328 | struct irq_desc *intb_desc) | ||
329 | { | ||
330 | int irq, flag_d, mask; | ||
331 | u16 gpio; | ||
332 | |||
333 | switch (inta_irq) { | ||
334 | case IRQ_PROG0_INTA: | ||
335 | irq = IRQ_PF0; | ||
336 | break; | ||
337 | case IRQ_PROG1_INTA: | ||
338 | irq = IRQ_PF16; | ||
339 | break; | ||
340 | case IRQ_PROG2_INTA: | ||
341 | irq = IRQ_PF32; | ||
342 | break; | ||
343 | default: | ||
344 | dump_stack(); | ||
345 | return; | ||
346 | } | ||
347 | |||
348 | gpio = irq - IRQ_PF0; | ||
349 | |||
350 | flag_d = get_gpiop_data(gpio); | ||
351 | mask = flag_d & (gpio_enabled[gpio_bank(gpio)] & | ||
352 | get_gpiop_maska(gpio)); | ||
353 | |||
354 | do { | ||
355 | if (mask & 1) { | ||
356 | struct irq_desc *desc = irq_desc + irq; | ||
357 | desc->handle_irq(irq, desc); | ||
358 | } | ||
359 | irq++; | ||
360 | mask >>= 1; | ||
361 | } while (mask); | ||
362 | |||
363 | |||
364 | } | ||
365 | |||
366 | void __init init_exception_vectors(void) | ||
367 | { | ||
368 | SSYNC(); | ||
369 | |||
370 | /* cannot program in software: | ||
371 | * evt0 - emulation (jtag) | ||
372 | * evt1 - reset | ||
373 | */ | ||
374 | bfin_write_EVT2(evt_nmi); | ||
375 | bfin_write_EVT3(trap); | ||
376 | bfin_write_EVT5(evt_ivhw); | ||
377 | bfin_write_EVT6(evt_timer); | ||
378 | bfin_write_EVT7(evt_evt7); | ||
379 | bfin_write_EVT8(evt_evt8); | ||
380 | bfin_write_EVT9(evt_evt9); | ||
381 | bfin_write_EVT10(evt_evt10); | ||
382 | bfin_write_EVT11(evt_evt11); | ||
383 | bfin_write_EVT12(evt_evt12); | ||
384 | bfin_write_EVT13(evt_evt13); | ||
385 | bfin_write_EVT14(evt14_softirq); | ||
386 | bfin_write_EVT15(evt_system_call); | ||
387 | CSYNC(); | ||
388 | } | ||
389 | |||
390 | /* | ||
391 | * This function should be called during kernel startup to initialize | ||
392 | * the BFin IRQ handling routines. | ||
393 | */ | ||
394 | int __init init_arch_irq(void) | ||
395 | { | ||
396 | int irq; | ||
397 | unsigned long ilat = 0; | ||
398 | /* Disable all the peripheral intrs - page 4-29 HW Ref manual */ | ||
399 | bfin_write_SICA_IMASK0(SIC_UNMASK_ALL); | ||
400 | bfin_write_SICA_IMASK1(SIC_UNMASK_ALL); | ||
401 | SSYNC(); | ||
402 | |||
403 | bfin_write_SICA_IWR0(IWR_ENABLE_ALL); | ||
404 | bfin_write_SICA_IWR1(IWR_ENABLE_ALL); | ||
405 | |||
406 | local_irq_disable(); | ||
407 | |||
408 | init_exception_buff(); | ||
409 | |||
410 | for (irq = 0; irq <= SYS_IRQS; irq++) { | ||
411 | if (irq <= IRQ_CORETMR) | ||
412 | set_irq_chip(irq, &bf561_core_irqchip); | ||
413 | else | ||
414 | set_irq_chip(irq, &bf561_internal_irqchip); | ||
415 | |||
416 | if ((irq != IRQ_PROG0_INTA) && | ||
417 | (irq != IRQ_PROG1_INTA) && | ||
418 | (irq != IRQ_PROG2_INTA)) | ||
419 | set_irq_handler(irq, handle_simple_irq); | ||
420 | else | ||
421 | set_irq_chained_handler(irq, bf561_demux_gpio_irq); | ||
422 | } | ||
423 | |||
424 | for (irq = IRQ_PF0; irq <= IRQ_PF47; irq++) { | ||
425 | set_irq_chip(irq, &bf561_gpio_irqchip); | ||
426 | /* if configured as edge, then will be changed to do_edge_IRQ */ | ||
427 | set_irq_handler(irq, handle_level_irq); | ||
428 | } | ||
429 | |||
430 | bfin_write_IMASK(0); | ||
431 | CSYNC(); | ||
432 | ilat = bfin_read_ILAT(); | ||
433 | CSYNC(); | ||
434 | bfin_write_ILAT(ilat); | ||
435 | CSYNC(); | ||
436 | |||
437 | printk(KERN_INFO "Configuring Blackfin Priority Driven Interrupts\n"); | ||
438 | /* IMASK=xxx is equivalent to STI xx or irq_flags=xx, | ||
439 | * local_irq_enable() | ||
440 | */ | ||
441 | program_IAR(); | ||
442 | /* Therefore it's better to setup IARs before interrupts enabled */ | ||
443 | search_IAR(); | ||
444 | |||
445 | /* Enable interrupts IVG7-15 */ | ||
446 | irq_flags = irq_flags | IMASK_IVG15 | | ||
447 | IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 | | ||
448 | IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; | ||
449 | |||
450 | return 0; | ||
451 | } | ||
452 | |||
453 | #ifdef CONFIG_DO_IRQ_L1 | ||
454 | __attribute__((l1_text)) | ||
455 | #endif | ||
456 | void do_irq(int vec, struct pt_regs *fp) | ||
457 | { | ||
458 | if (vec == EVT_IVTMR_P) { | ||
459 | vec = IRQ_CORETMR; | ||
460 | } else { | ||
461 | struct ivgx *ivg = ivg7_13[vec - IVG7].ifirst; | ||
462 | struct ivgx *ivg_stop = ivg7_13[vec - IVG7].istop; | ||
463 | unsigned long sic_status0, sic_status1; | ||
464 | |||
465 | SSYNC(); | ||
466 | sic_status0 = bfin_read_SICA_IMASK0() & bfin_read_SICA_ISR0(); | ||
467 | sic_status1 = bfin_read_SICA_IMASK1() & bfin_read_SICA_ISR1(); | ||
468 | |||
469 | for (;; ivg++) { | ||
470 | if (ivg >= ivg_stop) { | ||
471 | atomic_inc(&num_spurious); | ||
472 | return; | ||
473 | } else if ((sic_status0 & ivg->isrflag0) || | ||
474 | (sic_status1 & ivg->isrflag1)) | ||
475 | break; | ||
476 | } | ||
477 | vec = ivg->irqno; | ||
478 | } | ||
479 | asm_do_IRQ(vec, fp); | ||
480 | |||
481 | #ifdef CONFIG_KGDB | ||
482 | kgdb_process_breakpoint(); | ||
483 | #endif | ||
484 | } | ||
diff --git a/arch/blackfin/mach-common/ints-priority-sc.c b/arch/blackfin/mach-common/ints-priority.c index dec42acb5de0..880595afe98d 100644 --- a/arch/blackfin/mach-common/ints-priority-sc.c +++ b/arch/blackfin/mach-common/ints-priority.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * File: arch/blackfin/mach-common/ints-priority-sc.c | 2 | * File: arch/blackfin/mach-common/ints-priority.c |
3 | * Based on: | 3 | * Based on: |
4 | * Author: | 4 | * Author: |
5 | * | 5 | * |
@@ -13,7 +13,7 @@ | |||
13 | * 2002 Arcturus Networks Inc. MaTed <mated@sympatico.ca> | 13 | * 2002 Arcturus Networks Inc. MaTed <mated@sympatico.ca> |
14 | * 2003 Metrowerks/Motorola | 14 | * 2003 Metrowerks/Motorola |
15 | * 2003 Bas Vermeulen <bas@buyways.nl> | 15 | * 2003 Bas Vermeulen <bas@buyways.nl> |
16 | * Copyright 2004-2007 Analog Devices Inc. | 16 | * Copyright 2004-2008 Analog Devices Inc. |
17 | * | 17 | * |
18 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 18 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
19 | * | 19 | * |
@@ -69,6 +69,10 @@ unsigned long irq_flags = 0x1f; | |||
69 | /* The number of spurious interrupts */ | 69 | /* The number of spurious interrupts */ |
70 | atomic_t num_spurious; | 70 | atomic_t num_spurious; |
71 | 71 | ||
72 | #ifdef CONFIG_PM | ||
73 | unsigned long bfin_sic_iwr[3]; /* Up to 3 SIC_IWRx registers */ | ||
74 | #endif | ||
75 | |||
72 | struct ivgx { | 76 | struct ivgx { |
73 | /* irq number for request_irq, available in mach-bf533/irq.h */ | 77 | /* irq number for request_irq, available in mach-bf533/irq.h */ |
74 | unsigned int irqno; | 78 | unsigned int irqno; |
@@ -98,8 +102,7 @@ static void __init search_IAR(void) | |||
98 | 102 | ||
99 | for (irqn = 0; irqn < NR_PERI_INTS; irqn++) { | 103 | for (irqn = 0; irqn < NR_PERI_INTS; irqn++) { |
100 | int iar_shift = (irqn & 7) * 4; | 104 | int iar_shift = (irqn & 7) * 4; |
101 | if (ivg == | 105 | if (ivg == (0xf & |
102 | (0xf & | ||
103 | #ifndef CONFIG_BF52x | 106 | #ifndef CONFIG_BF52x |
104 | bfin_read32((unsigned long *)SIC_IAR0 + | 107 | bfin_read32((unsigned long *)SIC_IAR0 + |
105 | (irqn >> 3)) >> iar_shift)) { | 108 | (irqn >> 3)) >> iar_shift)) { |
@@ -179,6 +182,27 @@ static void bfin_internal_unmask_irq(unsigned int irq) | |||
179 | SSYNC(); | 182 | SSYNC(); |
180 | } | 183 | } |
181 | 184 | ||
185 | #ifdef CONFIG_PM | ||
186 | int bfin_internal_set_wake(unsigned int irq, unsigned int state) | ||
187 | { | ||
188 | unsigned bank, bit; | ||
189 | unsigned long flags; | ||
190 | bank = (irq - (IRQ_CORETMR + 1)) / 32; | ||
191 | bit = (irq - (IRQ_CORETMR + 1)) % 32; | ||
192 | |||
193 | local_irq_save(flags); | ||
194 | |||
195 | if (state) | ||
196 | bfin_sic_iwr[bank] |= (1 << bit); | ||
197 | else | ||
198 | bfin_sic_iwr[bank] &= ~(1 << bit); | ||
199 | |||
200 | local_irq_restore(flags); | ||
201 | |||
202 | return 0; | ||
203 | } | ||
204 | #endif | ||
205 | |||
182 | static struct irq_chip bfin_core_irqchip = { | 206 | static struct irq_chip bfin_core_irqchip = { |
183 | .ack = ack_noop, | 207 | .ack = ack_noop, |
184 | .mask = bfin_core_mask_irq, | 208 | .mask = bfin_core_mask_irq, |
@@ -189,6 +213,9 @@ static struct irq_chip bfin_internal_irqchip = { | |||
189 | .ack = ack_noop, | 213 | .ack = ack_noop, |
190 | .mask = bfin_internal_mask_irq, | 214 | .mask = bfin_internal_mask_irq, |
191 | .unmask = bfin_internal_unmask_irq, | 215 | .unmask = bfin_internal_unmask_irq, |
216 | #ifdef CONFIG_PM | ||
217 | .set_wake = bfin_internal_set_wake, | ||
218 | #endif | ||
192 | }; | 219 | }; |
193 | 220 | ||
194 | #ifdef BF537_GENERIC_ERROR_INT_DEMUX | 221 | #ifdef BF537_GENERIC_ERROR_INT_DEMUX |
@@ -206,8 +233,7 @@ static void bfin_generic_error_mask_irq(unsigned int irq) | |||
206 | if (!error_int_mask) { | 233 | if (!error_int_mask) { |
207 | local_irq_disable(); | 234 | local_irq_disable(); |
208 | bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() & | 235 | bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() & |
209 | ~(1 << | 236 | ~(1 << (IRQ_GENERIC_ERROR - |
210 | (IRQ_GENERIC_ERROR - | ||
211 | (IRQ_CORETMR + 1)))); | 237 | (IRQ_CORETMR + 1)))); |
212 | SSYNC(); | 238 | SSYNC(); |
213 | local_irq_enable(); | 239 | local_irq_enable(); |
@@ -232,7 +258,7 @@ static struct irq_chip bfin_generic_error_irqchip = { | |||
232 | }; | 258 | }; |
233 | 259 | ||
234 | static void bfin_demux_error_irq(unsigned int int_err_irq, | 260 | static void bfin_demux_error_irq(unsigned int int_err_irq, |
235 | struct irq_desc *intb_desc) | 261 | struct irq_desc *inta_desc) |
236 | { | 262 | { |
237 | int irq = 0; | 263 | int irq = 0; |
238 | 264 | ||
@@ -404,16 +430,8 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type) | |||
404 | return 0; | 430 | return 0; |
405 | } | 431 | } |
406 | 432 | ||
433 | set_gpio_inen(gpionr, 0); | ||
407 | set_gpio_dir(gpionr, 0); | 434 | set_gpio_dir(gpionr, 0); |
408 | set_gpio_inen(gpionr, 1); | ||
409 | |||
410 | if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) { | ||
411 | gpio_edge_triggered[gpio_bank(gpionr)] |= gpio_bit(gpionr); | ||
412 | set_gpio_edge(gpionr, 1); | ||
413 | } else { | ||
414 | set_gpio_edge(gpionr, 0); | ||
415 | gpio_edge_triggered[gpio_bank(gpionr)] &= ~gpio_bit(gpionr); | ||
416 | } | ||
417 | 435 | ||
418 | if ((type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) | 436 | if ((type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) |
419 | == (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) | 437 | == (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) |
@@ -426,6 +444,18 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type) | |||
426 | else | 444 | else |
427 | set_gpio_polar(gpionr, 0); /* high or rising edge denoted by zero */ | 445 | set_gpio_polar(gpionr, 0); /* high or rising edge denoted by zero */ |
428 | 446 | ||
447 | if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) { | ||
448 | set_gpio_edge(gpionr, 1); | ||
449 | set_gpio_inen(gpionr, 1); | ||
450 | gpio_edge_triggered[gpio_bank(gpionr)] |= gpio_bit(gpionr); | ||
451 | set_gpio_data(gpionr, 0); | ||
452 | |||
453 | } else { | ||
454 | set_gpio_edge(gpionr, 0); | ||
455 | gpio_edge_triggered[gpio_bank(gpionr)] &= ~gpio_bit(gpionr); | ||
456 | set_gpio_inen(gpionr, 1); | ||
457 | } | ||
458 | |||
429 | SSYNC(); | 459 | SSYNC(); |
430 | 460 | ||
431 | if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) | 461 | if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) |
@@ -436,6 +466,20 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type) | |||
436 | return 0; | 466 | return 0; |
437 | } | 467 | } |
438 | 468 | ||
469 | #ifdef CONFIG_PM | ||
470 | int bfin_gpio_set_wake(unsigned int irq, unsigned int state) | ||
471 | { | ||
472 | unsigned gpio = irq_to_gpio(irq); | ||
473 | |||
474 | if (state) | ||
475 | gpio_pm_wakeup_request(gpio, PM_WAKE_IGNORE); | ||
476 | else | ||
477 | gpio_pm_wakeup_free(gpio); | ||
478 | |||
479 | return 0; | ||
480 | } | ||
481 | #endif | ||
482 | |||
439 | static struct irq_chip bfin_gpio_irqchip = { | 483 | static struct irq_chip bfin_gpio_irqchip = { |
440 | .ack = bfin_gpio_ack_irq, | 484 | .ack = bfin_gpio_ack_irq, |
441 | .mask = bfin_gpio_mask_irq, | 485 | .mask = bfin_gpio_mask_irq, |
@@ -443,30 +487,87 @@ static struct irq_chip bfin_gpio_irqchip = { | |||
443 | .unmask = bfin_gpio_unmask_irq, | 487 | .unmask = bfin_gpio_unmask_irq, |
444 | .set_type = bfin_gpio_irq_type, | 488 | .set_type = bfin_gpio_irq_type, |
445 | .startup = bfin_gpio_irq_startup, | 489 | .startup = bfin_gpio_irq_startup, |
446 | .shutdown = bfin_gpio_irq_shutdown | 490 | .shutdown = bfin_gpio_irq_shutdown, |
491 | #ifdef CONFIG_PM | ||
492 | .set_wake = bfin_gpio_set_wake, | ||
493 | #endif | ||
447 | }; | 494 | }; |
448 | 495 | ||
449 | static void bfin_demux_gpio_irq(unsigned int intb_irq, | 496 | static void bfin_demux_gpio_irq(unsigned int inta_irq, |
450 | struct irq_desc *intb_desc) | 497 | struct irq_desc *desc) |
451 | { | 498 | { |
452 | u16 i; | 499 | unsigned int i, gpio, mask, irq, search = 0; |
453 | struct irq_desc *desc; | ||
454 | 500 | ||
455 | for (i = 0; i < MAX_BLACKFIN_GPIOS; i += 16) { | 501 | switch (inta_irq) { |
456 | int irq = IRQ_PF0 + i; | 502 | #if defined(CONFIG_BF53x) |
457 | int flag_d = get_gpiop_data(i); | 503 | case IRQ_PROG_INTA: |
458 | int mask = | 504 | irq = IRQ_PF0; |
459 | flag_d & (gpio_enabled[gpio_bank(i)] & get_gpiop_maska(i)); | 505 | search = 1; |
506 | break; | ||
507 | # if defined(BF537_FAMILY) && !(defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)) | ||
508 | case IRQ_MAC_RX: | ||
509 | irq = IRQ_PH0; | ||
510 | break; | ||
511 | # endif | ||
512 | #elif defined(CONFIG_BF52x) | ||
513 | case IRQ_PORTF_INTA: | ||
514 | irq = IRQ_PF0; | ||
515 | break; | ||
516 | case IRQ_PORTG_INTA: | ||
517 | irq = IRQ_PG0; | ||
518 | break; | ||
519 | case IRQ_PORTH_INTA: | ||
520 | irq = IRQ_PH0; | ||
521 | break; | ||
522 | #elif defined(CONFIG_BF561) | ||
523 | case IRQ_PROG0_INTA: | ||
524 | irq = IRQ_PF0; | ||
525 | break; | ||
526 | case IRQ_PROG1_INTA: | ||
527 | irq = IRQ_PF16; | ||
528 | break; | ||
529 | case IRQ_PROG2_INTA: | ||
530 | irq = IRQ_PF32; | ||
531 | break; | ||
532 | #endif | ||
533 | default: | ||
534 | BUG(); | ||
535 | return; | ||
536 | } | ||
460 | 537 | ||
461 | while (mask) { | 538 | if (search) { |
462 | if (mask & 1) { | 539 | for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { |
463 | desc = irq_desc + irq; | 540 | irq += i; |
464 | desc->handle_irq(irq, desc); | 541 | |
542 | mask = get_gpiop_data(i) & | ||
543 | (gpio_enabled[gpio_bank(i)] & | ||
544 | get_gpiop_maska(i)); | ||
545 | |||
546 | while (mask) { | ||
547 | if (mask & 1) { | ||
548 | desc = irq_desc + irq; | ||
549 | desc->handle_irq(irq, desc); | ||
550 | } | ||
551 | irq++; | ||
552 | mask >>= 1; | ||
465 | } | 553 | } |
466 | irq++; | ||
467 | mask >>= 1; | ||
468 | } | 554 | } |
555 | } else { | ||
556 | gpio = irq_to_gpio(irq); | ||
557 | mask = get_gpiop_data(gpio) & | ||
558 | (gpio_enabled[gpio_bank(gpio)] & | ||
559 | get_gpiop_maska(gpio)); | ||
560 | |||
561 | do { | ||
562 | if (mask & 1) { | ||
563 | desc = irq_desc + irq; | ||
564 | desc->handle_irq(irq, desc); | ||
565 | } | ||
566 | irq++; | ||
567 | mask >>= 1; | ||
568 | } while (mask); | ||
469 | } | 569 | } |
570 | |||
470 | } | 571 | } |
471 | 572 | ||
472 | #else /* CONFIG_BF54x */ | 573 | #else /* CONFIG_BF54x */ |
@@ -711,6 +812,74 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type) | |||
711 | return 0; | 812 | return 0; |
712 | } | 813 | } |
713 | 814 | ||
815 | #ifdef CONFIG_PM | ||
816 | u32 pint_saved_masks[NR_PINT_SYS_IRQS]; | ||
817 | u32 pint_wakeup_masks[NR_PINT_SYS_IRQS]; | ||
818 | |||
819 | int bfin_gpio_set_wake(unsigned int irq, unsigned int state) | ||
820 | { | ||
821 | u32 pint_irq; | ||
822 | u8 pint_val = irq2pint_lut[irq - SYS_IRQS]; | ||
823 | u32 bank = PINT_2_BANK(pint_val); | ||
824 | u32 pintbit = PINT_BIT(pint_val); | ||
825 | |||
826 | switch (bank) { | ||
827 | case 0: | ||
828 | pint_irq = IRQ_PINT0; | ||
829 | break; | ||
830 | case 2: | ||
831 | pint_irq = IRQ_PINT2; | ||
832 | break; | ||
833 | case 3: | ||
834 | pint_irq = IRQ_PINT3; | ||
835 | break; | ||
836 | case 1: | ||
837 | pint_irq = IRQ_PINT1; | ||
838 | break; | ||
839 | default: | ||
840 | return -EINVAL; | ||
841 | } | ||
842 | |||
843 | bfin_internal_set_wake(pint_irq, state); | ||
844 | |||
845 | if (state) | ||
846 | pint_wakeup_masks[bank] |= pintbit; | ||
847 | else | ||
848 | pint_wakeup_masks[bank] &= ~pintbit; | ||
849 | |||
850 | return 0; | ||
851 | } | ||
852 | |||
853 | u32 bfin_pm_setup(void) | ||
854 | { | ||
855 | u32 val, i; | ||
856 | |||
857 | for (i = 0; i < NR_PINT_SYS_IRQS; i++) { | ||
858 | val = pint[i]->mask_clear; | ||
859 | pint_saved_masks[i] = val; | ||
860 | if (val ^ pint_wakeup_masks[i]) { | ||
861 | pint[i]->mask_clear = val; | ||
862 | pint[i]->mask_set = pint_wakeup_masks[i]; | ||
863 | } | ||
864 | } | ||
865 | |||
866 | return 0; | ||
867 | } | ||
868 | |||
869 | void bfin_pm_restore(void) | ||
870 | { | ||
871 | u32 i, val; | ||
872 | |||
873 | for (i = 0; i < NR_PINT_SYS_IRQS; i++) { | ||
874 | val = pint_saved_masks[i]; | ||
875 | if (val ^ pint_wakeup_masks[i]) { | ||
876 | pint[i]->mask_clear = pint[i]->mask_clear; | ||
877 | pint[i]->mask_set = val; | ||
878 | } | ||
879 | } | ||
880 | } | ||
881 | #endif | ||
882 | |||
714 | static struct irq_chip bfin_gpio_irqchip = { | 883 | static struct irq_chip bfin_gpio_irqchip = { |
715 | .ack = bfin_gpio_ack_irq, | 884 | .ack = bfin_gpio_ack_irq, |
716 | .mask = bfin_gpio_mask_irq, | 885 | .mask = bfin_gpio_mask_irq, |
@@ -718,17 +887,19 @@ static struct irq_chip bfin_gpio_irqchip = { | |||
718 | .unmask = bfin_gpio_unmask_irq, | 887 | .unmask = bfin_gpio_unmask_irq, |
719 | .set_type = bfin_gpio_irq_type, | 888 | .set_type = bfin_gpio_irq_type, |
720 | .startup = bfin_gpio_irq_startup, | 889 | .startup = bfin_gpio_irq_startup, |
721 | .shutdown = bfin_gpio_irq_shutdown | 890 | .shutdown = bfin_gpio_irq_shutdown, |
891 | #ifdef CONFIG_PM | ||
892 | .set_wake = bfin_gpio_set_wake, | ||
893 | #endif | ||
722 | }; | 894 | }; |
723 | 895 | ||
724 | static void bfin_demux_gpio_irq(unsigned int intb_irq, | 896 | static void bfin_demux_gpio_irq(unsigned int inta_irq, |
725 | struct irq_desc *intb_desc) | 897 | struct irq_desc *desc) |
726 | { | 898 | { |
727 | u8 bank, pint_val; | 899 | u8 bank, pint_val; |
728 | u32 request, irq; | 900 | u32 request, irq; |
729 | struct irq_desc *desc; | ||
730 | 901 | ||
731 | switch (intb_irq) { | 902 | switch (inta_irq) { |
732 | case IRQ_PINT0: | 903 | case IRQ_PINT0: |
733 | bank = 0; | 904 | bank = 0; |
734 | break; | 905 | break; |
@@ -795,7 +966,7 @@ int __init init_arch_irq(void) | |||
795 | int irq; | 966 | int irq; |
796 | unsigned long ilat = 0; | 967 | unsigned long ilat = 0; |
797 | /* Disable all the peripheral intrs - page 4-29 HW Ref manual */ | 968 | /* Disable all the peripheral intrs - page 4-29 HW Ref manual */ |
798 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) | 969 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) |
799 | bfin_write_SIC_IMASK0(SIC_UNMASK_ALL); | 970 | bfin_write_SIC_IMASK0(SIC_UNMASK_ALL); |
800 | bfin_write_SIC_IMASK1(SIC_UNMASK_ALL); | 971 | bfin_write_SIC_IMASK1(SIC_UNMASK_ALL); |
801 | bfin_write_SIC_IWR0(IWR_ENABLE_ALL); | 972 | bfin_write_SIC_IWR0(IWR_ENABLE_ALL); |
@@ -812,6 +983,8 @@ int __init init_arch_irq(void) | |||
812 | 983 | ||
813 | local_irq_disable(); | 984 | local_irq_disable(); |
814 | 985 | ||
986 | init_exception_buff(); | ||
987 | |||
815 | #ifdef CONFIG_BF54x | 988 | #ifdef CONFIG_BF54x |
816 | # ifdef CONFIG_PINTx_REASSIGN | 989 | # ifdef CONFIG_PINTx_REASSIGN |
817 | pint[0]->assign = CONFIG_PINT0_ASSIGN; | 990 | pint[0]->assign = CONFIG_PINT0_ASSIGN; |
@@ -874,6 +1047,19 @@ int __init init_arch_irq(void) | |||
874 | set_irq_chained_handler(irq, | 1047 | set_irq_chained_handler(irq, |
875 | bfin_demux_gpio_irq); | 1048 | bfin_demux_gpio_irq); |
876 | break; | 1049 | break; |
1050 | #elif defined(CONFIG_BF561) | ||
1051 | case IRQ_PROG0_INTA: | ||
1052 | set_irq_chained_handler(irq, | ||
1053 | bfin_demux_gpio_irq); | ||
1054 | break; | ||
1055 | case IRQ_PROG1_INTA: | ||
1056 | set_irq_chained_handler(irq, | ||
1057 | bfin_demux_gpio_irq); | ||
1058 | break; | ||
1059 | case IRQ_PROG2_INTA: | ||
1060 | set_irq_chained_handler(irq, | ||
1061 | bfin_demux_gpio_irq); | ||
1062 | break; | ||
877 | #endif | 1063 | #endif |
878 | default: | 1064 | default: |
879 | set_irq_handler(irq, handle_simple_irq); | 1065 | set_irq_handler(irq, handle_simple_irq); |
@@ -893,11 +1079,8 @@ int __init init_arch_irq(void) | |||
893 | } | 1079 | } |
894 | #endif | 1080 | #endif |
895 | 1081 | ||
896 | #ifndef CONFIG_BF54x | 1082 | for (irq = GPIO_IRQ_BASE; irq < NR_IRQS; irq++) { |
897 | for (irq = IRQ_PF0; irq < NR_IRQS; irq++) { | 1083 | |
898 | #else | ||
899 | for (irq = IRQ_PA0; irq < NR_IRQS; irq++) { | ||
900 | #endif | ||
901 | set_irq_chip(irq, &bfin_gpio_irqchip); | 1084 | set_irq_chip(irq, &bfin_gpio_irqchip); |
902 | /* if configured as edge, then will be changed to do_edge_IRQ */ | 1085 | /* if configured as edge, then will be changed to do_edge_IRQ */ |
903 | set_irq_handler(irq, handle_level_irq); | 1086 | set_irq_handler(irq, handle_level_irq); |
@@ -936,7 +1119,7 @@ void do_irq(int vec, struct pt_regs *fp) | |||
936 | } else { | 1119 | } else { |
937 | struct ivgx *ivg = ivg7_13[vec - IVG7].ifirst; | 1120 | struct ivgx *ivg = ivg7_13[vec - IVG7].ifirst; |
938 | struct ivgx *ivg_stop = ivg7_13[vec - IVG7].istop; | 1121 | struct ivgx *ivg_stop = ivg7_13[vec - IVG7].istop; |
939 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) | 1122 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) |
940 | unsigned long sic_status[3]; | 1123 | unsigned long sic_status[3]; |
941 | 1124 | ||
942 | SSYNC(); | 1125 | SSYNC(); |
diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c index 81930f7d06f1..0be805ca423f 100644 --- a/arch/blackfin/mach-common/pm.c +++ b/arch/blackfin/mach-common/pm.c | |||
@@ -4,7 +4,7 @@ | |||
4 | * Author: Cliff Brake <cbrake@accelent.com> Copyright (c) 2001 | 4 | * Author: Cliff Brake <cbrake@accelent.com> Copyright (c) 2001 |
5 | * | 5 | * |
6 | * Created: 2001 | 6 | * Created: 2001 |
7 | * Description: Power management for the bfin | 7 | * Description: Blackfin power management |
8 | * | 8 | * |
9 | * Modified: Nicolas Pitre - PXA250 support | 9 | * Modified: Nicolas Pitre - PXA250 support |
10 | * Copyright (c) 2002 Monta Vista Software, Inc. | 10 | * Copyright (c) 2002 Monta Vista Software, Inc. |
@@ -12,7 +12,7 @@ | |||
12 | * Copyright (c) 2002 Monta Vista Software, Inc. | 12 | * Copyright (c) 2002 Monta Vista Software, Inc. |
13 | * Dirk Behme <dirk.behme@de.bosch.com> - OMAP1510/1610 | 13 | * Dirk Behme <dirk.behme@de.bosch.com> - OMAP1510/1610 |
14 | * Copyright 2004 | 14 | * Copyright 2004 |
15 | * Copyright 2004-2006 Analog Devices Inc. | 15 | * Copyright 2004-2008 Analog Devices Inc. |
16 | * | 16 | * |
17 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 17 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
18 | * | 18 | * |
@@ -67,42 +67,30 @@ void bfin_pm_suspend_standby_enter(void) | |||
67 | gpio_pm_wakeup_request(CONFIG_PM_WAKEUP_GPIO_NUMBER, WAKEUP_TYPE); | 67 | gpio_pm_wakeup_request(CONFIG_PM_WAKEUP_GPIO_NUMBER, WAKEUP_TYPE); |
68 | #endif | 68 | #endif |
69 | 69 | ||
70 | #if defined(CONFIG_PM_WAKEUP_BY_GPIO) || defined(CONFIG_PM_WAKEUP_GPIO_API) | 70 | u32 flags; |
71 | { | ||
72 | u32 flags; | ||
73 | 71 | ||
74 | local_irq_save(flags); | 72 | local_irq_save(flags); |
73 | bfin_pm_setup(); | ||
75 | 74 | ||
76 | sleep_deeper(gpio_pm_setup()); /*Goto Sleep*/ | 75 | #ifdef CONFIG_PM_BFIN_SLEEP_DEEPER |
77 | 76 | sleep_deeper(bfin_sic_iwr[0], bfin_sic_iwr[1], bfin_sic_iwr[2]); | |
78 | gpio_pm_restore(); | ||
79 | |||
80 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) | ||
81 | bfin_write_SIC_IWR0(IWR_ENABLE_ALL); | ||
82 | bfin_write_SIC_IWR1(IWR_ENABLE_ALL); | ||
83 | # ifdef CONFIG_BF54x | ||
84 | bfin_write_SIC_IWR2(IWR_ENABLE_ALL); | ||
85 | # endif | ||
86 | #else | 77 | #else |
87 | bfin_write_SIC_IWR(IWR_ENABLE_ALL); | 78 | sleep_mode(bfin_sic_iwr[0], bfin_sic_iwr[1], bfin_sic_iwr[2]); |
88 | #endif | 79 | #endif |
89 | 80 | ||
90 | local_irq_restore(flags); | 81 | bfin_pm_restore(); |
91 | } | ||
92 | #endif | ||
93 | 82 | ||
94 | #if defined(CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR) | 83 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) |
95 | sleep_deeper(CONFIG_PM_WAKEUP_SIC_IWR); | ||
96 | # if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) | ||
97 | bfin_write_SIC_IWR0(IWR_ENABLE_ALL); | 84 | bfin_write_SIC_IWR0(IWR_ENABLE_ALL); |
98 | bfin_write_SIC_IWR1(IWR_ENABLE_ALL); | 85 | bfin_write_SIC_IWR1(IWR_ENABLE_ALL); |
99 | # ifdef CONFIG_BF54x | 86 | # ifdef CONFIG_BF54x |
100 | bfin_write_SIC_IWR2(IWR_ENABLE_ALL); | 87 | bfin_write_SIC_IWR2(IWR_ENABLE_ALL); |
101 | # endif | ||
102 | # else | ||
103 | bfin_write_SIC_IWR(IWR_ENABLE_ALL); | ||
104 | # endif | 88 | # endif |
105 | #endif /* CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR */ | 89 | #else |
90 | bfin_write_SIC_IWR(IWR_ENABLE_ALL); | ||
91 | #endif | ||
92 | |||
93 | local_irq_restore(flags); | ||
106 | } | 94 | } |
107 | 95 | ||
108 | /* | 96 | /* |
diff --git a/arch/blackfin/mm/init.c b/arch/blackfin/mm/init.c index eb1a12ac9e33..1f516c55bde6 100644 --- a/arch/blackfin/mm/init.c +++ b/arch/blackfin/mm/init.c | |||
@@ -138,8 +138,7 @@ void __init mem_init(void) | |||
138 | 138 | ||
139 | start_mem = PAGE_ALIGN(start_mem); | 139 | start_mem = PAGE_ALIGN(start_mem); |
140 | max_mapnr = num_physpages = MAP_NR(high_memory); | 140 | max_mapnr = num_physpages = MAP_NR(high_memory); |
141 | printk(KERN_INFO "Kernel managed physical pages: %lu\n", | 141 | printk(KERN_DEBUG "Kernel managed physical pages: %lu\n", num_physpages); |
142 | num_physpages); | ||
143 | 142 | ||
144 | /* This will put all memory onto the freelists. */ | 143 | /* This will put all memory onto the freelists. */ |
145 | totalram_pages = free_all_bootmem(); | 144 | totalram_pages = free_all_bootmem(); |
@@ -153,8 +152,7 @@ void __init mem_init(void) | |||
153 | /* do not count in kernel image between _rambase and _ramstart */ | 152 | /* do not count in kernel image between _rambase and _ramstart */ |
154 | reservedpages -= (_ramstart - _rambase) >> PAGE_SHIFT; | 153 | reservedpages -= (_ramstart - _rambase) >> PAGE_SHIFT; |
155 | #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263) | 154 | #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263) |
156 | reservedpages += (_ramend - memory_end - DMA_UNCACHED_REGION) >> | 155 | reservedpages += (_ramend - memory_end - DMA_UNCACHED_REGION) >> PAGE_SHIFT; |
157 | PAGE_SHIFT; | ||
158 | #endif | 156 | #endif |
159 | 157 | ||
160 | codek = (_etext - _stext) >> 10; | 158 | codek = (_etext - _stext) >> 10; |
@@ -163,11 +161,9 @@ void __init mem_init(void) | |||
163 | 161 | ||
164 | printk(KERN_INFO | 162 | printk(KERN_INFO |
165 | "Memory available: %luk/%luk RAM, " | 163 | "Memory available: %luk/%luk RAM, " |
166 | "(%uk init code, %uk kernel code, " | 164 | "(%uk init code, %uk kernel code, %uk data, %uk dma, %uk reserved)\n", |
167 | "%uk data, %uk dma, %uk reserved)\n", | ||
168 | (unsigned long) freepages << (PAGE_SHIFT-10), _ramend >> 10, | 165 | (unsigned long) freepages << (PAGE_SHIFT-10), _ramend >> 10, |
169 | initk, codek, datak, DMA_UNCACHED_REGION >> 10, | 166 | initk, codek, datak, DMA_UNCACHED_REGION >> 10, (reservedpages << (PAGE_SHIFT-10))); |
170 | (reservedpages << (PAGE_SHIFT-10))); | ||
171 | 167 | ||
172 | /* Initialize the blackfin L1 Memory. */ | 168 | /* Initialize the blackfin L1 Memory. */ |
173 | l1sram_init(); | 169 | l1sram_init(); |