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-rw-r--r--arch/blackfin/Kconfig1
-rw-r--r--arch/blackfin/configs/BF518F-EZBRD_defconfig25
-rw-r--r--arch/blackfin/configs/BF526-EZBRD_defconfig26
-rw-r--r--arch/blackfin/configs/BF527-EZKIT-V2_defconfig27
-rw-r--r--arch/blackfin/configs/BF527-EZKIT_defconfig28
-rw-r--r--arch/blackfin/configs/BF533-EZKIT_defconfig23
-rw-r--r--arch/blackfin/configs/BF533-STAMP_defconfig22
-rw-r--r--arch/blackfin/configs/BF537-STAMP_defconfig27
-rw-r--r--arch/blackfin/configs/BF548-EZKIT_defconfig15
-rw-r--r--arch/blackfin/configs/BF561-EZKIT-SMP_defconfig35
-rw-r--r--arch/blackfin/configs/BF561-EZKIT_defconfig23
-rw-r--r--arch/blackfin/include/asm/atomic.h2
-rw-r--r--arch/blackfin/include/asm/barrier.h48
-rw-r--r--arch/blackfin/include/asm/bfin5xx_spi.h1
-rw-r--r--arch/blackfin/include/asm/bfin_simple_timer.h10
-rw-r--r--arch/blackfin/include/asm/bfin_sport.h3
-rw-r--r--arch/blackfin/include/asm/blackfin.h44
-rw-r--r--arch/blackfin/include/asm/cmpxchg.h132
-rw-r--r--arch/blackfin/include/asm/exec.h1
-rw-r--r--arch/blackfin/include/asm/irq.h4
-rw-r--r--arch/blackfin/include/asm/irq_handler.h1
-rw-r--r--arch/blackfin/include/asm/kgdb.h1
-rw-r--r--arch/blackfin/include/asm/mmu_context.h5
-rw-r--r--arch/blackfin/include/asm/switch_to.h39
-rw-r--r--arch/blackfin/include/asm/system.h197
-rw-r--r--arch/blackfin/include/asm/thread_info.h2
-rw-r--r--arch/blackfin/include/asm/unistd.h4
-rw-r--r--arch/blackfin/kernel/Makefile2
-rw-r--r--arch/blackfin/kernel/asm-offsets.c1
-rw-r--r--arch/blackfin/kernel/bfin_dma.c (renamed from arch/blackfin/kernel/bfin_dma_5xx.c)8
-rw-r--r--arch/blackfin/kernel/cplb-mpu/cplbmgr.c2
-rw-r--r--arch/blackfin/kernel/ipipe.c1
-rw-r--r--arch/blackfin/kernel/kgdb_test.c1
-rw-r--r--arch/blackfin/kernel/process.c5
-rw-r--r--arch/blackfin/kernel/ptrace.c1
-rw-r--r--arch/blackfin/kernel/reboot.c1
-rw-r--r--arch/blackfin/kernel/setup.c1
-rw-r--r--arch/blackfin/kernel/trace.c1
-rw-r--r--arch/blackfin/kernel/traps.c1
-rw-r--r--arch/blackfin/lib/ins.S2
-rw-r--r--arch/blackfin/mach-bf518/boards/ezbrd.c3
-rw-r--r--arch/blackfin/mach-bf518/boards/tcm-bf518.c5
-rw-r--r--arch/blackfin/mach-bf527/boards/ad7160eval.c3
-rw-r--r--arch/blackfin/mach-bf527/boards/cm_bf527.c5
-rw-r--r--arch/blackfin/mach-bf527/boards/ezbrd.c3
-rw-r--r--arch/blackfin/mach-bf527/boards/ezkit.c3
-rw-r--r--arch/blackfin/mach-bf527/boards/tll6527m.c3
-rw-r--r--arch/blackfin/mach-bf537/boards/cm_bf537e.c5
-rw-r--r--arch/blackfin/mach-bf537/boards/cm_bf537u.c5
-rw-r--r--arch/blackfin/mach-bf537/boards/dnp5370.c3
-rw-r--r--arch/blackfin/mach-bf537/boards/pnav10.c6
-rw-r--r--arch/blackfin/mach-bf537/boards/stamp.c27
-rw-r--r--arch/blackfin/mach-bf537/boards/tcm_bf537.c5
-rw-r--r--arch/blackfin/mach-bf548/boards/ezkit.c49
-rw-r--r--arch/blackfin/mach-bf561/atomic.S7
-rw-r--r--arch/blackfin/mach-bf561/include/mach/defBF561.h227
-rw-r--r--arch/blackfin/mach-common/entry.S4
57 files changed, 633 insertions, 503 deletions
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index abe5a9e85148..c1269a1085e1 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -36,6 +36,7 @@ config BLACKFIN
36 select GENERIC_ATOMIC64 36 select GENERIC_ATOMIC64
37 select GENERIC_IRQ_PROBE 37 select GENERIC_IRQ_PROBE
38 select IRQ_PER_CPU if SMP 38 select IRQ_PER_CPU if SMP
39 select HAVE_NMI_WATCHDOG if NMI_WATCHDOG
39 40
40config GENERIC_CSUM 41config GENERIC_CSUM
41 def_bool y 42 def_bool y
diff --git a/arch/blackfin/configs/BF518F-EZBRD_defconfig b/arch/blackfin/configs/BF518F-EZBRD_defconfig
index 0b7039cf07ff..383007877b2b 100644
--- a/arch/blackfin/configs/BF518F-EZBRD_defconfig
+++ b/arch/blackfin/configs/BF518F-EZBRD_defconfig
@@ -4,9 +4,7 @@ CONFIG_IKCONFIG=y
4CONFIG_IKCONFIG_PROC=y 4CONFIG_IKCONFIG_PROC=y
5CONFIG_LOG_BUF_SHIFT=14 5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_BLK_DEV_INITRD=y 6CONFIG_BLK_DEV_INITRD=y
7# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
8CONFIG_EXPERT=y 7CONFIG_EXPERT=y
9# CONFIG_SYSCTL_SYSCALL is not set
10# CONFIG_ELF_CORE is not set 8# CONFIG_ELF_CORE is not set
11# CONFIG_FUTEX is not set 9# CONFIG_FUTEX is not set
12# CONFIG_SIGNALFD is not set 10# CONFIG_SIGNALFD is not set
@@ -35,7 +33,6 @@ CONFIG_C_CDPRIO=y
35CONFIG_BANK_3=0x99B2 33CONFIG_BANK_3=0x99B2
36CONFIG_BINFMT_FLAT=y 34CONFIG_BINFMT_FLAT=y
37CONFIG_BINFMT_ZFLAT=y 35CONFIG_BINFMT_ZFLAT=y
38CONFIG_PM=y
39CONFIG_NET=y 36CONFIG_NET=y
40CONFIG_PACKET=y 37CONFIG_PACKET=y
41CONFIG_UNIX=y 38CONFIG_UNIX=y
@@ -51,7 +48,6 @@ CONFIG_IP_PNP=y
51CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 48CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
52# CONFIG_FW_LOADER is not set 49# CONFIG_FW_LOADER is not set
53CONFIG_MTD=y 50CONFIG_MTD=y
54CONFIG_MTD_PARTITIONS=y
55CONFIG_MTD_CHAR=y 51CONFIG_MTD_CHAR=y
56CONFIG_MTD_BLOCK=y 52CONFIG_MTD_BLOCK=y
57CONFIG_MTD_JEDECPROBE=m 53CONFIG_MTD_JEDECPROBE=m
@@ -60,20 +56,28 @@ CONFIG_MTD_ROM=m
60CONFIG_MTD_COMPLEX_MAPPINGS=y 56CONFIG_MTD_COMPLEX_MAPPINGS=y
61CONFIG_BLK_DEV_RAM=y 57CONFIG_BLK_DEV_RAM=y
62CONFIG_NETDEVICES=y 58CONFIG_NETDEVICES=y
63CONFIG_NET_ETHERNET=y 59CONFIG_NET_BFIN=y
64CONFIG_BFIN_MAC=y 60CONFIG_BFIN_MAC=y
65# CONFIG_NETDEV_1000 is not set 61# CONFIG_NET_VENDOR_BROADCOM is not set
66# CONFIG_NETDEV_10000 is not set 62# CONFIG_NET_VENDOR_CHELSIO is not set
63# CONFIG_NET_VENDOR_INTEL is not set
64# CONFIG_NET_VENDOR_MARVELL is not set
65# CONFIG_NET_VENDOR_MICREL is not set
66# CONFIG_NET_VENDOR_MICROCHIP is not set
67# CONFIG_NET_VENDOR_NATSEMI is not set
68# CONFIG_NET_VENDOR_SEEQ is not set
69# CONFIG_NET_VENDOR_SMSC is not set
70# CONFIG_NET_VENDOR_STMICRO is not set
67# CONFIG_WLAN is not set 71# CONFIG_WLAN is not set
68# CONFIG_INPUT is not set 72# CONFIG_INPUT is not set
69# CONFIG_SERIO is not set 73# CONFIG_SERIO is not set
70# CONFIG_VT is not set 74# CONFIG_VT is not set
71# CONFIG_DEVKMEM is not set 75# CONFIG_LEGACY_PTYS is not set
72CONFIG_BFIN_JTAG_COMM=m 76CONFIG_BFIN_JTAG_COMM=m
77# CONFIG_DEVKMEM is not set
73CONFIG_SERIAL_BFIN=y 78CONFIG_SERIAL_BFIN=y
74CONFIG_SERIAL_BFIN_CONSOLE=y 79CONFIG_SERIAL_BFIN_CONSOLE=y
75CONFIG_SERIAL_BFIN_UART0=y 80CONFIG_SERIAL_BFIN_UART0=y
76# CONFIG_LEGACY_PTYS is not set
77# CONFIG_HW_RANDOM is not set 81# CONFIG_HW_RANDOM is not set
78CONFIG_I2C=y 82CONFIG_I2C=y
79CONFIG_I2C_CHARDEV=y 83CONFIG_I2C_CHARDEV=y
@@ -97,16 +101,13 @@ CONFIG_EXT2_FS=m
97CONFIG_VFAT_FS=m 101CONFIG_VFAT_FS=m
98CONFIG_NFS_FS=m 102CONFIG_NFS_FS=m
99CONFIG_NFS_V3=y 103CONFIG_NFS_V3=y
100CONFIG_SMB_FS=m
101CONFIG_NLS_CODEPAGE_437=m 104CONFIG_NLS_CODEPAGE_437=m
102CONFIG_NLS_CODEPAGE_936=m 105CONFIG_NLS_CODEPAGE_936=m
103CONFIG_NLS_ISO8859_1=m 106CONFIG_NLS_ISO8859_1=m
104CONFIG_NLS_UTF8=m 107CONFIG_NLS_UTF8=m
105CONFIG_DEBUG_KERNEL=y
106CONFIG_DEBUG_SHIRQ=y 108CONFIG_DEBUG_SHIRQ=y
107CONFIG_DETECT_HUNG_TASK=y 109CONFIG_DETECT_HUNG_TASK=y
108CONFIG_DEBUG_INFO=y 110CONFIG_DEBUG_INFO=y
109# CONFIG_RCU_CPU_STALL_DETECTOR is not set
110# CONFIG_FTRACE is not set 111# CONFIG_FTRACE is not set
111CONFIG_DEBUG_MMRS=y 112CONFIG_DEBUG_MMRS=y
112CONFIG_DEBUG_HWERR=y 113CONFIG_DEBUG_HWERR=y
diff --git a/arch/blackfin/configs/BF526-EZBRD_defconfig b/arch/blackfin/configs/BF526-EZBRD_defconfig
index 5553205d7cbe..2f2c6acf210c 100644
--- a/arch/blackfin/configs/BF526-EZBRD_defconfig
+++ b/arch/blackfin/configs/BF526-EZBRD_defconfig
@@ -4,9 +4,7 @@ CONFIG_IKCONFIG=y
4CONFIG_IKCONFIG_PROC=y 4CONFIG_IKCONFIG_PROC=y
5CONFIG_LOG_BUF_SHIFT=14 5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_BLK_DEV_INITRD=y 6CONFIG_BLK_DEV_INITRD=y
7# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
8CONFIG_EXPERT=y 7CONFIG_EXPERT=y
9# CONFIG_SYSCTL_SYSCALL is not set
10# CONFIG_ELF_CORE is not set 8# CONFIG_ELF_CORE is not set
11# CONFIG_FUTEX is not set 9# CONFIG_FUTEX is not set
12# CONFIG_SIGNALFD is not set 10# CONFIG_SIGNALFD is not set
@@ -40,7 +38,6 @@ CONFIG_C_CDPRIO=y
40CONFIG_BANK_3=0x99B2 38CONFIG_BANK_3=0x99B2
41CONFIG_BINFMT_FLAT=y 39CONFIG_BINFMT_FLAT=y
42CONFIG_BINFMT_ZFLAT=y 40CONFIG_BINFMT_ZFLAT=y
43CONFIG_PM=y
44CONFIG_NET=y 41CONFIG_NET=y
45CONFIG_PACKET=y 42CONFIG_PACKET=y
46CONFIG_UNIX=y 43CONFIG_UNIX=y
@@ -56,7 +53,6 @@ CONFIG_IP_PNP=y
56CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 53CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
57# CONFIG_FW_LOADER is not set 54# CONFIG_FW_LOADER is not set
58CONFIG_MTD=y 55CONFIG_MTD=y
59CONFIG_MTD_PARTITIONS=y
60CONFIG_MTD_CHAR=y 56CONFIG_MTD_CHAR=y
61CONFIG_MTD_BLOCK=y 57CONFIG_MTD_BLOCK=y
62CONFIG_MTD_CFI=y 58CONFIG_MTD_CFI=y
@@ -74,10 +70,18 @@ CONFIG_BLK_DEV_SD=y
74CONFIG_BLK_DEV_SR=m 70CONFIG_BLK_DEV_SR=m
75# CONFIG_SCSI_LOWLEVEL is not set 71# CONFIG_SCSI_LOWLEVEL is not set
76CONFIG_NETDEVICES=y 72CONFIG_NETDEVICES=y
77CONFIG_NET_ETHERNET=y 73CONFIG_NET_BFIN=y
78CONFIG_BFIN_MAC=y 74CONFIG_BFIN_MAC=y
79# CONFIG_NETDEV_1000 is not set 75# CONFIG_NET_VENDOR_BROADCOM is not set
80# CONFIG_NETDEV_10000 is not set 76# CONFIG_NET_VENDOR_CHELSIO is not set
77# CONFIG_NET_VENDOR_INTEL is not set
78# CONFIG_NET_VENDOR_MARVELL is not set
79# CONFIG_NET_VENDOR_MICREL is not set
80# CONFIG_NET_VENDOR_MICROCHIP is not set
81# CONFIG_NET_VENDOR_NATSEMI is not set
82# CONFIG_NET_VENDOR_SEEQ is not set
83# CONFIG_NET_VENDOR_SMSC is not set
84# CONFIG_NET_VENDOR_STMICRO is not set
81# CONFIG_WLAN is not set 85# CONFIG_WLAN is not set
82CONFIG_INPUT_FF_MEMLESS=m 86CONFIG_INPUT_FF_MEMLESS=m
83# CONFIG_INPUT_MOUSEDEV is not set 87# CONFIG_INPUT_MOUSEDEV is not set
@@ -85,12 +89,12 @@ CONFIG_INPUT_FF_MEMLESS=m
85# CONFIG_INPUT_MOUSE is not set 89# CONFIG_INPUT_MOUSE is not set
86CONFIG_INPUT_MISC=y 90CONFIG_INPUT_MISC=y
87# CONFIG_SERIO is not set 91# CONFIG_SERIO is not set
88# CONFIG_DEVKMEM is not set 92# CONFIG_LEGACY_PTYS is not set
89CONFIG_BFIN_JTAG_COMM=m 93CONFIG_BFIN_JTAG_COMM=m
94# CONFIG_DEVKMEM is not set
90CONFIG_SERIAL_BFIN=y 95CONFIG_SERIAL_BFIN=y
91CONFIG_SERIAL_BFIN_CONSOLE=y 96CONFIG_SERIAL_BFIN_CONSOLE=y
92CONFIG_SERIAL_BFIN_UART1=y 97CONFIG_SERIAL_BFIN_UART1=y
93# CONFIG_LEGACY_PTYS is not set
94# CONFIG_HW_RANDOM is not set 98# CONFIG_HW_RANDOM is not set
95CONFIG_I2C=y 99CONFIG_I2C=y
96CONFIG_I2C_CHARDEV=m 100CONFIG_I2C_CHARDEV=m
@@ -123,7 +127,6 @@ CONFIG_USB_DEVICEFS=y
123# CONFIG_USB_DEVICE_CLASS is not set 127# CONFIG_USB_DEVICE_CLASS is not set
124CONFIG_USB_OTG_BLACKLIST_HUB=y 128CONFIG_USB_OTG_BLACKLIST_HUB=y
125CONFIG_USB_MON=y 129CONFIG_USB_MON=y
126CONFIG_USB_MUSB_HDRC=y
127CONFIG_USB_STORAGE=y 130CONFIG_USB_STORAGE=y
128CONFIG_RTC_CLASS=y 131CONFIG_RTC_CLASS=y
129CONFIG_RTC_DRV_BFIN=y 132CONFIG_RTC_DRV_BFIN=y
@@ -135,16 +138,13 @@ CONFIG_VFAT_FS=m
135CONFIG_JFFS2_FS=m 138CONFIG_JFFS2_FS=m
136CONFIG_NFS_FS=m 139CONFIG_NFS_FS=m
137CONFIG_NFS_V3=y 140CONFIG_NFS_V3=y
138CONFIG_SMB_FS=m
139CONFIG_NLS_CODEPAGE_437=m 141CONFIG_NLS_CODEPAGE_437=m
140CONFIG_NLS_CODEPAGE_936=m 142CONFIG_NLS_CODEPAGE_936=m
141CONFIG_NLS_ISO8859_1=m 143CONFIG_NLS_ISO8859_1=m
142CONFIG_NLS_UTF8=m 144CONFIG_NLS_UTF8=m
143CONFIG_DEBUG_KERNEL=y
144CONFIG_DEBUG_SHIRQ=y 145CONFIG_DEBUG_SHIRQ=y
145CONFIG_DETECT_HUNG_TASK=y 146CONFIG_DETECT_HUNG_TASK=y
146CONFIG_DEBUG_INFO=y 147CONFIG_DEBUG_INFO=y
147# CONFIG_RCU_CPU_STALL_DETECTOR is not set
148# CONFIG_FTRACE is not set 148# CONFIG_FTRACE is not set
149CONFIG_DEBUG_MMRS=y 149CONFIG_DEBUG_MMRS=y
150CONFIG_DEBUG_HWERR=y 150CONFIG_DEBUG_HWERR=y
diff --git a/arch/blackfin/configs/BF527-EZKIT-V2_defconfig b/arch/blackfin/configs/BF527-EZKIT-V2_defconfig
index 498f64a87050..91535c38e7f2 100644
--- a/arch/blackfin/configs/BF527-EZKIT-V2_defconfig
+++ b/arch/blackfin/configs/BF527-EZKIT-V2_defconfig
@@ -4,9 +4,7 @@ CONFIG_IKCONFIG=y
4CONFIG_IKCONFIG_PROC=y 4CONFIG_IKCONFIG_PROC=y
5CONFIG_LOG_BUF_SHIFT=14 5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_BLK_DEV_INITRD=y 6CONFIG_BLK_DEV_INITRD=y
7# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
8CONFIG_EXPERT=y 7CONFIG_EXPERT=y
9# CONFIG_SYSCTL_SYSCALL is not set
10# CONFIG_ELF_CORE is not set 8# CONFIG_ELF_CORE is not set
11# CONFIG_FUTEX is not set 9# CONFIG_FUTEX is not set
12# CONFIG_SIGNALFD is not set 10# CONFIG_SIGNALFD is not set
@@ -39,7 +37,6 @@ CONFIG_C_CDPRIO=y
39CONFIG_BANK_3=0x99B2 37CONFIG_BANK_3=0x99B2
40CONFIG_BINFMT_FLAT=y 38CONFIG_BINFMT_FLAT=y
41CONFIG_BINFMT_ZFLAT=y 39CONFIG_BINFMT_ZFLAT=y
42CONFIG_PM=y
43CONFIG_NET=y 40CONFIG_NET=y
44CONFIG_PACKET=y 41CONFIG_PACKET=y
45CONFIG_UNIX=y 42CONFIG_UNIX=y
@@ -61,7 +58,6 @@ CONFIG_BFIN_SIR0=y
61CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 58CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
62# CONFIG_FW_LOADER is not set 59# CONFIG_FW_LOADER is not set
63CONFIG_MTD=y 60CONFIG_MTD=y
64CONFIG_MTD_PARTITIONS=y
65CONFIG_MTD_CHAR=m 61CONFIG_MTD_CHAR=m
66CONFIG_MTD_BLOCK=y 62CONFIG_MTD_BLOCK=y
67CONFIG_MTD_JEDECPROBE=m 63CONFIG_MTD_JEDECPROBE=m
@@ -77,10 +73,18 @@ CONFIG_BLK_DEV_SD=y
77CONFIG_BLK_DEV_SR=m 73CONFIG_BLK_DEV_SR=m
78# CONFIG_SCSI_LOWLEVEL is not set 74# CONFIG_SCSI_LOWLEVEL is not set
79CONFIG_NETDEVICES=y 75CONFIG_NETDEVICES=y
80CONFIG_NET_ETHERNET=y 76CONFIG_NET_BFIN=y
81CONFIG_BFIN_MAC=y 77CONFIG_BFIN_MAC=y
82# CONFIG_NETDEV_1000 is not set 78# CONFIG_NET_VENDOR_BROADCOM is not set
83# CONFIG_NETDEV_10000 is not set 79# CONFIG_NET_VENDOR_CHELSIO is not set
80# CONFIG_NET_VENDOR_INTEL is not set
81# CONFIG_NET_VENDOR_MARVELL is not set
82# CONFIG_NET_VENDOR_MICREL is not set
83# CONFIG_NET_VENDOR_MICROCHIP is not set
84# CONFIG_NET_VENDOR_NATSEMI is not set
85# CONFIG_NET_VENDOR_SEEQ is not set
86# CONFIG_NET_VENDOR_SMSC is not set
87# CONFIG_NET_VENDOR_STMICRO is not set
84# CONFIG_WLAN is not set 88# CONFIG_WLAN is not set
85CONFIG_INPUT_FF_MEMLESS=m 89CONFIG_INPUT_FF_MEMLESS=m
86# CONFIG_INPUT_MOUSEDEV is not set 90# CONFIG_INPUT_MOUSEDEV is not set
@@ -93,12 +97,12 @@ CONFIG_TOUCHSCREEN_AD7879=y
93CONFIG_TOUCHSCREEN_AD7879_I2C=y 97CONFIG_TOUCHSCREEN_AD7879_I2C=y
94CONFIG_INPUT_MISC=y 98CONFIG_INPUT_MISC=y
95# CONFIG_SERIO is not set 99# CONFIG_SERIO is not set
96# CONFIG_DEVKMEM is not set 100# CONFIG_LEGACY_PTYS is not set
97CONFIG_BFIN_JTAG_COMM=m 101CONFIG_BFIN_JTAG_COMM=m
102# CONFIG_DEVKMEM is not set
98CONFIG_SERIAL_BFIN=y 103CONFIG_SERIAL_BFIN=y
99CONFIG_SERIAL_BFIN_CONSOLE=y 104CONFIG_SERIAL_BFIN_CONSOLE=y
100CONFIG_SERIAL_BFIN_UART1=y 105CONFIG_SERIAL_BFIN_UART1=y
101# CONFIG_LEGACY_PTYS is not set
102# CONFIG_HW_RANDOM is not set 106# CONFIG_HW_RANDOM is not set
103CONFIG_I2C=y 107CONFIG_I2C=y
104CONFIG_I2C_CHARDEV=m 108CONFIG_I2C_CHARDEV=m
@@ -148,7 +152,9 @@ CONFIG_USB_DEVICEFS=y
148CONFIG_USB_OTG_BLACKLIST_HUB=y 152CONFIG_USB_OTG_BLACKLIST_HUB=y
149CONFIG_USB_MON=y 153CONFIG_USB_MON=y
150CONFIG_USB_MUSB_HDRC=y 154CONFIG_USB_MUSB_HDRC=y
155CONFIG_USB_MUSB_BLACKFIN=y
151CONFIG_USB_STORAGE=y 156CONFIG_USB_STORAGE=y
157CONFIG_USB_GADGET=y
152CONFIG_NEW_LEDS=y 158CONFIG_NEW_LEDS=y
153CONFIG_LEDS_CLASS=y 159CONFIG_LEDS_CLASS=y
154CONFIG_LEDS_ADP5520=y 160CONFIG_LEDS_ADP5520=y
@@ -163,16 +169,13 @@ CONFIG_VFAT_FS=m
163CONFIG_JFFS2_FS=m 169CONFIG_JFFS2_FS=m
164CONFIG_NFS_FS=m 170CONFIG_NFS_FS=m
165CONFIG_NFS_V3=y 171CONFIG_NFS_V3=y
166CONFIG_SMB_FS=m
167CONFIG_NLS_CODEPAGE_437=m 172CONFIG_NLS_CODEPAGE_437=m
168CONFIG_NLS_CODEPAGE_936=m 173CONFIG_NLS_CODEPAGE_936=m
169CONFIG_NLS_ISO8859_1=m 174CONFIG_NLS_ISO8859_1=m
170CONFIG_NLS_UTF8=m 175CONFIG_NLS_UTF8=m
171CONFIG_DEBUG_KERNEL=y
172CONFIG_DEBUG_SHIRQ=y 176CONFIG_DEBUG_SHIRQ=y
173CONFIG_DETECT_HUNG_TASK=y 177CONFIG_DETECT_HUNG_TASK=y
174CONFIG_DEBUG_INFO=y 178CONFIG_DEBUG_INFO=y
175# CONFIG_RCU_CPU_STALL_DETECTOR is not set
176# CONFIG_FTRACE is not set 179# CONFIG_FTRACE is not set
177CONFIG_DEBUG_MMRS=y 180CONFIG_DEBUG_MMRS=y
178CONFIG_DEBUG_HWERR=y 181CONFIG_DEBUG_HWERR=y
diff --git a/arch/blackfin/configs/BF527-EZKIT_defconfig b/arch/blackfin/configs/BF527-EZKIT_defconfig
index 72e0317565ef..9ccc18a6b4df 100644
--- a/arch/blackfin/configs/BF527-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF527-EZKIT_defconfig
@@ -4,9 +4,7 @@ CONFIG_IKCONFIG=y
4CONFIG_IKCONFIG_PROC=y 4CONFIG_IKCONFIG_PROC=y
5CONFIG_LOG_BUF_SHIFT=14 5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_BLK_DEV_INITRD=y 6CONFIG_BLK_DEV_INITRD=y
7# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
8CONFIG_EXPERT=y 7CONFIG_EXPERT=y
9# CONFIG_SYSCTL_SYSCALL is not set
10# CONFIG_ELF_CORE is not set 8# CONFIG_ELF_CORE is not set
11# CONFIG_FUTEX is not set 9# CONFIG_FUTEX is not set
12# CONFIG_SIGNALFD is not set 10# CONFIG_SIGNALFD is not set
@@ -38,7 +36,6 @@ CONFIG_C_CDPRIO=y
38CONFIG_BANK_3=0x99B2 36CONFIG_BANK_3=0x99B2
39CONFIG_BINFMT_FLAT=y 37CONFIG_BINFMT_FLAT=y
40CONFIG_BINFMT_ZFLAT=y 38CONFIG_BINFMT_ZFLAT=y
41CONFIG_PM=y
42CONFIG_NET=y 39CONFIG_NET=y
43CONFIG_PACKET=y 40CONFIG_PACKET=y
44CONFIG_UNIX=y 41CONFIG_UNIX=y
@@ -60,7 +57,6 @@ CONFIG_BFIN_SIR0=y
60CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 57CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
61# CONFIG_FW_LOADER is not set 58# CONFIG_FW_LOADER is not set
62CONFIG_MTD=y 59CONFIG_MTD=y
63CONFIG_MTD_PARTITIONS=y
64CONFIG_MTD_CHAR=m 60CONFIG_MTD_CHAR=m
65CONFIG_MTD_BLOCK=y 61CONFIG_MTD_BLOCK=y
66CONFIG_MTD_JEDECPROBE=m 62CONFIG_MTD_JEDECPROBE=m
@@ -76,10 +72,18 @@ CONFIG_BLK_DEV_SD=y
76CONFIG_BLK_DEV_SR=m 72CONFIG_BLK_DEV_SR=m
77# CONFIG_SCSI_LOWLEVEL is not set 73# CONFIG_SCSI_LOWLEVEL is not set
78CONFIG_NETDEVICES=y 74CONFIG_NETDEVICES=y
79CONFIG_NET_ETHERNET=y 75CONFIG_NET_BFIN=y
80CONFIG_BFIN_MAC=y 76CONFIG_BFIN_MAC=y
81# CONFIG_NETDEV_1000 is not set 77# CONFIG_NET_VENDOR_BROADCOM is not set
82# CONFIG_NETDEV_10000 is not set 78# CONFIG_NET_VENDOR_CHELSIO is not set
79# CONFIG_NET_VENDOR_INTEL is not set
80# CONFIG_NET_VENDOR_MARVELL is not set
81# CONFIG_NET_VENDOR_MICREL is not set
82# CONFIG_NET_VENDOR_MICROCHIP is not set
83# CONFIG_NET_VENDOR_NATSEMI is not set
84# CONFIG_NET_VENDOR_SEEQ is not set
85# CONFIG_NET_VENDOR_SMSC is not set
86# CONFIG_NET_VENDOR_STMICRO is not set
83# CONFIG_WLAN is not set 87# CONFIG_WLAN is not set
84CONFIG_INPUT_FF_MEMLESS=m 88CONFIG_INPUT_FF_MEMLESS=m
85# CONFIG_INPUT_MOUSEDEV is not set 89# CONFIG_INPUT_MOUSEDEV is not set
@@ -87,12 +91,12 @@ CONFIG_INPUT_FF_MEMLESS=m
87# CONFIG_INPUT_MOUSE is not set 91# CONFIG_INPUT_MOUSE is not set
88CONFIG_INPUT_MISC=y 92CONFIG_INPUT_MISC=y
89# CONFIG_SERIO is not set 93# CONFIG_SERIO is not set
90# CONFIG_DEVKMEM is not set 94# CONFIG_LEGACY_PTYS is not set
91CONFIG_BFIN_JTAG_COMM=m 95CONFIG_BFIN_JTAG_COMM=m
96# CONFIG_DEVKMEM is not set
92CONFIG_SERIAL_BFIN=y 97CONFIG_SERIAL_BFIN=y
93CONFIG_SERIAL_BFIN_CONSOLE=y 98CONFIG_SERIAL_BFIN_CONSOLE=y
94CONFIG_SERIAL_BFIN_UART1=y 99CONFIG_SERIAL_BFIN_UART1=y
95# CONFIG_LEGACY_PTYS is not set
96# CONFIG_HW_RANDOM is not set 100# CONFIG_HW_RANDOM is not set
97CONFIG_I2C=y 101CONFIG_I2C=y
98CONFIG_I2C_CHARDEV=m 102CONFIG_I2C_CHARDEV=m
@@ -142,8 +146,9 @@ CONFIG_USB_DEVICEFS=y
142CONFIG_USB_OTG_BLACKLIST_HUB=y 146CONFIG_USB_OTG_BLACKLIST_HUB=y
143CONFIG_USB_MON=y 147CONFIG_USB_MON=y
144CONFIG_USB_MUSB_HDRC=y 148CONFIG_USB_MUSB_HDRC=y
145CONFIG_MUSB_PIO_ONLY=y 149CONFIG_USB_MUSB_BLACKFIN=y
146CONFIG_USB_STORAGE=y 150CONFIG_USB_STORAGE=y
151CONFIG_USB_GADGET=y
147CONFIG_RTC_CLASS=y 152CONFIG_RTC_CLASS=y
148CONFIG_RTC_DRV_BFIN=y 153CONFIG_RTC_DRV_BFIN=y
149CONFIG_EXT2_FS=m 154CONFIG_EXT2_FS=m
@@ -155,16 +160,13 @@ CONFIG_VFAT_FS=m
155CONFIG_JFFS2_FS=m 160CONFIG_JFFS2_FS=m
156CONFIG_NFS_FS=m 161CONFIG_NFS_FS=m
157CONFIG_NFS_V3=y 162CONFIG_NFS_V3=y
158CONFIG_SMB_FS=m
159CONFIG_NLS_CODEPAGE_437=m 163CONFIG_NLS_CODEPAGE_437=m
160CONFIG_NLS_CODEPAGE_936=m 164CONFIG_NLS_CODEPAGE_936=m
161CONFIG_NLS_ISO8859_1=m 165CONFIG_NLS_ISO8859_1=m
162CONFIG_NLS_UTF8=m 166CONFIG_NLS_UTF8=m
163CONFIG_DEBUG_KERNEL=y
164CONFIG_DEBUG_SHIRQ=y 167CONFIG_DEBUG_SHIRQ=y
165CONFIG_DETECT_HUNG_TASK=y 168CONFIG_DETECT_HUNG_TASK=y
166CONFIG_DEBUG_INFO=y 169CONFIG_DEBUG_INFO=y
167# CONFIG_RCU_CPU_STALL_DETECTOR is not set
168# CONFIG_FTRACE is not set 170# CONFIG_FTRACE is not set
169CONFIG_DEBUG_MMRS=y 171CONFIG_DEBUG_MMRS=y
170CONFIG_DEBUG_HWERR=y 172CONFIG_DEBUG_HWERR=y
diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig
index 2f075e0b2624..127f20df75a0 100644
--- a/arch/blackfin/configs/BF533-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF533-EZKIT_defconfig
@@ -4,9 +4,7 @@ CONFIG_IKCONFIG=y
4CONFIG_IKCONFIG_PROC=y 4CONFIG_IKCONFIG_PROC=y
5CONFIG_LOG_BUF_SHIFT=14 5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_BLK_DEV_INITRD=y 6CONFIG_BLK_DEV_INITRD=y
7# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
8CONFIG_EXPERT=y 7CONFIG_EXPERT=y
9# CONFIG_SYSCTL_SYSCALL is not set
10# CONFIG_ELF_CORE is not set 8# CONFIG_ELF_CORE is not set
11# CONFIG_FUTEX is not set 9# CONFIG_FUTEX is not set
12# CONFIG_SIGNALFD is not set 10# CONFIG_SIGNALFD is not set
@@ -32,7 +30,6 @@ CONFIG_C_CDPRIO=y
32CONFIG_BANK_3=0xAAC2 30CONFIG_BANK_3=0xAAC2
33CONFIG_BINFMT_FLAT=y 31CONFIG_BINFMT_FLAT=y
34CONFIG_BINFMT_ZFLAT=y 32CONFIG_BINFMT_ZFLAT=y
35CONFIG_PM=y
36CONFIG_NET=y 33CONFIG_NET=y
37CONFIG_PACKET=y 34CONFIG_PACKET=y
38CONFIG_UNIX=y 35CONFIG_UNIX=y
@@ -53,7 +50,6 @@ CONFIG_IRTTY_SIR=m
53CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 50CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
54# CONFIG_FW_LOADER is not set 51# CONFIG_FW_LOADER is not set
55CONFIG_MTD=y 52CONFIG_MTD=y
56CONFIG_MTD_PARTITIONS=y
57CONFIG_MTD_CHAR=m 53CONFIG_MTD_CHAR=m
58CONFIG_MTD_BLOCK=y 54CONFIG_MTD_BLOCK=y
59CONFIG_MTD_JEDECPROBE=m 55CONFIG_MTD_JEDECPROBE=m
@@ -62,10 +58,16 @@ CONFIG_MTD_ROM=m
62CONFIG_MTD_COMPLEX_MAPPINGS=y 58CONFIG_MTD_COMPLEX_MAPPINGS=y
63CONFIG_BLK_DEV_RAM=y 59CONFIG_BLK_DEV_RAM=y
64CONFIG_NETDEVICES=y 60CONFIG_NETDEVICES=y
65CONFIG_NET_ETHERNET=y 61# CONFIG_NET_VENDOR_BROADCOM is not set
62# CONFIG_NET_VENDOR_CHELSIO is not set
63# CONFIG_NET_VENDOR_INTEL is not set
64# CONFIG_NET_VENDOR_MARVELL is not set
65# CONFIG_NET_VENDOR_MICREL is not set
66# CONFIG_NET_VENDOR_MICROCHIP is not set
67# CONFIG_NET_VENDOR_NATSEMI is not set
68# CONFIG_NET_VENDOR_SEEQ is not set
66CONFIG_SMC91X=y 69CONFIG_SMC91X=y
67# CONFIG_NETDEV_1000 is not set 70# CONFIG_NET_VENDOR_STMICRO is not set
68# CONFIG_NETDEV_10000 is not set
69# CONFIG_WLAN is not set 71# CONFIG_WLAN is not set
70CONFIG_INPUT=m 72CONFIG_INPUT=m
71# CONFIG_INPUT_MOUSEDEV is not set 73# CONFIG_INPUT_MOUSEDEV is not set
@@ -74,11 +76,11 @@ CONFIG_INPUT_EVDEV=m
74# CONFIG_INPUT_MOUSE is not set 76# CONFIG_INPUT_MOUSE is not set
75# CONFIG_SERIO is not set 77# CONFIG_SERIO is not set
76# CONFIG_VT is not set 78# CONFIG_VT is not set
77# CONFIG_DEVKMEM is not set 79# CONFIG_LEGACY_PTYS is not set
78CONFIG_BFIN_JTAG_COMM=m 80CONFIG_BFIN_JTAG_COMM=m
81# CONFIG_DEVKMEM is not set
79CONFIG_SERIAL_BFIN=y 82CONFIG_SERIAL_BFIN=y
80CONFIG_SERIAL_BFIN_CONSOLE=y 83CONFIG_SERIAL_BFIN_CONSOLE=y
81# CONFIG_LEGACY_PTYS is not set
82# CONFIG_HW_RANDOM is not set 84# CONFIG_HW_RANDOM is not set
83CONFIG_SPI=y 85CONFIG_SPI=y
84CONFIG_SPI_BFIN5XX=y 86CONFIG_SPI_BFIN5XX=y
@@ -94,12 +96,9 @@ CONFIG_RTC_DRV_BFIN=y
94CONFIG_JFFS2_FS=m 96CONFIG_JFFS2_FS=m
95CONFIG_NFS_FS=m 97CONFIG_NFS_FS=m
96CONFIG_NFS_V3=y 98CONFIG_NFS_V3=y
97CONFIG_SMB_FS=m
98CONFIG_DEBUG_KERNEL=y
99CONFIG_DEBUG_SHIRQ=y 99CONFIG_DEBUG_SHIRQ=y
100CONFIG_DETECT_HUNG_TASK=y 100CONFIG_DETECT_HUNG_TASK=y
101CONFIG_DEBUG_INFO=y 101CONFIG_DEBUG_INFO=y
102# CONFIG_RCU_CPU_STALL_DETECTOR is not set
103# CONFIG_FTRACE is not set 102# CONFIG_FTRACE is not set
104CONFIG_DEBUG_MMRS=y 103CONFIG_DEBUG_MMRS=y
105CONFIG_DEBUG_HWERR=y 104CONFIG_DEBUG_HWERR=y
diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig
index ab38a82597b2..0df2f921f7e5 100644
--- a/arch/blackfin/configs/BF533-STAMP_defconfig
+++ b/arch/blackfin/configs/BF533-STAMP_defconfig
@@ -4,9 +4,7 @@ CONFIG_IKCONFIG=y
4CONFIG_IKCONFIG_PROC=y 4CONFIG_IKCONFIG_PROC=y
5CONFIG_LOG_BUF_SHIFT=14 5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_BLK_DEV_INITRD=y 6CONFIG_BLK_DEV_INITRD=y
7# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
8CONFIG_EXPERT=y 7CONFIG_EXPERT=y
9# CONFIG_SYSCTL_SYSCALL is not set
10# CONFIG_ELF_CORE is not set 8# CONFIG_ELF_CORE is not set
11# CONFIG_FUTEX is not set 9# CONFIG_FUTEX is not set
12# CONFIG_SIGNALFD is not set 10# CONFIG_SIGNALFD is not set
@@ -30,7 +28,6 @@ CONFIG_C_CDPRIO=y
30CONFIG_BANK_3=0xAAC2 28CONFIG_BANK_3=0xAAC2
31CONFIG_BINFMT_FLAT=y 29CONFIG_BINFMT_FLAT=y
32CONFIG_BINFMT_ZFLAT=y 30CONFIG_BINFMT_ZFLAT=y
33CONFIG_PM=y
34CONFIG_NET=y 31CONFIG_NET=y
35CONFIG_PACKET=y 32CONFIG_PACKET=y
36CONFIG_UNIX=y 33CONFIG_UNIX=y
@@ -62,10 +59,16 @@ CONFIG_MTD_ROM=m
62CONFIG_MTD_COMPLEX_MAPPINGS=y 59CONFIG_MTD_COMPLEX_MAPPINGS=y
63CONFIG_BLK_DEV_RAM=y 60CONFIG_BLK_DEV_RAM=y
64CONFIG_NETDEVICES=y 61CONFIG_NETDEVICES=y
65CONFIG_NET_ETHERNET=y 62# CONFIG_NET_VENDOR_BROADCOM is not set
63# CONFIG_NET_VENDOR_CHELSIO is not set
64# CONFIG_NET_VENDOR_INTEL is not set
65# CONFIG_NET_VENDOR_MARVELL is not set
66# CONFIG_NET_VENDOR_MICREL is not set
67# CONFIG_NET_VENDOR_MICROCHIP is not set
68# CONFIG_NET_VENDOR_NATSEMI is not set
69# CONFIG_NET_VENDOR_SEEQ is not set
66CONFIG_SMC91X=y 70CONFIG_SMC91X=y
67# CONFIG_NETDEV_1000 is not set 71# CONFIG_NET_VENDOR_STMICRO is not set
68# CONFIG_NETDEV_10000 is not set
69# CONFIG_WLAN is not set 72# CONFIG_WLAN is not set
70# CONFIG_INPUT_MOUSEDEV is not set 73# CONFIG_INPUT_MOUSEDEV is not set
71CONFIG_INPUT_EVDEV=m 74CONFIG_INPUT_EVDEV=m
@@ -74,11 +77,11 @@ CONFIG_INPUT_EVDEV=m
74CONFIG_INPUT_MISC=y 77CONFIG_INPUT_MISC=y
75# CONFIG_SERIO is not set 78# CONFIG_SERIO is not set
76# CONFIG_VT is not set 79# CONFIG_VT is not set
77# CONFIG_DEVKMEM is not set 80# CONFIG_LEGACY_PTYS is not set
78CONFIG_BFIN_JTAG_COMM=m 81CONFIG_BFIN_JTAG_COMM=m
82# CONFIG_DEVKMEM is not set
79CONFIG_SERIAL_BFIN=y 83CONFIG_SERIAL_BFIN=y
80CONFIG_SERIAL_BFIN_CONSOLE=y 84CONFIG_SERIAL_BFIN_CONSOLE=y
81# CONFIG_LEGACY_PTYS is not set
82# CONFIG_HW_RANDOM is not set 85# CONFIG_HW_RANDOM is not set
83CONFIG_I2C=m 86CONFIG_I2C=m
84CONFIG_I2C_CHARDEV=m 87CONFIG_I2C_CHARDEV=m
@@ -106,12 +109,9 @@ CONFIG_RTC_DRV_BFIN=y
106CONFIG_JFFS2_FS=m 109CONFIG_JFFS2_FS=m
107CONFIG_NFS_FS=m 110CONFIG_NFS_FS=m
108CONFIG_NFS_V3=y 111CONFIG_NFS_V3=y
109CONFIG_SMB_FS=m
110CONFIG_DEBUG_KERNEL=y
111CONFIG_DEBUG_SHIRQ=y 112CONFIG_DEBUG_SHIRQ=y
112CONFIG_DETECT_HUNG_TASK=y 113CONFIG_DETECT_HUNG_TASK=y
113CONFIG_DEBUG_INFO=y 114CONFIG_DEBUG_INFO=y
114# CONFIG_RCU_CPU_STALL_DETECTOR is not set
115# CONFIG_FTRACE is not set 115# CONFIG_FTRACE is not set
116CONFIG_DEBUG_MMRS=y 116CONFIG_DEBUG_MMRS=y
117CONFIG_DEBUG_HWERR=y 117CONFIG_DEBUG_HWERR=y
diff --git a/arch/blackfin/configs/BF537-STAMP_defconfig b/arch/blackfin/configs/BF537-STAMP_defconfig
index 5c802d6bbbc0..91d3eda42742 100644
--- a/arch/blackfin/configs/BF537-STAMP_defconfig
+++ b/arch/blackfin/configs/BF537-STAMP_defconfig
@@ -4,9 +4,7 @@ CONFIG_IKCONFIG=y
4CONFIG_IKCONFIG_PROC=y 4CONFIG_IKCONFIG_PROC=y
5CONFIG_LOG_BUF_SHIFT=14 5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_BLK_DEV_INITRD=y 6CONFIG_BLK_DEV_INITRD=y
7# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
8CONFIG_EXPERT=y 7CONFIG_EXPERT=y
9# CONFIG_SYSCTL_SYSCALL is not set
10# CONFIG_ELF_CORE is not set 8# CONFIG_ELF_CORE is not set
11# CONFIG_FUTEX is not set 9# CONFIG_FUTEX is not set
12# CONFIG_SIGNALFD is not set 10# CONFIG_SIGNALFD is not set
@@ -30,7 +28,6 @@ CONFIG_C_CDPRIO=y
30CONFIG_BANK_3=0x99B2 28CONFIG_BANK_3=0x99B2
31CONFIG_BINFMT_FLAT=y 29CONFIG_BINFMT_FLAT=y
32CONFIG_BINFMT_ZFLAT=y 30CONFIG_BINFMT_ZFLAT=y
33CONFIG_PM=y
34CONFIG_NET=y 31CONFIG_NET=y
35CONFIG_PACKET=y 32CONFIG_PACKET=y
36CONFIG_UNIX=y 33CONFIG_UNIX=y
@@ -45,7 +42,6 @@ CONFIG_IP_PNP=y
45CONFIG_CAN=m 42CONFIG_CAN=m
46CONFIG_CAN_RAW=m 43CONFIG_CAN_RAW=m
47CONFIG_CAN_BCM=m 44CONFIG_CAN_BCM=m
48CONFIG_CAN_DEV=m
49CONFIG_CAN_BFIN=m 45CONFIG_CAN_BFIN=m
50CONFIG_IRDA=m 46CONFIG_IRDA=m
51CONFIG_IRLAN=m 47CONFIG_IRLAN=m
@@ -58,7 +54,6 @@ CONFIG_BFIN_SIR1=y
58CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 54CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
59# CONFIG_FW_LOADER is not set 55# CONFIG_FW_LOADER is not set
60CONFIG_MTD=y 56CONFIG_MTD=y
61CONFIG_MTD_PARTITIONS=y
62CONFIG_MTD_CMDLINE_PARTS=y 57CONFIG_MTD_CMDLINE_PARTS=y
63CONFIG_MTD_CHAR=m 58CONFIG_MTD_CHAR=m
64CONFIG_MTD_BLOCK=y 59CONFIG_MTD_BLOCK=y
@@ -69,11 +64,18 @@ CONFIG_MTD_ROM=m
69CONFIG_MTD_PHYSMAP=m 64CONFIG_MTD_PHYSMAP=m
70CONFIG_BLK_DEV_RAM=y 65CONFIG_BLK_DEV_RAM=y
71CONFIG_NETDEVICES=y 66CONFIG_NETDEVICES=y
72CONFIG_SMSC_PHY=y 67CONFIG_NET_BFIN=y
73CONFIG_NET_ETHERNET=y
74CONFIG_BFIN_MAC=y 68CONFIG_BFIN_MAC=y
75# CONFIG_NETDEV_1000 is not set 69# CONFIG_NET_VENDOR_BROADCOM is not set
76# CONFIG_NETDEV_10000 is not set 70# CONFIG_NET_VENDOR_CHELSIO is not set
71# CONFIG_NET_VENDOR_INTEL is not set
72# CONFIG_NET_VENDOR_MARVELL is not set
73# CONFIG_NET_VENDOR_MICREL is not set
74# CONFIG_NET_VENDOR_MICROCHIP is not set
75# CONFIG_NET_VENDOR_NATSEMI is not set
76# CONFIG_NET_VENDOR_SEEQ is not set
77# CONFIG_NET_VENDOR_SMSC is not set
78# CONFIG_NET_VENDOR_STMICRO is not set
77# CONFIG_WLAN is not set 79# CONFIG_WLAN is not set
78# CONFIG_INPUT_MOUSEDEV is not set 80# CONFIG_INPUT_MOUSEDEV is not set
79CONFIG_INPUT_EVDEV=m 81CONFIG_INPUT_EVDEV=m
@@ -82,12 +84,12 @@ CONFIG_INPUT_EVDEV=m
82CONFIG_INPUT_MISC=y 84CONFIG_INPUT_MISC=y
83# CONFIG_SERIO is not set 85# CONFIG_SERIO is not set
84# CONFIG_VT is not set 86# CONFIG_VT is not set
85# CONFIG_DEVKMEM is not set 87# CONFIG_LEGACY_PTYS is not set
86CONFIG_BFIN_JTAG_COMM=m 88CONFIG_BFIN_JTAG_COMM=m
89# CONFIG_DEVKMEM is not set
87CONFIG_SERIAL_BFIN=y 90CONFIG_SERIAL_BFIN=y
88CONFIG_SERIAL_BFIN_CONSOLE=y 91CONFIG_SERIAL_BFIN_CONSOLE=y
89CONFIG_SERIAL_BFIN_UART0=y 92CONFIG_SERIAL_BFIN_UART0=y
90# CONFIG_LEGACY_PTYS is not set
91# CONFIG_HW_RANDOM is not set 93# CONFIG_HW_RANDOM is not set
92CONFIG_I2C=m 94CONFIG_I2C=m
93CONFIG_I2C_CHARDEV=m 95CONFIG_I2C_CHARDEV=m
@@ -117,12 +119,9 @@ CONFIG_RTC_DRV_BFIN=y
117CONFIG_JFFS2_FS=m 119CONFIG_JFFS2_FS=m
118CONFIG_NFS_FS=m 120CONFIG_NFS_FS=m
119CONFIG_NFS_V3=y 121CONFIG_NFS_V3=y
120CONFIG_SMB_FS=m
121CONFIG_DEBUG_KERNEL=y
122CONFIG_DEBUG_SHIRQ=y 122CONFIG_DEBUG_SHIRQ=y
123CONFIG_DETECT_HUNG_TASK=y 123CONFIG_DETECT_HUNG_TASK=y
124CONFIG_DEBUG_INFO=y 124CONFIG_DEBUG_INFO=y
125# CONFIG_RCU_CPU_STALL_DETECTOR is not set
126# CONFIG_FTRACE is not set 125# CONFIG_FTRACE is not set
127CONFIG_DEBUG_MMRS=y 126CONFIG_DEBUG_MMRS=y
128CONFIG_DEBUG_HWERR=y 127CONFIG_DEBUG_HWERR=y
diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig
index 7a1e3bf2b04f..e716fdfd2cf2 100644
--- a/arch/blackfin/configs/BF548-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF548-EZKIT_defconfig
@@ -5,7 +5,6 @@ CONFIG_IKCONFIG_PROC=y
5CONFIG_LOG_BUF_SHIFT=14 5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_BLK_DEV_INITRD=y 6CONFIG_BLK_DEV_INITRD=y
7CONFIG_EXPERT=y 7CONFIG_EXPERT=y
8# CONFIG_SYSCTL_SYSCALL is not set
9# CONFIG_ELF_CORE is not set 8# CONFIG_ELF_CORE is not set
10# CONFIG_FUTEX is not set 9# CONFIG_FUTEX is not set
11# CONFIG_SIGNALFD is not set 10# CONFIG_SIGNALFD is not set
@@ -85,10 +84,16 @@ CONFIG_ATA=y
85# CONFIG_SATA_PMP is not set 84# CONFIG_SATA_PMP is not set
86CONFIG_PATA_BF54X=y 85CONFIG_PATA_BF54X=y
87CONFIG_NETDEVICES=y 86CONFIG_NETDEVICES=y
88CONFIG_NET_ETHERNET=y 87# CONFIG_NET_VENDOR_BROADCOM is not set
88# CONFIG_NET_VENDOR_CHELSIO is not set
89# CONFIG_NET_VENDOR_INTEL is not set
90# CONFIG_NET_VENDOR_MARVELL is not set
91# CONFIG_NET_VENDOR_MICREL is not set
92# CONFIG_NET_VENDOR_MICROCHIP is not set
93# CONFIG_NET_VENDOR_NATSEMI is not set
94# CONFIG_NET_VENDOR_SEEQ is not set
89CONFIG_SMSC911X=y 95CONFIG_SMSC911X=y
90# CONFIG_NETDEV_1000 is not set 96# CONFIG_NET_VENDOR_STMICRO is not set
91# CONFIG_NETDEV_10000 is not set
92# CONFIG_WLAN is not set 97# CONFIG_WLAN is not set
93CONFIG_INPUT_FF_MEMLESS=m 98CONFIG_INPUT_FF_MEMLESS=m
94# CONFIG_INPUT_MOUSEDEV is not set 99# CONFIG_INPUT_MOUSEDEV is not set
@@ -161,6 +166,7 @@ CONFIG_USB_MON=y
161CONFIG_USB_MUSB_HDRC=y 166CONFIG_USB_MUSB_HDRC=y
162CONFIG_USB_MUSB_BLACKFIN=y 167CONFIG_USB_MUSB_BLACKFIN=y
163CONFIG_USB_STORAGE=y 168CONFIG_USB_STORAGE=y
169CONFIG_USB_GADGET=y
164CONFIG_MMC=y 170CONFIG_MMC=y
165CONFIG_MMC_BLOCK=m 171CONFIG_MMC_BLOCK=m
166CONFIG_SDH_BFIN=y 172CONFIG_SDH_BFIN=y
@@ -187,7 +193,6 @@ CONFIG_NLS_CODEPAGE_437=m
187CONFIG_NLS_CODEPAGE_936=m 193CONFIG_NLS_CODEPAGE_936=m
188CONFIG_NLS_ISO8859_1=m 194CONFIG_NLS_ISO8859_1=m
189CONFIG_NLS_UTF8=m 195CONFIG_NLS_UTF8=m
190CONFIG_DEBUG_KERNEL=y
191CONFIG_DEBUG_SHIRQ=y 196CONFIG_DEBUG_SHIRQ=y
192CONFIG_DETECT_HUNG_TASK=y 197CONFIG_DETECT_HUNG_TASK=y
193CONFIG_DEBUG_INFO=y 198CONFIG_DEBUG_INFO=y
diff --git a/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig b/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig
index 78adbbf39826..680730eeaf23 100644
--- a/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig
+++ b/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig
@@ -4,9 +4,7 @@ CONFIG_IKCONFIG=y
4CONFIG_IKCONFIG_PROC=y 4CONFIG_IKCONFIG_PROC=y
5CONFIG_LOG_BUF_SHIFT=14 5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_BLK_DEV_INITRD=y 6CONFIG_BLK_DEV_INITRD=y
7# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
8CONFIG_EXPERT=y 7CONFIG_EXPERT=y
9# CONFIG_SYSCTL_SYSCALL is not set
10# CONFIG_ELF_CORE is not set 8# CONFIG_ELF_CORE is not set
11# CONFIG_FUTEX is not set 9# CONFIG_FUTEX is not set
12# CONFIG_SIGNALFD is not set 10# CONFIG_SIGNALFD is not set
@@ -23,17 +21,18 @@ CONFIG_MODULE_UNLOAD=y
23# CONFIG_IOSCHED_CFQ is not set 21# CONFIG_IOSCHED_CFQ is not set
24CONFIG_PREEMPT_VOLUNTARY=y 22CONFIG_PREEMPT_VOLUNTARY=y
25CONFIG_BF561=y 23CONFIG_BF561=y
26CONFIG_SMP=y
27CONFIG_IRQ_TIMER0=10 24CONFIG_IRQ_TIMER0=10
28CONFIG_CLKIN_HZ=30000000 25CONFIG_CLKIN_HZ=30000000
29CONFIG_HIGH_RES_TIMERS=y 26CONFIG_HIGH_RES_TIMERS=y
30CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0 27CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
31CONFIG_BFIN_GPTIMERS=m 28CONFIG_BFIN_GPTIMERS=m
29CONFIG_BFIN_EXTMEM_WRITETHROUGH=y
30CONFIG_BFIN_L2_DCACHEABLE=y
31CONFIG_BFIN_L2_WRITETHROUGH=y
32CONFIG_C_CDPRIO=y 32CONFIG_C_CDPRIO=y
33CONFIG_BANK_3=0xAAC2 33CONFIG_BANK_3=0xAAC2
34CONFIG_BINFMT_FLAT=y 34CONFIG_BINFMT_FLAT=y
35CONFIG_BINFMT_ZFLAT=y 35CONFIG_BINFMT_ZFLAT=y
36CONFIG_PM=y
37CONFIG_NET=y 36CONFIG_NET=y
38CONFIG_PACKET=y 37CONFIG_PACKET=y
39CONFIG_UNIX=y 38CONFIG_UNIX=y
@@ -54,21 +53,26 @@ CONFIG_IRTTY_SIR=m
54CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 53CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
55# CONFIG_FW_LOADER is not set 54# CONFIG_FW_LOADER is not set
56CONFIG_MTD=y 55CONFIG_MTD=y
57CONFIG_MTD_PARTITIONS=y
58CONFIG_MTD_CMDLINE_PARTS=y 56CONFIG_MTD_CMDLINE_PARTS=y
59CONFIG_MTD_CHAR=m 57CONFIG_MTD_CHAR=y
60CONFIG_MTD_BLOCK=y 58CONFIG_MTD_BLOCK=y
61CONFIG_MTD_CFI=m 59CONFIG_MTD_CFI=y
62CONFIG_MTD_CFI_AMDSTD=m 60CONFIG_MTD_CFI_AMDSTD=y
63CONFIG_MTD_RAM=y 61CONFIG_MTD_RAM=y
64CONFIG_MTD_ROM=m 62CONFIG_MTD_ROM=m
65CONFIG_MTD_PHYSMAP=m 63CONFIG_MTD_PHYSMAP=y
66CONFIG_BLK_DEV_RAM=y 64CONFIG_BLK_DEV_RAM=y
67CONFIG_NETDEVICES=y 65CONFIG_NETDEVICES=y
68CONFIG_NET_ETHERNET=y 66# CONFIG_NET_VENDOR_BROADCOM is not set
67# CONFIG_NET_VENDOR_CHELSIO is not set
68# CONFIG_NET_VENDOR_INTEL is not set
69# CONFIG_NET_VENDOR_MARVELL is not set
70# CONFIG_NET_VENDOR_MICREL is not set
71# CONFIG_NET_VENDOR_MICROCHIP is not set
72# CONFIG_NET_VENDOR_NATSEMI is not set
73# CONFIG_NET_VENDOR_SEEQ is not set
69CONFIG_SMC91X=y 74CONFIG_SMC91X=y
70# CONFIG_NETDEV_1000 is not set 75# CONFIG_NET_VENDOR_STMICRO is not set
71# CONFIG_NETDEV_10000 is not set
72# CONFIG_WLAN is not set 76# CONFIG_WLAN is not set
73CONFIG_INPUT=m 77CONFIG_INPUT=m
74# CONFIG_INPUT_MOUSEDEV is not set 78# CONFIG_INPUT_MOUSEDEV is not set
@@ -77,11 +81,11 @@ CONFIG_INPUT_EVDEV=m
77# CONFIG_INPUT_MOUSE is not set 81# CONFIG_INPUT_MOUSE is not set
78# CONFIG_SERIO is not set 82# CONFIG_SERIO is not set
79# CONFIG_VT is not set 83# CONFIG_VT is not set
80# CONFIG_DEVKMEM is not set 84# CONFIG_LEGACY_PTYS is not set
81CONFIG_BFIN_JTAG_COMM=m 85CONFIG_BFIN_JTAG_COMM=m
86# CONFIG_DEVKMEM is not set
82CONFIG_SERIAL_BFIN=y 87CONFIG_SERIAL_BFIN=y
83CONFIG_SERIAL_BFIN_CONSOLE=y 88CONFIG_SERIAL_BFIN_CONSOLE=y
84# CONFIG_LEGACY_PTYS is not set
85# CONFIG_HW_RANDOM is not set 89# CONFIG_HW_RANDOM is not set
86CONFIG_SPI=y 90CONFIG_SPI=y
87CONFIG_SPI_BFIN5XX=y 91CONFIG_SPI_BFIN5XX=y
@@ -95,12 +99,9 @@ CONFIG_BFIN_WDT=y
95CONFIG_JFFS2_FS=m 99CONFIG_JFFS2_FS=m
96CONFIG_NFS_FS=m 100CONFIG_NFS_FS=m
97CONFIG_NFS_V3=y 101CONFIG_NFS_V3=y
98CONFIG_SMB_FS=m
99CONFIG_DEBUG_KERNEL=y
100CONFIG_DEBUG_SHIRQ=y 102CONFIG_DEBUG_SHIRQ=y
101CONFIG_DETECT_HUNG_TASK=y 103CONFIG_DETECT_HUNG_TASK=y
102CONFIG_DEBUG_INFO=y 104CONFIG_DEBUG_INFO=y
103# CONFIG_RCU_CPU_STALL_DETECTOR is not set
104# CONFIG_FTRACE is not set 105# CONFIG_FTRACE is not set
105CONFIG_DEBUG_MMRS=y 106CONFIG_DEBUG_MMRS=y
106CONFIG_DEBUG_HWERR=y 107CONFIG_DEBUG_HWERR=y
diff --git a/arch/blackfin/configs/BF561-EZKIT_defconfig b/arch/blackfin/configs/BF561-EZKIT_defconfig
index d3cd0f561c84..680730eeaf23 100644
--- a/arch/blackfin/configs/BF561-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF561-EZKIT_defconfig
@@ -4,9 +4,7 @@ CONFIG_IKCONFIG=y
4CONFIG_IKCONFIG_PROC=y 4CONFIG_IKCONFIG_PROC=y
5CONFIG_LOG_BUF_SHIFT=14 5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_BLK_DEV_INITRD=y 6CONFIG_BLK_DEV_INITRD=y
7# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
8CONFIG_EXPERT=y 7CONFIG_EXPERT=y
9# CONFIG_SYSCTL_SYSCALL is not set
10# CONFIG_ELF_CORE is not set 8# CONFIG_ELF_CORE is not set
11# CONFIG_FUTEX is not set 9# CONFIG_FUTEX is not set
12# CONFIG_SIGNALFD is not set 10# CONFIG_SIGNALFD is not set
@@ -35,7 +33,6 @@ CONFIG_C_CDPRIO=y
35CONFIG_BANK_3=0xAAC2 33CONFIG_BANK_3=0xAAC2
36CONFIG_BINFMT_FLAT=y 34CONFIG_BINFMT_FLAT=y
37CONFIG_BINFMT_ZFLAT=y 35CONFIG_BINFMT_ZFLAT=y
38CONFIG_PM=y
39CONFIG_NET=y 36CONFIG_NET=y
40CONFIG_PACKET=y 37CONFIG_PACKET=y
41CONFIG_UNIX=y 38CONFIG_UNIX=y
@@ -56,7 +53,6 @@ CONFIG_IRTTY_SIR=m
56CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 53CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
57# CONFIG_FW_LOADER is not set 54# CONFIG_FW_LOADER is not set
58CONFIG_MTD=y 55CONFIG_MTD=y
59CONFIG_MTD_PARTITIONS=y
60CONFIG_MTD_CMDLINE_PARTS=y 56CONFIG_MTD_CMDLINE_PARTS=y
61CONFIG_MTD_CHAR=y 57CONFIG_MTD_CHAR=y
62CONFIG_MTD_BLOCK=y 58CONFIG_MTD_BLOCK=y
@@ -67,10 +63,16 @@ CONFIG_MTD_ROM=m
67CONFIG_MTD_PHYSMAP=y 63CONFIG_MTD_PHYSMAP=y
68CONFIG_BLK_DEV_RAM=y 64CONFIG_BLK_DEV_RAM=y
69CONFIG_NETDEVICES=y 65CONFIG_NETDEVICES=y
70CONFIG_NET_ETHERNET=y 66# CONFIG_NET_VENDOR_BROADCOM is not set
67# CONFIG_NET_VENDOR_CHELSIO is not set
68# CONFIG_NET_VENDOR_INTEL is not set
69# CONFIG_NET_VENDOR_MARVELL is not set
70# CONFIG_NET_VENDOR_MICREL is not set
71# CONFIG_NET_VENDOR_MICROCHIP is not set
72# CONFIG_NET_VENDOR_NATSEMI is not set
73# CONFIG_NET_VENDOR_SEEQ is not set
71CONFIG_SMC91X=y 74CONFIG_SMC91X=y
72# CONFIG_NETDEV_1000 is not set 75# CONFIG_NET_VENDOR_STMICRO is not set
73# CONFIG_NETDEV_10000 is not set
74# CONFIG_WLAN is not set 76# CONFIG_WLAN is not set
75CONFIG_INPUT=m 77CONFIG_INPUT=m
76# CONFIG_INPUT_MOUSEDEV is not set 78# CONFIG_INPUT_MOUSEDEV is not set
@@ -79,11 +81,11 @@ CONFIG_INPUT_EVDEV=m
79# CONFIG_INPUT_MOUSE is not set 81# CONFIG_INPUT_MOUSE is not set
80# CONFIG_SERIO is not set 82# CONFIG_SERIO is not set
81# CONFIG_VT is not set 83# CONFIG_VT is not set
82# CONFIG_DEVKMEM is not set 84# CONFIG_LEGACY_PTYS is not set
83CONFIG_BFIN_JTAG_COMM=m 85CONFIG_BFIN_JTAG_COMM=m
86# CONFIG_DEVKMEM is not set
84CONFIG_SERIAL_BFIN=y 87CONFIG_SERIAL_BFIN=y
85CONFIG_SERIAL_BFIN_CONSOLE=y 88CONFIG_SERIAL_BFIN_CONSOLE=y
86# CONFIG_LEGACY_PTYS is not set
87# CONFIG_HW_RANDOM is not set 89# CONFIG_HW_RANDOM is not set
88CONFIG_SPI=y 90CONFIG_SPI=y
89CONFIG_SPI_BFIN5XX=y 91CONFIG_SPI_BFIN5XX=y
@@ -97,12 +99,9 @@ CONFIG_BFIN_WDT=y
97CONFIG_JFFS2_FS=m 99CONFIG_JFFS2_FS=m
98CONFIG_NFS_FS=m 100CONFIG_NFS_FS=m
99CONFIG_NFS_V3=y 101CONFIG_NFS_V3=y
100CONFIG_SMB_FS=m
101CONFIG_DEBUG_KERNEL=y
102CONFIG_DEBUG_SHIRQ=y 102CONFIG_DEBUG_SHIRQ=y
103CONFIG_DETECT_HUNG_TASK=y 103CONFIG_DETECT_HUNG_TASK=y
104CONFIG_DEBUG_INFO=y 104CONFIG_DEBUG_INFO=y
105# CONFIG_RCU_CPU_STALL_DETECTOR is not set
106# CONFIG_FTRACE is not set 105# CONFIG_FTRACE is not set
107CONFIG_DEBUG_MMRS=y 106CONFIG_DEBUG_MMRS=y
108CONFIG_DEBUG_HWERR=y 107CONFIG_DEBUG_HWERR=y
diff --git a/arch/blackfin/include/asm/atomic.h b/arch/blackfin/include/asm/atomic.h
index 54c6e2887e9f..c8db653c72d2 100644
--- a/arch/blackfin/include/asm/atomic.h
+++ b/arch/blackfin/include/asm/atomic.h
@@ -7,6 +7,8 @@
7#ifndef __ARCH_BLACKFIN_ATOMIC__ 7#ifndef __ARCH_BLACKFIN_ATOMIC__
8#define __ARCH_BLACKFIN_ATOMIC__ 8#define __ARCH_BLACKFIN_ATOMIC__
9 9
10#include <asm/cmpxchg.h>
11
10#ifdef CONFIG_SMP 12#ifdef CONFIG_SMP
11 13
12#include <linux/linkage.h> 14#include <linux/linkage.h>
diff --git a/arch/blackfin/include/asm/barrier.h b/arch/blackfin/include/asm/barrier.h
new file mode 100644
index 000000000000..ebb189507dd7
--- /dev/null
+++ b/arch/blackfin/include/asm/barrier.h
@@ -0,0 +1,48 @@
1/*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * Tony Kou (tonyko@lineo.ca)
4 *
5 * Licensed under the GPL-2 or later
6 */
7
8#ifndef _BLACKFIN_BARRIER_H
9#define _BLACKFIN_BARRIER_H
10
11#include <asm/cache.h>
12
13#define nop() __asm__ __volatile__ ("nop;\n\t" : : )
14
15/*
16 * Force strict CPU ordering.
17 */
18#ifdef CONFIG_SMP
19
20#ifdef __ARCH_SYNC_CORE_DCACHE
21/* Force Core data cache coherence */
22# define mb() do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0)
23# define rmb() do { barrier(); smp_check_barrier(); } while (0)
24# define wmb() do { barrier(); smp_mark_barrier(); } while (0)
25# define read_barrier_depends() do { barrier(); smp_check_barrier(); } while (0)
26#else
27# define mb() barrier()
28# define rmb() barrier()
29# define wmb() barrier()
30# define read_barrier_depends() do { } while (0)
31#endif
32
33#else /* !CONFIG_SMP */
34
35#define mb() barrier()
36#define rmb() barrier()
37#define wmb() barrier()
38#define read_barrier_depends() do { } while (0)
39
40#endif /* !CONFIG_SMP */
41
42#define smp_mb() mb()
43#define smp_rmb() rmb()
44#define smp_wmb() wmb()
45#define set_mb(var, value) do { var = value; mb(); } while (0)
46#define smp_read_barrier_depends() read_barrier_depends()
47
48#endif /* _BLACKFIN_BARRIER_H */
diff --git a/arch/blackfin/include/asm/bfin5xx_spi.h b/arch/blackfin/include/asm/bfin5xx_spi.h
index 5392583d0253..fb95c853bb1e 100644
--- a/arch/blackfin/include/asm/bfin5xx_spi.h
+++ b/arch/blackfin/include/asm/bfin5xx_spi.h
@@ -77,7 +77,6 @@ struct bfin5xx_spi_master {
77struct bfin5xx_spi_chip { 77struct bfin5xx_spi_chip {
78 u16 ctl_reg; 78 u16 ctl_reg;
79 u8 enable_dma; 79 u8 enable_dma;
80 u8 bits_per_word;
81 u16 cs_chg_udelay; /* Some devices require 16-bit delays */ 80 u16 cs_chg_udelay; /* Some devices require 16-bit delays */
82 /* Value to send if no TX value is supplied, usually 0x0 or 0xFFFF */ 81 /* Value to send if no TX value is supplied, usually 0x0 or 0xFFFF */
83 u16 idle_tx_val; 82 u16 idle_tx_val;
diff --git a/arch/blackfin/include/asm/bfin_simple_timer.h b/arch/blackfin/include/asm/bfin_simple_timer.h
index 5248c133bc68..aadfb1ad1fac 100644
--- a/arch/blackfin/include/asm/bfin_simple_timer.h
+++ b/arch/blackfin/include/asm/bfin_simple_timer.h
@@ -11,9 +11,11 @@
11 11
12#define BFIN_SIMPLE_TIMER_IOCTL_MAGIC 't' 12#define BFIN_SIMPLE_TIMER_IOCTL_MAGIC 't'
13 13
14#define BFIN_SIMPLE_TIMER_SET_PERIOD _IO (BFIN_SIMPLE_TIMER_IOCTL_MAGIC, 2) 14#define BFIN_SIMPLE_TIMER_SET_PERIOD _IO(BFIN_SIMPLE_TIMER_IOCTL_MAGIC, 2)
15#define BFIN_SIMPLE_TIMER_START _IO (BFIN_SIMPLE_TIMER_IOCTL_MAGIC, 6) 15#define BFIN_SIMPLE_TIMER_SET_WIDTH _IO(BFIN_SIMPLE_TIMER_IOCTL_MAGIC, 3)
16#define BFIN_SIMPLE_TIMER_STOP _IO (BFIN_SIMPLE_TIMER_IOCTL_MAGIC, 8) 16#define BFIN_SIMPLE_TIMER_SET_MODE _IO(BFIN_SIMPLE_TIMER_IOCTL_MAGIC, 4)
17#define BFIN_SIMPLE_TIMER_READ _IO (BFIN_SIMPLE_TIMER_IOCTL_MAGIC, 10) 17#define BFIN_SIMPLE_TIMER_START _IO(BFIN_SIMPLE_TIMER_IOCTL_MAGIC, 6)
18#define BFIN_SIMPLE_TIMER_STOP _IO(BFIN_SIMPLE_TIMER_IOCTL_MAGIC, 8)
19#define BFIN_SIMPLE_TIMER_READ _IO(BFIN_SIMPLE_TIMER_IOCTL_MAGIC, 10)
18 20
19#endif 21#endif
diff --git a/arch/blackfin/include/asm/bfin_sport.h b/arch/blackfin/include/asm/bfin_sport.h
index f8568a31d0ab..0afcfbd54a82 100644
--- a/arch/blackfin/include/asm/bfin_sport.h
+++ b/arch/blackfin/include/asm/bfin_sport.h
@@ -13,6 +13,7 @@
13#define NORM_MODE 0x0 13#define NORM_MODE 0x0
14#define TDM_MODE 0x1 14#define TDM_MODE 0x1
15#define I2S_MODE 0x2 15#define I2S_MODE 0x2
16#define NDSO_MODE 0x3
16 17
17/* Data format, normal, a-law or u-law */ 18/* Data format, normal, a-law or u-law */
18#define NORM_FORMAT 0x0 19#define NORM_FORMAT 0x0
@@ -56,6 +57,8 @@ struct sport_config {
56/* Userspace interface */ 57/* Userspace interface */
57#define SPORT_IOC_MAGIC 'P' 58#define SPORT_IOC_MAGIC 'P'
58#define SPORT_IOC_CONFIG _IOWR('P', 0x01, struct sport_config) 59#define SPORT_IOC_CONFIG _IOWR('P', 0x01, struct sport_config)
60#define SPORT_IOC_GET_SYSTEMCLOCK _IOR('P', 0x02, unsigned long)
61#define SPORT_IOC_SET_BAUDRATE _IOW('P', 0x03, unsigned long)
59 62
60#ifdef __KERNEL__ 63#ifdef __KERNEL__
61 64
diff --git a/arch/blackfin/include/asm/blackfin.h b/arch/blackfin/include/asm/blackfin.h
index 0928700b6bc4..7be5368c0512 100644
--- a/arch/blackfin/include/asm/blackfin.h
+++ b/arch/blackfin/include/asm/blackfin.h
@@ -17,22 +17,16 @@
17static inline void SSYNC(void) 17static inline void SSYNC(void)
18{ 18{
19 int _tmp; 19 int _tmp;
20 if (ANOMALY_05000312) 20 if (ANOMALY_05000312 || ANOMALY_05000244)
21 __asm__ __volatile__( 21 __asm__ __volatile__(
22 "cli %0;" 22 "cli %0;"
23 "nop;" 23 "nop;"
24 "nop;" 24 "nop;"
25 "nop;"
25 "ssync;" 26 "ssync;"
26 "sti %0;" 27 "sti %0;"
27 : "=d" (_tmp) 28 : "=d" (_tmp)
28 ); 29 );
29 else if (ANOMALY_05000244)
30 __asm__ __volatile__(
31 "nop;"
32 "nop;"
33 "nop;"
34 "ssync;"
35 );
36 else 30 else
37 __asm__ __volatile__("ssync;"); 31 __asm__ __volatile__("ssync;");
38} 32}
@@ -41,22 +35,16 @@ static inline void SSYNC(void)
41static inline void CSYNC(void) 35static inline void CSYNC(void)
42{ 36{
43 int _tmp; 37 int _tmp;
44 if (ANOMALY_05000312) 38 if (ANOMALY_05000312 || ANOMALY_05000244)
45 __asm__ __volatile__( 39 __asm__ __volatile__(
46 "cli %0;" 40 "cli %0;"
47 "nop;" 41 "nop;"
48 "nop;" 42 "nop;"
43 "nop;"
49 "csync;" 44 "csync;"
50 "sti %0;" 45 "sti %0;"
51 : "=d" (_tmp) 46 : "=d" (_tmp)
52 ); 47 );
53 else if (ANOMALY_05000244)
54 __asm__ __volatile__(
55 "nop;"
56 "nop;"
57 "nop;"
58 "csync;"
59 );
60 else 48 else
61 __asm__ __volatile__("csync;"); 49 __asm__ __volatile__("csync;");
62} 50}
@@ -73,18 +61,26 @@ static inline void CSYNC(void)
73#define ssync(x) SSYNC(x) 61#define ssync(x) SSYNC(x)
74#define csync(x) CSYNC(x) 62#define csync(x) CSYNC(x)
75 63
76#if ANOMALY_05000312 64#if ANOMALY_05000312 || ANOMALY_05000244
77#define SSYNC(scratch) cli scratch; nop; nop; SSYNC; sti scratch; 65#define SSYNC(scratch) \
78#define CSYNC(scratch) cli scratch; nop; nop; CSYNC; sti scratch; 66do { \
79 67 cli scratch; \
80#elif ANOMALY_05000244 68 nop; nop; nop; \
81#define SSYNC(scratch) nop; nop; nop; SSYNC; 69 SSYNC; \
82#define CSYNC(scratch) nop; nop; nop; CSYNC; 70 sti scratch; \
71} while (0)
72
73#define CSYNC(scratch) \
74do { \
75 cli scratch; \
76 nop; nop; nop; \
77 CSYNC; \
78 sti scratch; \
79} while (0)
83 80
84#else 81#else
85#define SSYNC(scratch) SSYNC; 82#define SSYNC(scratch) SSYNC;
86#define CSYNC(scratch) CSYNC; 83#define CSYNC(scratch) CSYNC;
87
88#endif /* ANOMALY_05000312 & ANOMALY_05000244 handling */ 84#endif /* ANOMALY_05000312 & ANOMALY_05000244 handling */
89 85
90#endif /* __ASSEMBLY__ */ 86#endif /* __ASSEMBLY__ */
diff --git a/arch/blackfin/include/asm/cmpxchg.h b/arch/blackfin/include/asm/cmpxchg.h
new file mode 100644
index 000000000000..ba2484f4cb2a
--- /dev/null
+++ b/arch/blackfin/include/asm/cmpxchg.h
@@ -0,0 +1,132 @@
1/*
2 * Copyright 2004-2011 Analog Devices Inc.
3 *
4 * Licensed under the GPL-2 or later.
5 */
6
7#ifndef __ARCH_BLACKFIN_CMPXCHG__
8#define __ARCH_BLACKFIN_CMPXCHG__
9
10#ifdef CONFIG_SMP
11
12#include <linux/linkage.h>
13
14asmlinkage unsigned long __raw_xchg_1_asm(volatile void *ptr, unsigned long value);
15asmlinkage unsigned long __raw_xchg_2_asm(volatile void *ptr, unsigned long value);
16asmlinkage unsigned long __raw_xchg_4_asm(volatile void *ptr, unsigned long value);
17asmlinkage unsigned long __raw_cmpxchg_1_asm(volatile void *ptr,
18 unsigned long new, unsigned long old);
19asmlinkage unsigned long __raw_cmpxchg_2_asm(volatile void *ptr,
20 unsigned long new, unsigned long old);
21asmlinkage unsigned long __raw_cmpxchg_4_asm(volatile void *ptr,
22 unsigned long new, unsigned long old);
23
24static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
25 int size)
26{
27 unsigned long tmp;
28
29 switch (size) {
30 case 1:
31 tmp = __raw_xchg_1_asm(ptr, x);
32 break;
33 case 2:
34 tmp = __raw_xchg_2_asm(ptr, x);
35 break;
36 case 4:
37 tmp = __raw_xchg_4_asm(ptr, x);
38 break;
39 }
40
41 return tmp;
42}
43
44/*
45 * Atomic compare and exchange. Compare OLD with MEM, if identical,
46 * store NEW in MEM. Return the initial value in MEM. Success is
47 * indicated by comparing RETURN with OLD.
48 */
49static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
50 unsigned long new, int size)
51{
52 unsigned long tmp;
53
54 switch (size) {
55 case 1:
56 tmp = __raw_cmpxchg_1_asm(ptr, new, old);
57 break;
58 case 2:
59 tmp = __raw_cmpxchg_2_asm(ptr, new, old);
60 break;
61 case 4:
62 tmp = __raw_cmpxchg_4_asm(ptr, new, old);
63 break;
64 }
65
66 return tmp;
67}
68#define cmpxchg(ptr, o, n) \
69 ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
70 (unsigned long)(n), sizeof(*(ptr))))
71
72#else /* !CONFIG_SMP */
73
74#include <mach/blackfin.h>
75#include <asm/irqflags.h>
76
77struct __xchg_dummy {
78 unsigned long a[100];
79};
80#define __xg(x) ((volatile struct __xchg_dummy *)(x))
81
82static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
83 int size)
84{
85 unsigned long tmp = 0;
86 unsigned long flags;
87
88 flags = hard_local_irq_save();
89
90 switch (size) {
91 case 1:
92 __asm__ __volatile__
93 ("%0 = b%2 (z);\n\t"
94 "b%2 = %1;\n\t"
95 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
96 break;
97 case 2:
98 __asm__ __volatile__
99 ("%0 = w%2 (z);\n\t"
100 "w%2 = %1;\n\t"
101 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
102 break;
103 case 4:
104 __asm__ __volatile__
105 ("%0 = %2;\n\t"
106 "%2 = %1;\n\t"
107 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
108 break;
109 }
110 hard_local_irq_restore(flags);
111 return tmp;
112}
113
114#include <asm-generic/cmpxchg-local.h>
115
116/*
117 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
118 * them available.
119 */
120#define cmpxchg_local(ptr, o, n) \
121 ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
122 (unsigned long)(n), sizeof(*(ptr))))
123#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
124
125#include <asm-generic/cmpxchg.h>
126
127#endif /* !CONFIG_SMP */
128
129#define xchg(ptr, x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
130#define tas(ptr) ((void)xchg((ptr), 1))
131
132#endif /* __ARCH_BLACKFIN_CMPXCHG__ */
diff --git a/arch/blackfin/include/asm/exec.h b/arch/blackfin/include/asm/exec.h
new file mode 100644
index 000000000000..54c2e1db274a
--- /dev/null
+++ b/arch/blackfin/include/asm/exec.h
@@ -0,0 +1 @@
/* define arch_align_stack() here */
diff --git a/arch/blackfin/include/asm/irq.h b/arch/blackfin/include/asm/irq.h
index 12f4060a31b0..89de539ed010 100644
--- a/arch/blackfin/include/asm/irq.h
+++ b/arch/blackfin/include/asm/irq.h
@@ -38,8 +38,4 @@
38 38
39#include <asm-generic/irq.h> 39#include <asm-generic/irq.h>
40 40
41#ifdef CONFIG_NMI_WATCHDOG
42# define ARCH_HAS_NMI_WATCHDOG
43#endif
44
45#endif /* _BFIN_IRQ_H_ */ 41#endif /* _BFIN_IRQ_H_ */
diff --git a/arch/blackfin/include/asm/irq_handler.h b/arch/blackfin/include/asm/irq_handler.h
index ee73f79aef10..4fbf83575db1 100644
--- a/arch/blackfin/include/asm/irq_handler.h
+++ b/arch/blackfin/include/asm/irq_handler.h
@@ -9,6 +9,7 @@
9 9
10#include <linux/types.h> 10#include <linux/types.h>
11#include <linux/linkage.h> 11#include <linux/linkage.h>
12#include <mach/irq.h>
12 13
13/* init functions only */ 14/* init functions only */
14extern int __init init_arch_irq(void); 15extern int __init init_arch_irq(void);
diff --git a/arch/blackfin/include/asm/kgdb.h b/arch/blackfin/include/asm/kgdb.h
index aaf884591b07..2703ddeeb5db 100644
--- a/arch/blackfin/include/asm/kgdb.h
+++ b/arch/blackfin/include/asm/kgdb.h
@@ -109,6 +109,7 @@ static inline void arch_kgdb_breakpoint(void)
109# define CACHE_FLUSH_IS_SAFE 1 109# define CACHE_FLUSH_IS_SAFE 1
110#endif 110#endif
111#define GDB_ADJUSTS_BREAK_OFFSET 111#define GDB_ADJUSTS_BREAK_OFFSET
112#define GDB_SKIP_HW_WATCH_TEST
112#define HW_INST_WATCHPOINT_NUM 6 113#define HW_INST_WATCHPOINT_NUM 6
113#define HW_WATCHPOINT_NUM 8 114#define HW_WATCHPOINT_NUM 8
114#define TYPE_INST_WATCHPOINT 0 115#define TYPE_INST_WATCHPOINT 0
diff --git a/arch/blackfin/include/asm/mmu_context.h b/arch/blackfin/include/asm/mmu_context.h
index 3828c70e7a2e..15b16d3e8de8 100644
--- a/arch/blackfin/include/asm/mmu_context.h
+++ b/arch/blackfin/include/asm/mmu_context.h
@@ -30,8 +30,11 @@ extern void *l1sram_alloc_max(void*);
30static inline void free_l1stack(void) 30static inline void free_l1stack(void)
31{ 31{
32 nr_l1stack_tasks--; 32 nr_l1stack_tasks--;
33 if (nr_l1stack_tasks == 0) 33 if (nr_l1stack_tasks == 0) {
34 l1sram_free(l1_stack_base); 34 l1sram_free(l1_stack_base);
35 l1_stack_base = NULL;
36 l1_stack_len = 0;
37 }
35} 38}
36 39
37static inline unsigned long 40static inline unsigned long
diff --git a/arch/blackfin/include/asm/switch_to.h b/arch/blackfin/include/asm/switch_to.h
new file mode 100644
index 000000000000..aaf671be9242
--- /dev/null
+++ b/arch/blackfin/include/asm/switch_to.h
@@ -0,0 +1,39 @@
1/*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * Tony Kou (tonyko@lineo.ca)
4 *
5 * Licensed under the GPL-2 or later
6 */
7
8#ifndef _BLACKFIN_SWITCH_TO_H
9#define _BLACKFIN_SWITCH_TO_H
10
11#define prepare_to_switch() do { } while(0)
12
13/*
14 * switch_to(n) should switch tasks to task ptr, first checking that
15 * ptr isn't the current task, in which case it does nothing.
16 */
17
18#include <asm/l1layout.h>
19#include <asm/mem_map.h>
20
21asmlinkage struct task_struct *resume(struct task_struct *prev, struct task_struct *next);
22
23#ifndef CONFIG_SMP
24#define switch_to(prev,next,last) \
25do { \
26 memcpy (&task_thread_info(prev)->l1_task_info, L1_SCRATCH_TASK_INFO, \
27 sizeof *L1_SCRATCH_TASK_INFO); \
28 memcpy (L1_SCRATCH_TASK_INFO, &task_thread_info(next)->l1_task_info, \
29 sizeof *L1_SCRATCH_TASK_INFO); \
30 (last) = resume (prev, next); \
31} while (0)
32#else
33#define switch_to(prev, next, last) \
34do { \
35 (last) = resume(prev, next); \
36} while (0)
37#endif
38
39#endif /* _BLACKFIN_SWITCH_TO_H */
diff --git a/arch/blackfin/include/asm/system.h b/arch/blackfin/include/asm/system.h
index 44bd0cced725..a7f40578587c 100644
--- a/arch/blackfin/include/asm/system.h
+++ b/arch/blackfin/include/asm/system.h
@@ -1,192 +1,5 @@
1/* 1/* FILE TO BE DELETED. DO NOT ADD STUFF HERE! */
2 * Copyright 2004-2009 Analog Devices Inc. 2#include <asm/barrier.h>
3 * Tony Kou (tonyko@lineo.ca) 3#include <asm/cmpxchg.h>
4 * 4#include <asm/exec.h>
5 * Licensed under the GPL-2 or later 5#include <asm/switch_to.h>
6 */
7
8#ifndef _BLACKFIN_SYSTEM_H
9#define _BLACKFIN_SYSTEM_H
10
11#include <linux/linkage.h>
12#include <linux/irqflags.h>
13#include <mach/anomaly.h>
14#include <asm/cache.h>
15#include <asm/pda.h>
16#include <asm/irq.h>
17
18/*
19 * Force strict CPU ordering.
20 */
21#define nop() __asm__ __volatile__ ("nop;\n\t" : : )
22#define smp_mb() mb()
23#define smp_rmb() rmb()
24#define smp_wmb() wmb()
25#define set_mb(var, value) do { var = value; mb(); } while (0)
26#define smp_read_barrier_depends() read_barrier_depends()
27
28#ifdef CONFIG_SMP
29asmlinkage unsigned long __raw_xchg_1_asm(volatile void *ptr, unsigned long value);
30asmlinkage unsigned long __raw_xchg_2_asm(volatile void *ptr, unsigned long value);
31asmlinkage unsigned long __raw_xchg_4_asm(volatile void *ptr, unsigned long value);
32asmlinkage unsigned long __raw_cmpxchg_1_asm(volatile void *ptr,
33 unsigned long new, unsigned long old);
34asmlinkage unsigned long __raw_cmpxchg_2_asm(volatile void *ptr,
35 unsigned long new, unsigned long old);
36asmlinkage unsigned long __raw_cmpxchg_4_asm(volatile void *ptr,
37 unsigned long new, unsigned long old);
38
39#ifdef __ARCH_SYNC_CORE_DCACHE
40/* Force Core data cache coherence */
41# define mb() do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0)
42# define rmb() do { barrier(); smp_check_barrier(); } while (0)
43# define wmb() do { barrier(); smp_mark_barrier(); } while (0)
44# define read_barrier_depends() do { barrier(); smp_check_barrier(); } while (0)
45#else
46# define mb() barrier()
47# define rmb() barrier()
48# define wmb() barrier()
49# define read_barrier_depends() do { } while (0)
50#endif
51
52static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
53 int size)
54{
55 unsigned long tmp;
56
57 switch (size) {
58 case 1:
59 tmp = __raw_xchg_1_asm(ptr, x);
60 break;
61 case 2:
62 tmp = __raw_xchg_2_asm(ptr, x);
63 break;
64 case 4:
65 tmp = __raw_xchg_4_asm(ptr, x);
66 break;
67 }
68
69 return tmp;
70}
71
72/*
73 * Atomic compare and exchange. Compare OLD with MEM, if identical,
74 * store NEW in MEM. Return the initial value in MEM. Success is
75 * indicated by comparing RETURN with OLD.
76 */
77static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
78 unsigned long new, int size)
79{
80 unsigned long tmp;
81
82 switch (size) {
83 case 1:
84 tmp = __raw_cmpxchg_1_asm(ptr, new, old);
85 break;
86 case 2:
87 tmp = __raw_cmpxchg_2_asm(ptr, new, old);
88 break;
89 case 4:
90 tmp = __raw_cmpxchg_4_asm(ptr, new, old);
91 break;
92 }
93
94 return tmp;
95}
96#define cmpxchg(ptr, o, n) \
97 ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
98 (unsigned long)(n), sizeof(*(ptr))))
99
100#else /* !CONFIG_SMP */
101
102#define mb() barrier()
103#define rmb() barrier()
104#define wmb() barrier()
105#define read_barrier_depends() do { } while (0)
106
107struct __xchg_dummy {
108 unsigned long a[100];
109};
110#define __xg(x) ((volatile struct __xchg_dummy *)(x))
111
112#include <mach/blackfin.h>
113
114static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
115 int size)
116{
117 unsigned long tmp = 0;
118 unsigned long flags;
119
120 flags = hard_local_irq_save();
121
122 switch (size) {
123 case 1:
124 __asm__ __volatile__
125 ("%0 = b%2 (z);\n\t"
126 "b%2 = %1;\n\t"
127 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
128 break;
129 case 2:
130 __asm__ __volatile__
131 ("%0 = w%2 (z);\n\t"
132 "w%2 = %1;\n\t"
133 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
134 break;
135 case 4:
136 __asm__ __volatile__
137 ("%0 = %2;\n\t"
138 "%2 = %1;\n\t"
139 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
140 break;
141 }
142 hard_local_irq_restore(flags);
143 return tmp;
144}
145
146#include <asm-generic/cmpxchg-local.h>
147
148/*
149 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
150 * them available.
151 */
152#define cmpxchg_local(ptr, o, n) \
153 ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
154 (unsigned long)(n), sizeof(*(ptr))))
155#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
156
157#include <asm-generic/cmpxchg.h>
158
159#endif /* !CONFIG_SMP */
160
161#define xchg(ptr, x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
162#define tas(ptr) ((void)xchg((ptr), 1))
163
164#define prepare_to_switch() do { } while(0)
165
166/*
167 * switch_to(n) should switch tasks to task ptr, first checking that
168 * ptr isn't the current task, in which case it does nothing.
169 */
170
171#include <asm/l1layout.h>
172#include <asm/mem_map.h>
173
174asmlinkage struct task_struct *resume(struct task_struct *prev, struct task_struct *next);
175
176#ifndef CONFIG_SMP
177#define switch_to(prev,next,last) \
178do { \
179 memcpy (&task_thread_info(prev)->l1_task_info, L1_SCRATCH_TASK_INFO, \
180 sizeof *L1_SCRATCH_TASK_INFO); \
181 memcpy (L1_SCRATCH_TASK_INFO, &task_thread_info(next)->l1_task_info, \
182 sizeof *L1_SCRATCH_TASK_INFO); \
183 (last) = resume (prev, next); \
184} while (0)
185#else
186#define switch_to(prev, next, last) \
187do { \
188 (last) = resume(prev, next); \
189} while (0)
190#endif
191
192#endif /* _BLACKFIN_SYSTEM_H */
diff --git a/arch/blackfin/include/asm/thread_info.h b/arch/blackfin/include/asm/thread_info.h
index 53ad10005ae3..02560fd8a121 100644
--- a/arch/blackfin/include/asm/thread_info.h
+++ b/arch/blackfin/include/asm/thread_info.h
@@ -100,6 +100,7 @@ static inline struct thread_info *current_thread_info(void)
100 TIF_NEED_RESCHED */ 100 TIF_NEED_RESCHED */
101#define TIF_MEMDIE 4 /* is terminating due to OOM killer */ 101#define TIF_MEMDIE 4 /* is terminating due to OOM killer */
102#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */ 102#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */
103#define TIF_FREEZE 6 /* is freezing for suspend */
103#define TIF_IRQ_SYNC 7 /* sync pipeline stage */ 104#define TIF_IRQ_SYNC 7 /* sync pipeline stage */
104#define TIF_NOTIFY_RESUME 8 /* callback before returning to user */ 105#define TIF_NOTIFY_RESUME 8 /* callback before returning to user */
105#define TIF_SINGLESTEP 9 106#define TIF_SINGLESTEP 9
@@ -110,6 +111,7 @@ static inline struct thread_info *current_thread_info(void)
110#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) 111#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
111#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 112#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
112#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) 113#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
114#define _TIF_FREEZE (1<<TIF_FREEZE)
113#define _TIF_IRQ_SYNC (1<<TIF_IRQ_SYNC) 115#define _TIF_IRQ_SYNC (1<<TIF_IRQ_SYNC)
114#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) 116#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
115#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP) 117#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP)
diff --git a/arch/blackfin/include/asm/unistd.h b/arch/blackfin/include/asm/unistd.h
index 0ccba60b9ccf..75ec9df5318b 100644
--- a/arch/blackfin/include/asm/unistd.h
+++ b/arch/blackfin/include/asm/unistd.h
@@ -399,8 +399,10 @@
399#define __NR_syncfs 378 399#define __NR_syncfs 378
400#define __NR_setns 379 400#define __NR_setns 379
401#define __NR_sendmmsg 380 401#define __NR_sendmmsg 380
402#define __NR_process_vm_readv 381
403#define __NR_process_vm_writev 382
402 404
403#define __NR_syscall 381 405#define __NR_syscall 383
404#define NR_syscalls __NR_syscall 406#define NR_syscalls __NR_syscall
405 407
406/* Old optional stuff no one actually uses */ 408/* Old optional stuff no one actually uses */
diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile
index 1f88edd4572a..9a0d6d706443 100644
--- a/arch/blackfin/kernel/Makefile
+++ b/arch/blackfin/kernel/Makefile
@@ -7,7 +7,7 @@ extra-y := init_task.o vmlinux.lds
7obj-y := \ 7obj-y := \
8 entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \ 8 entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \
9 sys_bfin.o traps.o irqchip.o dma-mapping.o flat.o \ 9 sys_bfin.o traps.o irqchip.o dma-mapping.o flat.o \
10 fixed_code.o reboot.o bfin_gpio.o bfin_dma_5xx.o \ 10 fixed_code.o reboot.o bfin_gpio.o bfin_dma.o \
11 exception.o dumpstack.o 11 exception.o dumpstack.o
12 12
13ifeq ($(CONFIG_GENERIC_CLOCKEVENTS),y) 13ifeq ($(CONFIG_GENERIC_CLOCKEVENTS),y)
diff --git a/arch/blackfin/kernel/asm-offsets.c b/arch/blackfin/kernel/asm-offsets.c
index 17e35465a416..37fcae950216 100644
--- a/arch/blackfin/kernel/asm-offsets.c
+++ b/arch/blackfin/kernel/asm-offsets.c
@@ -14,6 +14,7 @@
14#include <linux/irq.h> 14#include <linux/irq.h>
15#include <linux/thread_info.h> 15#include <linux/thread_info.h>
16#include <linux/kbuild.h> 16#include <linux/kbuild.h>
17#include <asm/pda.h>
17 18
18int main(void) 19int main(void)
19{ 20{
diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma.c
index 71dbaa4a48af..40c2ed61258e 100644
--- a/arch/blackfin/kernel/bfin_dma_5xx.c
+++ b/arch/blackfin/kernel/bfin_dma.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * bfin_dma_5xx.c - Blackfin DMA implementation 2 * bfin_dma.c - Blackfin DMA implementation
3 * 3 *
4 * Copyright 2004-2008 Analog Devices Inc. 4 * Copyright 2004-2008 Analog Devices Inc.
5 * 5 *
@@ -218,6 +218,9 @@ int blackfin_dma_suspend(void)
218 dma_ch[i].saved_peripheral_map = dma_ch[i].regs->peripheral_map; 218 dma_ch[i].saved_peripheral_map = dma_ch[i].regs->peripheral_map;
219 } 219 }
220 220
221#if ANOMALY_05000480
222 bfin_write_DMAC_TC_PER(0x0);
223#endif
221 return 0; 224 return 0;
222} 225}
223 226
@@ -231,6 +234,9 @@ void blackfin_dma_resume(void)
231 if (i < MAX_DMA_SUSPEND_CHANNELS) 234 if (i < MAX_DMA_SUSPEND_CHANNELS)
232 dma_ch[i].regs->peripheral_map = dma_ch[i].saved_peripheral_map; 235 dma_ch[i].regs->peripheral_map = dma_ch[i].saved_peripheral_map;
233 } 236 }
237#if ANOMALY_05000480
238 bfin_write_DMAC_TC_PER(0x0111);
239#endif
234} 240}
235#endif 241#endif
236 242
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
index 8de92299b3ee..b56bd8514b7c 100644
--- a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
+++ b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
@@ -120,6 +120,7 @@ MGR_ATTR static noinline int dcplb_miss(unsigned int cpu)
120 d_data = L2_DMEMORY; 120 d_data = L2_DMEMORY;
121 } else if (addr >= physical_mem_end) { 121 } else if (addr >= physical_mem_end) {
122 if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) { 122 if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) {
123#if defined(CONFIG_ROMFS_ON_MTD) && defined(CONFIG_MTD_ROM)
123 mask = current_rwx_mask[cpu]; 124 mask = current_rwx_mask[cpu];
124 if (mask) { 125 if (mask) {
125 int page = (addr - (ASYNC_BANK0_BASE - _ramend)) >> PAGE_SHIFT; 126 int page = (addr - (ASYNC_BANK0_BASE - _ramend)) >> PAGE_SHIFT;
@@ -129,6 +130,7 @@ MGR_ATTR static noinline int dcplb_miss(unsigned int cpu)
129 if (mask[idx] & bit) 130 if (mask[idx] & bit)
130 d_data |= CPLB_USER_RD; 131 d_data |= CPLB_USER_RD;
131 } 132 }
133#endif
132 } else if (addr >= BOOT_ROM_START && addr < BOOT_ROM_START + BOOT_ROM_LENGTH 134 } else if (addr >= BOOT_ROM_START && addr < BOOT_ROM_START + BOOT_ROM_LENGTH
133 && (status & (FAULT_RW | FAULT_USERSUPV)) == FAULT_USERSUPV) { 135 && (status & (FAULT_RW | FAULT_USERSUPV)) == FAULT_USERSUPV) {
134 addr &= ~(1 * 1024 * 1024 - 1); 136 addr &= ~(1 * 1024 * 1024 - 1);
diff --git a/arch/blackfin/kernel/ipipe.c b/arch/blackfin/kernel/ipipe.c
index dbe11220cc53..f657b38163e3 100644
--- a/arch/blackfin/kernel/ipipe.c
+++ b/arch/blackfin/kernel/ipipe.c
@@ -31,7 +31,6 @@
31#include <linux/kthread.h> 31#include <linux/kthread.h>
32#include <linux/unistd.h> 32#include <linux/unistd.h>
33#include <linux/io.h> 33#include <linux/io.h>
34#include <asm/system.h>
35#include <linux/atomic.h> 34#include <linux/atomic.h>
36#include <asm/irq_handler.h> 35#include <asm/irq_handler.h>
37 36
diff --git a/arch/blackfin/kernel/kgdb_test.c b/arch/blackfin/kernel/kgdb_test.c
index 4a7dcfea98af..18ab004aea1c 100644
--- a/arch/blackfin/kernel/kgdb_test.c
+++ b/arch/blackfin/kernel/kgdb_test.c
@@ -13,7 +13,6 @@
13 13
14#include <asm/current.h> 14#include <asm/current.h>
15#include <asm/uaccess.h> 15#include <asm/uaccess.h>
16#include <asm/system.h>
17 16
18#include <asm/blackfin.h> 17#include <asm/blackfin.h>
19 18
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index 8dd0416673cb..c0f4fe287eb6 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -19,6 +19,7 @@
19#include <asm/blackfin.h> 19#include <asm/blackfin.h>
20#include <asm/fixed_code.h> 20#include <asm/fixed_code.h>
21#include <asm/mem_map.h> 21#include <asm/mem_map.h>
22#include <asm/irq.h>
22 23
23asmlinkage void ret_from_fork(void); 24asmlinkage void ret_from_fork(void);
24 25
@@ -94,9 +95,7 @@ void cpu_idle(void)
94 idle(); 95 idle();
95 rcu_idle_exit(); 96 rcu_idle_exit();
96 tick_nohz_idle_exit(); 97 tick_nohz_idle_exit();
97 preempt_enable_no_resched(); 98 schedule_preempt_disabled();
98 schedule();
99 preempt_disable();
100 } 99 }
101} 100}
102 101
diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c
index 75089f80855d..e1f88e028cfe 100644
--- a/arch/blackfin/kernel/ptrace.c
+++ b/arch/blackfin/kernel/ptrace.c
@@ -20,7 +20,6 @@
20 20
21#include <asm/page.h> 21#include <asm/page.h>
22#include <asm/pgtable.h> 22#include <asm/pgtable.h>
23#include <asm/system.h>
24#include <asm/processor.h> 23#include <asm/processor.h>
25#include <asm/asm-offsets.h> 24#include <asm/asm-offsets.h>
26#include <asm/dma.h> 25#include <asm/dma.h>
diff --git a/arch/blackfin/kernel/reboot.c b/arch/blackfin/kernel/reboot.c
index c4c0081b1996..b0434f89e8de 100644
--- a/arch/blackfin/kernel/reboot.c
+++ b/arch/blackfin/kernel/reboot.c
@@ -9,7 +9,6 @@
9#include <linux/interrupt.h> 9#include <linux/interrupt.h>
10#include <asm/bfin-global.h> 10#include <asm/bfin-global.h>
11#include <asm/reboot.h> 11#include <asm/reboot.h>
12#include <asm/system.h>
13#include <asm/bfrom.h> 12#include <asm/bfrom.h>
14 13
15/* A system soft reset makes external memory unusable so force 14/* A system soft reset makes external memory unusable so force
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index d6102c86d037..2aa019368504 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -30,6 +30,7 @@
30#include <asm/fixed_code.h> 30#include <asm/fixed_code.h>
31#include <asm/early_printk.h> 31#include <asm/early_printk.h>
32#include <asm/irq_handler.h> 32#include <asm/irq_handler.h>
33#include <asm/pda.h>
33 34
34u16 _bfin_swrst; 35u16 _bfin_swrst;
35EXPORT_SYMBOL(_bfin_swrst); 36EXPORT_SYMBOL(_bfin_swrst);
diff --git a/arch/blackfin/kernel/trace.c b/arch/blackfin/kernel/trace.c
index 050db44fe919..44bbf2f564cb 100644
--- a/arch/blackfin/kernel/trace.c
+++ b/arch/blackfin/kernel/trace.c
@@ -21,6 +21,7 @@
21#include <asm/fixed_code.h> 21#include <asm/fixed_code.h>
22#include <asm/traps.h> 22#include <asm/traps.h>
23#include <asm/irq_handler.h> 23#include <asm/irq_handler.h>
24#include <asm/pda.h>
24 25
25void decode_address(char *buf, unsigned long address) 26void decode_address(char *buf, unsigned long address)
26{ 27{
diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c
index 655f25d139a7..de5c2c3ebd9b 100644
--- a/arch/blackfin/kernel/traps.c
+++ b/arch/blackfin/kernel/traps.c
@@ -17,6 +17,7 @@
17#include <asm/trace.h> 17#include <asm/trace.h>
18#include <asm/fixed_code.h> 18#include <asm/fixed_code.h>
19#include <asm/pseudo_instructions.h> 19#include <asm/pseudo_instructions.h>
20#include <asm/pda.h>
20 21
21#ifdef CONFIG_KGDB 22#ifdef CONFIG_KGDB
22# include <linux/kgdb.h> 23# include <linux/kgdb.h>
diff --git a/arch/blackfin/lib/ins.S b/arch/blackfin/lib/ins.S
index 79caccea85ca..d59608deccc1 100644
--- a/arch/blackfin/lib/ins.S
+++ b/arch/blackfin/lib/ins.S
@@ -66,7 +66,7 @@
66 * - turns interrupts off every loop (low overhead, but longer latency) 66 * - turns interrupts off every loop (low overhead, but longer latency)
67 * - DMA version, which do not suffer from this issue. DMA versions have 67 * - DMA version, which do not suffer from this issue. DMA versions have
68 * different name (prefixed by dma_ ), and are located in 68 * different name (prefixed by dma_ ), and are located in
69 * ../kernel/bfin_dma_5xx.c 69 * ../kernel/bfin_dma.c
70 * Using the dma related functions are recommended for transferring large 70 * Using the dma related functions are recommended for transferring large
71 * buffers in/out of FIFOs. 71 * buffers in/out of FIFOs.
72 */ 72 */
diff --git a/arch/blackfin/mach-bf518/boards/ezbrd.c b/arch/blackfin/mach-bf518/boards/ezbrd.c
index a2d96d31bbf1..a17395727efa 100644
--- a/arch/blackfin/mach-bf518/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf518/boards/ezbrd.c
@@ -821,7 +821,7 @@ void native_machine_restart(char *cmd)
821 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); 821 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
822} 822}
823 823
824void bfin_get_ether_addr(char *addr) 824int bfin_get_ether_addr(char *addr)
825{ 825{
826 /* the MAC is stored in OTP memory page 0xDF */ 826 /* the MAC is stored in OTP memory page 0xDF */
827 u32 ret; 827 u32 ret;
@@ -834,5 +834,6 @@ void bfin_get_ether_addr(char *addr)
834 for (ret = 0; ret < 6; ++ret) 834 for (ret = 0; ret < 6; ++ret)
835 addr[ret] = otp_mac_p[5 - ret]; 835 addr[ret] = otp_mac_p[5 - ret];
836 } 836 }
837 return 0;
837} 838}
838EXPORT_SYMBOL(bfin_get_ether_addr); 839EXPORT_SYMBOL(bfin_get_ether_addr);
diff --git a/arch/blackfin/mach-bf518/boards/tcm-bf518.c b/arch/blackfin/mach-bf518/boards/tcm-bf518.c
index f271310f739d..6eebee4e4217 100644
--- a/arch/blackfin/mach-bf518/boards/tcm-bf518.c
+++ b/arch/blackfin/mach-bf518/boards/tcm-bf518.c
@@ -730,9 +730,8 @@ void native_machine_restart(char *cmd)
730 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); 730 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
731} 731}
732 732
733void bfin_get_ether_addr(char *addr) 733int bfin_get_ether_addr(char *addr)
734{ 734{
735 random_ether_addr(addr); 735 return 1;
736 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
737} 736}
738EXPORT_SYMBOL(bfin_get_ether_addr); 737EXPORT_SYMBOL(bfin_get_ether_addr);
diff --git a/arch/blackfin/mach-bf527/boards/ad7160eval.c b/arch/blackfin/mach-bf527/boards/ad7160eval.c
index c8d5d2b7c732..fad7fea1b0bf 100644
--- a/arch/blackfin/mach-bf527/boards/ad7160eval.c
+++ b/arch/blackfin/mach-bf527/boards/ad7160eval.c
@@ -846,7 +846,7 @@ void native_machine_restart(char *cmd)
846 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); 846 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
847} 847}
848 848
849void bfin_get_ether_addr(char *addr) 849int bfin_get_ether_addr(char *addr)
850{ 850{
851 /* the MAC is stored in OTP memory page 0xDF */ 851 /* the MAC is stored in OTP memory page 0xDF */
852 u32 ret; 852 u32 ret;
@@ -859,5 +859,6 @@ void bfin_get_ether_addr(char *addr)
859 for (ret = 0; ret < 6; ++ret) 859 for (ret = 0; ret < 6; ++ret)
860 addr[ret] = otp_mac_p[5 - ret]; 860 addr[ret] = otp_mac_p[5 - ret];
861 } 861 }
862 return 0;
862} 863}
863EXPORT_SYMBOL(bfin_get_ether_addr); 864EXPORT_SYMBOL(bfin_get_ether_addr);
diff --git a/arch/blackfin/mach-bf527/boards/cm_bf527.c b/arch/blackfin/mach-bf527/boards/cm_bf527.c
index 7330607856e9..65b7fbd30e16 100644
--- a/arch/blackfin/mach-bf527/boards/cm_bf527.c
+++ b/arch/blackfin/mach-bf527/boards/cm_bf527.c
@@ -983,9 +983,8 @@ void native_machine_restart(char *cmd)
983 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); 983 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
984} 984}
985 985
986void bfin_get_ether_addr(char *addr) 986int bfin_get_ether_addr(char *addr)
987{ 987{
988 random_ether_addr(addr); 988 return 1;
989 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
990} 989}
991EXPORT_SYMBOL(bfin_get_ether_addr); 990EXPORT_SYMBOL(bfin_get_ether_addr);
diff --git a/arch/blackfin/mach-bf527/boards/ezbrd.c b/arch/blackfin/mach-bf527/boards/ezbrd.c
index db3ecfce8306..17c6a24cc076 100644
--- a/arch/blackfin/mach-bf527/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf527/boards/ezbrd.c
@@ -870,7 +870,7 @@ void native_machine_restart(char *cmd)
870 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); 870 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
871} 871}
872 872
873void bfin_get_ether_addr(char *addr) 873int bfin_get_ether_addr(char *addr)
874{ 874{
875 /* the MAC is stored in OTP memory page 0xDF */ 875 /* the MAC is stored in OTP memory page 0xDF */
876 u32 ret; 876 u32 ret;
@@ -883,5 +883,6 @@ void bfin_get_ether_addr(char *addr)
883 for (ret = 0; ret < 6; ++ret) 883 for (ret = 0; ret < 6; ++ret)
884 addr[ret] = otp_mac_p[5 - ret]; 884 addr[ret] = otp_mac_p[5 - ret];
885 } 885 }
886 return 0;
886} 887}
887EXPORT_SYMBOL(bfin_get_ether_addr); 888EXPORT_SYMBOL(bfin_get_ether_addr);
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index dfdd8e6bac72..2f9a2bd83ce4 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -1311,7 +1311,7 @@ void native_machine_restart(char *cmd)
1311 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); 1311 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
1312} 1312}
1313 1313
1314void bfin_get_ether_addr(char *addr) 1314int bfin_get_ether_addr(char *addr)
1315{ 1315{
1316 /* the MAC is stored in OTP memory page 0xDF */ 1316 /* the MAC is stored in OTP memory page 0xDF */
1317 u32 ret; 1317 u32 ret;
@@ -1324,5 +1324,6 @@ void bfin_get_ether_addr(char *addr)
1324 for (ret = 0; ret < 6; ++ret) 1324 for (ret = 0; ret < 6; ++ret)
1325 addr[ret] = otp_mac_p[5 - ret]; 1325 addr[ret] = otp_mac_p[5 - ret];
1326 } 1326 }
1327 return 0;
1327} 1328}
1328EXPORT_SYMBOL(bfin_get_ether_addr); 1329EXPORT_SYMBOL(bfin_get_ether_addr);
diff --git a/arch/blackfin/mach-bf527/boards/tll6527m.c b/arch/blackfin/mach-bf527/boards/tll6527m.c
index 360e97fc5293..d192c0ac941c 100644
--- a/arch/blackfin/mach-bf527/boards/tll6527m.c
+++ b/arch/blackfin/mach-bf527/boards/tll6527m.c
@@ -931,7 +931,7 @@ void native_machine_restart(char *cmd)
931 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); 931 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
932} 932}
933 933
934void bfin_get_ether_addr(char *addr) 934int bfin_get_ether_addr(char *addr)
935{ 935{
936 /* the MAC is stored in OTP memory page 0xDF */ 936 /* the MAC is stored in OTP memory page 0xDF */
937 u32 ret; 937 u32 ret;
@@ -945,5 +945,6 @@ void bfin_get_ether_addr(char *addr)
945 for (ret = 0; ret < 6; ++ret) 945 for (ret = 0; ret < 6; ++ret)
946 addr[ret] = otp_mac_p[5 - ret]; 946 addr[ret] = otp_mac_p[5 - ret];
947 } 947 }
948 return 0;
948} 949}
949EXPORT_SYMBOL(bfin_get_ether_addr); 950EXPORT_SYMBOL(bfin_get_ether_addr);
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537e.c b/arch/blackfin/mach-bf537/boards/cm_bf537e.c
index 0d4a2f61a973..27fd2c32ae9a 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537e.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537e.c
@@ -813,9 +813,8 @@ void __init native_machine_early_platform_add_devices(void)
813 ARRAY_SIZE(cm_bf537e_early_devices)); 813 ARRAY_SIZE(cm_bf537e_early_devices));
814} 814}
815 815
816void bfin_get_ether_addr(char *addr) 816int bfin_get_ether_addr(char *addr)
817{ 817{
818 random_ether_addr(addr); 818 return 1;
819 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
820} 819}
821EXPORT_SYMBOL(bfin_get_ether_addr); 820EXPORT_SYMBOL(bfin_get_ether_addr);
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537u.c b/arch/blackfin/mach-bf537/boards/cm_bf537u.c
index f5536982706c..3f3abad86ec3 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537u.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537u.c
@@ -790,9 +790,8 @@ void __init native_machine_early_platform_add_devices(void)
790 ARRAY_SIZE(cm_bf537u_early_devices)); 790 ARRAY_SIZE(cm_bf537u_early_devices));
791} 791}
792 792
793void bfin_get_ether_addr(char *addr) 793int bfin_get_ether_addr(char *addr)
794{ 794{
795 random_ether_addr(addr); 795 return 1;
796 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
797} 796}
798EXPORT_SYMBOL(bfin_get_ether_addr); 797EXPORT_SYMBOL(bfin_get_ether_addr);
diff --git a/arch/blackfin/mach-bf537/boards/dnp5370.c b/arch/blackfin/mach-bf537/boards/dnp5370.c
index 11dadeb33d79..6f77bf708ec0 100644
--- a/arch/blackfin/mach-bf537/boards/dnp5370.c
+++ b/arch/blackfin/mach-bf537/boards/dnp5370.c
@@ -399,9 +399,10 @@ arch_initcall(dnp5370_init);
399/* 399/*
400 * Currently the MAC address is saved in Flash by U-Boot 400 * Currently the MAC address is saved in Flash by U-Boot
401 */ 401 */
402void bfin_get_ether_addr(char *addr) 402int bfin_get_ether_addr(char *addr)
403{ 403{
404 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC); 404 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
405 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4); 405 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
406 return 0;
406} 407}
407EXPORT_SYMBOL(bfin_get_ether_addr); 408EXPORT_SYMBOL(bfin_get_ether_addr);
diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c
index 6fd84709fc68..6b395510405b 100644
--- a/arch/blackfin/mach-bf537/boards/pnav10.c
+++ b/arch/blackfin/mach-bf537/boards/pnav10.c
@@ -101,7 +101,6 @@ static struct platform_device smc91x_device = {
101 101
102#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 102#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
103#include <linux/bfin_mac.h> 103#include <linux/bfin_mac.h>
104#include <linux/export.h>
105static const unsigned short bfin_mac_peripherals[] = P_RMII0; 104static const unsigned short bfin_mac_peripherals[] = P_RMII0;
106 105
107static struct bfin_phydev_platform_data bfin_phydev_data[] = { 106static struct bfin_phydev_platform_data bfin_phydev_data[] = {
@@ -535,9 +534,8 @@ void __init native_machine_early_platform_add_devices(void)
535 ARRAY_SIZE(stamp_early_devices)); 534 ARRAY_SIZE(stamp_early_devices));
536} 535}
537 536
538void bfin_get_ether_addr(char *addr) 537int bfin_get_ether_addr(char *addr)
539{ 538{
540 random_ether_addr(addr); 539 return 1;
541 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
542} 540}
543EXPORT_SYMBOL(bfin_get_ether_addr); 541EXPORT_SYMBOL(bfin_get_ether_addr);
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index 2221173e489e..f3562b0922af 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -975,7 +975,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
975 }, 975 },
976#endif 976#endif
977 977
978#if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE) 978#ifdef CONFIG_SND_SOC_AD193X_SPI
979 { 979 {
980 .modalias = "ad193x", 980 .modalias = "ad193x",
981 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 981 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
@@ -2171,7 +2171,7 @@ static unsigned long adt7316_i2c_data[2] = {
2171#endif 2171#endif
2172 2172
2173static struct i2c_board_info __initdata bfin_i2c_board_info[] = { 2173static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
2174#if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE) 2174#ifdef CONFIG_SND_SOC_AD193X_I2C
2175 { 2175 {
2176 I2C_BOARD_INFO("ad1937", 0x04), 2176 I2C_BOARD_INFO("ad1937", 0x04),
2177 }, 2177 },
@@ -2593,6 +2593,21 @@ static struct platform_device bfin_ac97_pcm = {
2593}; 2593};
2594#endif 2594#endif
2595 2595
2596#if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \
2597 defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
2598static const unsigned ad73311_gpio[] = {
2599 GPIO_PF4,
2600};
2601
2602static struct platform_device bfin_ad73311_machine = {
2603 .name = "bfin-snd-ad73311",
2604 .id = 1,
2605 .dev = {
2606 .platform_data = (void *)ad73311_gpio,
2607 },
2608};
2609#endif
2610
2596#if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE) 2611#if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE)
2597static struct platform_device bfin_ad73311_codec_device = { 2612static struct platform_device bfin_ad73311_codec_device = {
2598 .name = "ad73311", 2613 .name = "ad73311",
@@ -2862,6 +2877,11 @@ static struct platform_device *stamp_devices[] __initdata = {
2862 &bfin_ac97_pcm, 2877 &bfin_ac97_pcm,
2863#endif 2878#endif
2864 2879
2880#if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \
2881 defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
2882 &bfin_ad73311_machine,
2883#endif
2884
2865#if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE) 2885#if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE)
2866 &bfin_ad73311_codec_device, 2886 &bfin_ad73311_codec_device,
2867#endif 2887#endif
@@ -2993,9 +3013,10 @@ void native_machine_restart(char *cmd)
2993 * Currently the MAC address is saved in Flash by U-Boot 3013 * Currently the MAC address is saved in Flash by U-Boot
2994 */ 3014 */
2995#define FLASH_MAC 0x203f0000 3015#define FLASH_MAC 0x203f0000
2996void bfin_get_ether_addr(char *addr) 3016int bfin_get_ether_addr(char *addr)
2997{ 3017{
2998 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC); 3018 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
2999 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4); 3019 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
3020 return 0;
3000} 3021}
3001EXPORT_SYMBOL(bfin_get_ether_addr); 3022EXPORT_SYMBOL(bfin_get_ether_addr);
diff --git a/arch/blackfin/mach-bf537/boards/tcm_bf537.c b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
index 988517671a5d..3fb421823857 100644
--- a/arch/blackfin/mach-bf537/boards/tcm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
@@ -780,9 +780,8 @@ void __init native_machine_early_platform_add_devices(void)
780 ARRAY_SIZE(cm_bf537_early_devices)); 780 ARRAY_SIZE(cm_bf537_early_devices));
781} 781}
782 782
783void bfin_get_ether_addr(char *addr) 783int bfin_get_ether_addr(char *addr)
784{ 784{
785 random_ether_addr(addr); 785 return 1;
786 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
787} 786}
788EXPORT_SYMBOL(bfin_get_ether_addr); 787EXPORT_SYMBOL(bfin_get_ether_addr);
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index 3ea45f8bd61c..4cadaf8d0b56 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -1237,6 +1237,8 @@ static struct bfin_capture_config bfin_capture_data = {
1237 }, 1237 },
1238 .ppi_info = &ppi_info, 1238 .ppi_info = &ppi_info,
1239 .ppi_control = (POLC | PACKEN | DLEN_8 | XFR_TYPE | 0x20), 1239 .ppi_control = (POLC | PACKEN | DLEN_8 | XFR_TYPE | 0x20),
1240 .int_mask = 0xFFFFFFFF, /* disable error interrupt on eppi */
1241 .blank_clocks = 8, /* 8 clocks as SAV and EAV */
1240}; 1242};
1241#endif 1243#endif
1242 1244
@@ -1293,6 +1295,11 @@ static struct platform_device i2c_bfin_twi1_device = {
1293#endif 1295#endif
1294 1296
1295static struct i2c_board_info __initdata bfin_i2c_board_info0[] = { 1297static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
1298#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
1299 {
1300 I2C_BOARD_INFO("ssm2602", 0x1b),
1301 },
1302#endif
1296}; 1303};
1297 1304
1298#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */ 1305#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
@@ -1385,6 +1392,8 @@ static struct platform_device bfin_dpmc = {
1385static const u16 bfin_snd_pin[][7] = { 1392static const u16 bfin_snd_pin[][7] = {
1386 SPORT_REQ(0), 1393 SPORT_REQ(0),
1387 SPORT_REQ(1), 1394 SPORT_REQ(1),
1395 SPORT_REQ(2),
1396 SPORT_REQ(3),
1388}; 1397};
1389 1398
1390static struct bfin_snd_platform_data bfin_snd_data[] = { 1399static struct bfin_snd_platform_data bfin_snd_data[] = {
@@ -1394,6 +1403,12 @@ static struct bfin_snd_platform_data bfin_snd_data[] = {
1394 { 1403 {
1395 .pin_req = &bfin_snd_pin[1][0], 1404 .pin_req = &bfin_snd_pin[1][0],
1396 }, 1405 },
1406 {
1407 .pin_req = &bfin_snd_pin[2][0],
1408 },
1409 {
1410 .pin_req = &bfin_snd_pin[3][0],
1411 },
1397}; 1412};
1398 1413
1399#define BFIN_SND_RES(x) \ 1414#define BFIN_SND_RES(x) \
@@ -1423,10 +1438,28 @@ static struct bfin_snd_platform_data bfin_snd_data[] = {
1423static struct resource bfin_snd_resources[][4] = { 1438static struct resource bfin_snd_resources[][4] = {
1424 BFIN_SND_RES(0), 1439 BFIN_SND_RES(0),
1425 BFIN_SND_RES(1), 1440 BFIN_SND_RES(1),
1441 BFIN_SND_RES(2),
1442 BFIN_SND_RES(3),
1426}; 1443};
1444#endif
1427 1445
1428static struct platform_device bfin_pcm = { 1446#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1429 .name = "bfin-pcm-audio", 1447static struct platform_device bfin_i2s_pcm = {
1448 .name = "bfin-i2s-pcm-audio",
1449 .id = -1,
1450};
1451#endif
1452
1453#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1454static struct platform_device bfin_tdm_pcm = {
1455 .name = "bfin-tdm-pcm-audio",
1456 .id = -1,
1457};
1458#endif
1459
1460#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
1461static struct platform_device bfin_ac97_pcm = {
1462 .name = "bfin-ac97-pcm-audio",
1430 .id = -1, 1463 .id = -1,
1431}; 1464};
1432#endif 1465#endif
@@ -1599,10 +1632,14 @@ static struct platform_device *ezkit_devices[] __initdata = {
1599 &ezkit_flash_device, 1632 &ezkit_flash_device,
1600#endif 1633#endif
1601 1634
1602#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \ 1635#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1603 defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) || \ 1636 &bfin_i2s_pcm,
1604 defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE) 1637#endif
1605 &bfin_pcm, 1638#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1639 &bfin_tdm_pcm,
1640#endif
1641#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
1642 &bfin_ac97_pcm,
1606#endif 1643#endif
1607 1644
1608#if defined(CONFIG_SND_BF5XX_SOC_AD1980) || defined(CONFIG_SND_BF5XX_SOC_AD1980_MODULE) 1645#if defined(CONFIG_SND_BF5XX_SOC_AD1980) || defined(CONFIG_SND_BF5XX_SOC_AD1980_MODULE)
diff --git a/arch/blackfin/mach-bf561/atomic.S b/arch/blackfin/mach-bf561/atomic.S
index 52d6f73fcced..2a08df8e8c4c 100644
--- a/arch/blackfin/mach-bf561/atomic.S
+++ b/arch/blackfin/mach-bf561/atomic.S
@@ -72,6 +72,13 @@ ENTRY(_get_core_lock_noflush)
72 SSYNC(r2); 72 SSYNC(r2);
73 jump .Lretry_corelock_noflush 73 jump .Lretry_corelock_noflush
74.Ldone_corelock_noflush: 74.Ldone_corelock_noflush:
75 /*
76 * SMP kgdb runs into dead loop without NOP here, when one core
77 * single steps over get_core_lock_noflush and the other executes
78 * get_core_lock as a slave node.
79 */
80 nop;
81 CSYNC(r2);
75 rts; 82 rts;
76ENDPROC(_get_core_lock_noflush) 83ENDPROC(_get_core_lock_noflush)
77 84
diff --git a/arch/blackfin/mach-bf561/include/mach/defBF561.h b/arch/blackfin/mach-bf561/include/mach/defBF561.h
index 71e805ea74e5..5f0ac5a77a37 100644
--- a/arch/blackfin/mach-bf561/include/mach/defBF561.h
+++ b/arch/blackfin/mach-bf561/include/mach/defBF561.h
@@ -479,61 +479,61 @@
479#define DMA1_11_PERIPHERAL_MAP 0xFFC01EEC /* DMA1 Channel 11 Peripheral Map Register */ 479#define DMA1_11_PERIPHERAL_MAP 0xFFC01EEC /* DMA1 Channel 11 Peripheral Map Register */
480 480
481/* Memory DMA1 Controller registers (0xFFC0 1E80-0xFFC0 1FFF) */ 481/* Memory DMA1 Controller registers (0xFFC0 1E80-0xFFC0 1FFF) */
482#define MDMA_D2_CONFIG 0xFFC01F08 /*MemDMA1 Stream 0 Destination Configuration */ 482#define MDMA_D0_CONFIG 0xFFC01F08 /*MemDMA1 Stream 0 Destination Configuration */
483#define MDMA_D2_NEXT_DESC_PTR 0xFFC01F00 /*MemDMA1 Stream 0 Destination Next Descriptor Ptr Reg */ 483#define MDMA_D0_NEXT_DESC_PTR 0xFFC01F00 /*MemDMA1 Stream 0 Destination Next Descriptor Ptr Reg */
484#define MDMA_D2_START_ADDR 0xFFC01F04 /*MemDMA1 Stream 0 Destination Start Address */ 484#define MDMA_D0_START_ADDR 0xFFC01F04 /*MemDMA1 Stream 0 Destination Start Address */
485#define MDMA_D2_X_COUNT 0xFFC01F10 /*MemDMA1 Stream 0 Destination Inner-Loop Count */ 485#define MDMA_D0_X_COUNT 0xFFC01F10 /*MemDMA1 Stream 0 Destination Inner-Loop Count */
486#define MDMA_D2_Y_COUNT 0xFFC01F18 /*MemDMA1 Stream 0 Destination Outer-Loop Count */ 486#define MDMA_D0_Y_COUNT 0xFFC01F18 /*MemDMA1 Stream 0 Destination Outer-Loop Count */
487#define MDMA_D2_X_MODIFY 0xFFC01F14 /*MemDMA1 Stream 0 Dest Inner-Loop Address-Increment */ 487#define MDMA_D0_X_MODIFY 0xFFC01F14 /*MemDMA1 Stream 0 Dest Inner-Loop Address-Increment */
488#define MDMA_D2_Y_MODIFY 0xFFC01F1C /*MemDMA1 Stream 0 Dest Outer-Loop Address-Increment */ 488#define MDMA_D0_Y_MODIFY 0xFFC01F1C /*MemDMA1 Stream 0 Dest Outer-Loop Address-Increment */
489#define MDMA_D2_CURR_DESC_PTR 0xFFC01F20 /*MemDMA1 Stream 0 Dest Current Descriptor Ptr reg */ 489#define MDMA_D0_CURR_DESC_PTR 0xFFC01F20 /*MemDMA1 Stream 0 Dest Current Descriptor Ptr reg */
490#define MDMA_D2_CURR_ADDR 0xFFC01F24 /*MemDMA1 Stream 0 Destination Current Address */ 490#define MDMA_D0_CURR_ADDR 0xFFC01F24 /*MemDMA1 Stream 0 Destination Current Address */
491#define MDMA_D2_CURR_X_COUNT 0xFFC01F30 /*MemDMA1 Stream 0 Dest Current Inner-Loop Count */ 491#define MDMA_D0_CURR_X_COUNT 0xFFC01F30 /*MemDMA1 Stream 0 Dest Current Inner-Loop Count */
492#define MDMA_D2_CURR_Y_COUNT 0xFFC01F38 /*MemDMA1 Stream 0 Dest Current Outer-Loop Count */ 492#define MDMA_D0_CURR_Y_COUNT 0xFFC01F38 /*MemDMA1 Stream 0 Dest Current Outer-Loop Count */
493#define MDMA_D2_IRQ_STATUS 0xFFC01F28 /*MemDMA1 Stream 0 Destination Interrupt/Status */ 493#define MDMA_D0_IRQ_STATUS 0xFFC01F28 /*MemDMA1 Stream 0 Destination Interrupt/Status */
494#define MDMA_D2_PERIPHERAL_MAP 0xFFC01F2C /*MemDMA1 Stream 0 Destination Peripheral Map */ 494#define MDMA_D0_PERIPHERAL_MAP 0xFFC01F2C /*MemDMA1 Stream 0 Destination Peripheral Map */
495 495
496#define MDMA_S2_CONFIG 0xFFC01F48 /*MemDMA1 Stream 0 Source Configuration */ 496#define MDMA_S0_CONFIG 0xFFC01F48 /*MemDMA1 Stream 0 Source Configuration */
497#define MDMA_S2_NEXT_DESC_PTR 0xFFC01F40 /*MemDMA1 Stream 0 Source Next Descriptor Ptr Reg */ 497#define MDMA_S0_NEXT_DESC_PTR 0xFFC01F40 /*MemDMA1 Stream 0 Source Next Descriptor Ptr Reg */
498#define MDMA_S2_START_ADDR 0xFFC01F44 /*MemDMA1 Stream 0 Source Start Address */ 498#define MDMA_S0_START_ADDR 0xFFC01F44 /*MemDMA1 Stream 0 Source Start Address */
499#define MDMA_S2_X_COUNT 0xFFC01F50 /*MemDMA1 Stream 0 Source Inner-Loop Count */ 499#define MDMA_S0_X_COUNT 0xFFC01F50 /*MemDMA1 Stream 0 Source Inner-Loop Count */
500#define MDMA_S2_Y_COUNT 0xFFC01F58 /*MemDMA1 Stream 0 Source Outer-Loop Count */ 500#define MDMA_S0_Y_COUNT 0xFFC01F58 /*MemDMA1 Stream 0 Source Outer-Loop Count */
501#define MDMA_S2_X_MODIFY 0xFFC01F54 /*MemDMA1 Stream 0 Source Inner-Loop Address-Increment */ 501#define MDMA_S0_X_MODIFY 0xFFC01F54 /*MemDMA1 Stream 0 Source Inner-Loop Address-Increment */
502#define MDMA_S2_Y_MODIFY 0xFFC01F5C /*MemDMA1 Stream 0 Source Outer-Loop Address-Increment */ 502#define MDMA_S0_Y_MODIFY 0xFFC01F5C /*MemDMA1 Stream 0 Source Outer-Loop Address-Increment */
503#define MDMA_S2_CURR_DESC_PTR 0xFFC01F60 /*MemDMA1 Stream 0 Source Current Descriptor Ptr reg */ 503#define MDMA_S0_CURR_DESC_PTR 0xFFC01F60 /*MemDMA1 Stream 0 Source Current Descriptor Ptr reg */
504#define MDMA_S2_CURR_ADDR 0xFFC01F64 /*MemDMA1 Stream 0 Source Current Address */ 504#define MDMA_S0_CURR_ADDR 0xFFC01F64 /*MemDMA1 Stream 0 Source Current Address */
505#define MDMA_S2_CURR_X_COUNT 0xFFC01F70 /*MemDMA1 Stream 0 Source Current Inner-Loop Count */ 505#define MDMA_S0_CURR_X_COUNT 0xFFC01F70 /*MemDMA1 Stream 0 Source Current Inner-Loop Count */
506#define MDMA_S2_CURR_Y_COUNT 0xFFC01F78 /*MemDMA1 Stream 0 Source Current Outer-Loop Count */ 506#define MDMA_S0_CURR_Y_COUNT 0xFFC01F78 /*MemDMA1 Stream 0 Source Current Outer-Loop Count */
507#define MDMA_S2_IRQ_STATUS 0xFFC01F68 /*MemDMA1 Stream 0 Source Interrupt/Status */ 507#define MDMA_S0_IRQ_STATUS 0xFFC01F68 /*MemDMA1 Stream 0 Source Interrupt/Status */
508#define MDMA_S2_PERIPHERAL_MAP 0xFFC01F6C /*MemDMA1 Stream 0 Source Peripheral Map */ 508#define MDMA_S0_PERIPHERAL_MAP 0xFFC01F6C /*MemDMA1 Stream 0 Source Peripheral Map */
509 509
510#define MDMA_D3_CONFIG 0xFFC01F88 /*MemDMA1 Stream 1 Destination Configuration */ 510#define MDMA_D1_CONFIG 0xFFC01F88 /*MemDMA1 Stream 1 Destination Configuration */
511#define MDMA_D3_NEXT_DESC_PTR 0xFFC01F80 /*MemDMA1 Stream 1 Destination Next Descriptor Ptr Reg */ 511#define MDMA_D1_NEXT_DESC_PTR 0xFFC01F80 /*MemDMA1 Stream 1 Destination Next Descriptor Ptr Reg */
512#define MDMA_D3_START_ADDR 0xFFC01F84 /*MemDMA1 Stream 1 Destination Start Address */ 512#define MDMA_D1_START_ADDR 0xFFC01F84 /*MemDMA1 Stream 1 Destination Start Address */
513#define MDMA_D3_X_COUNT 0xFFC01F90 /*MemDMA1 Stream 1 Destination Inner-Loop Count */ 513#define MDMA_D1_X_COUNT 0xFFC01F90 /*MemDMA1 Stream 1 Destination Inner-Loop Count */
514#define MDMA_D3_Y_COUNT 0xFFC01F98 /*MemDMA1 Stream 1 Destination Outer-Loop Count */ 514#define MDMA_D1_Y_COUNT 0xFFC01F98 /*MemDMA1 Stream 1 Destination Outer-Loop Count */
515#define MDMA_D3_X_MODIFY 0xFFC01F94 /*MemDMA1 Stream 1 Dest Inner-Loop Address-Increment */ 515#define MDMA_D1_X_MODIFY 0xFFC01F94 /*MemDMA1 Stream 1 Dest Inner-Loop Address-Increment */
516#define MDMA_D3_Y_MODIFY 0xFFC01F9C /*MemDMA1 Stream 1 Dest Outer-Loop Address-Increment */ 516#define MDMA_D1_Y_MODIFY 0xFFC01F9C /*MemDMA1 Stream 1 Dest Outer-Loop Address-Increment */
517#define MDMA_D3_CURR_DESC_PTR 0xFFC01FA0 /*MemDMA1 Stream 1 Dest Current Descriptor Ptr reg */ 517#define MDMA_D1_CURR_DESC_PTR 0xFFC01FA0 /*MemDMA1 Stream 1 Dest Current Descriptor Ptr reg */
518#define MDMA_D3_CURR_ADDR 0xFFC01FA4 /*MemDMA1 Stream 1 Dest Current Address */ 518#define MDMA_D1_CURR_ADDR 0xFFC01FA4 /*MemDMA1 Stream 1 Dest Current Address */
519#define MDMA_D3_CURR_X_COUNT 0xFFC01FB0 /*MemDMA1 Stream 1 Dest Current Inner-Loop Count */ 519#define MDMA_D1_CURR_X_COUNT 0xFFC01FB0 /*MemDMA1 Stream 1 Dest Current Inner-Loop Count */
520#define MDMA_D3_CURR_Y_COUNT 0xFFC01FB8 /*MemDMA1 Stream 1 Dest Current Outer-Loop Count */ 520#define MDMA_D1_CURR_Y_COUNT 0xFFC01FB8 /*MemDMA1 Stream 1 Dest Current Outer-Loop Count */
521#define MDMA_D3_IRQ_STATUS 0xFFC01FA8 /*MemDMA1 Stream 1 Dest Interrupt/Status */ 521#define MDMA_D1_IRQ_STATUS 0xFFC01FA8 /*MemDMA1 Stream 1 Dest Interrupt/Status */
522#define MDMA_D3_PERIPHERAL_MAP 0xFFC01FAC /*MemDMA1 Stream 1 Dest Peripheral Map */ 522#define MDMA_D1_PERIPHERAL_MAP 0xFFC01FAC /*MemDMA1 Stream 1 Dest Peripheral Map */
523 523
524#define MDMA_S3_CONFIG 0xFFC01FC8 /*MemDMA1 Stream 1 Source Configuration */ 524#define MDMA_S1_CONFIG 0xFFC01FC8 /*MemDMA1 Stream 1 Source Configuration */
525#define MDMA_S3_NEXT_DESC_PTR 0xFFC01FC0 /*MemDMA1 Stream 1 Source Next Descriptor Ptr Reg */ 525#define MDMA_S1_NEXT_DESC_PTR 0xFFC01FC0 /*MemDMA1 Stream 1 Source Next Descriptor Ptr Reg */
526#define MDMA_S3_START_ADDR 0xFFC01FC4 /*MemDMA1 Stream 1 Source Start Address */ 526#define MDMA_S1_START_ADDR 0xFFC01FC4 /*MemDMA1 Stream 1 Source Start Address */
527#define MDMA_S3_X_COUNT 0xFFC01FD0 /*MemDMA1 Stream 1 Source Inner-Loop Count */ 527#define MDMA_S1_X_COUNT 0xFFC01FD0 /*MemDMA1 Stream 1 Source Inner-Loop Count */
528#define MDMA_S3_Y_COUNT 0xFFC01FD8 /*MemDMA1 Stream 1 Source Outer-Loop Count */ 528#define MDMA_S1_Y_COUNT 0xFFC01FD8 /*MemDMA1 Stream 1 Source Outer-Loop Count */
529#define MDMA_S3_X_MODIFY 0xFFC01FD4 /*MemDMA1 Stream 1 Source Inner-Loop Address-Increment */ 529#define MDMA_S1_X_MODIFY 0xFFC01FD4 /*MemDMA1 Stream 1 Source Inner-Loop Address-Increment */
530#define MDMA_S3_Y_MODIFY 0xFFC01FDC /*MemDMA1 Stream 1 Source Outer-Loop Address-Increment */ 530#define MDMA_S1_Y_MODIFY 0xFFC01FDC /*MemDMA1 Stream 1 Source Outer-Loop Address-Increment */
531#define MDMA_S3_CURR_DESC_PTR 0xFFC01FE0 /*MemDMA1 Stream 1 Source Current Descriptor Ptr reg */ 531#define MDMA_S1_CURR_DESC_PTR 0xFFC01FE0 /*MemDMA1 Stream 1 Source Current Descriptor Ptr reg */
532#define MDMA_S3_CURR_ADDR 0xFFC01FE4 /*MemDMA1 Stream 1 Source Current Address */ 532#define MDMA_S1_CURR_ADDR 0xFFC01FE4 /*MemDMA1 Stream 1 Source Current Address */
533#define MDMA_S3_CURR_X_COUNT 0xFFC01FF0 /*MemDMA1 Stream 1 Source Current Inner-Loop Count */ 533#define MDMA_S1_CURR_X_COUNT 0xFFC01FF0 /*MemDMA1 Stream 1 Source Current Inner-Loop Count */
534#define MDMA_S3_CURR_Y_COUNT 0xFFC01FF8 /*MemDMA1 Stream 1 Source Current Outer-Loop Count */ 534#define MDMA_S1_CURR_Y_COUNT 0xFFC01FF8 /*MemDMA1 Stream 1 Source Current Outer-Loop Count */
535#define MDMA_S3_IRQ_STATUS 0xFFC01FE8 /*MemDMA1 Stream 1 Source Interrupt/Status */ 535#define MDMA_S1_IRQ_STATUS 0xFFC01FE8 /*MemDMA1 Stream 1 Source Interrupt/Status */
536#define MDMA_S3_PERIPHERAL_MAP 0xFFC01FEC /*MemDMA1 Stream 1 Source Peripheral Map */ 536#define MDMA_S1_PERIPHERAL_MAP 0xFFC01FEC /*MemDMA1 Stream 1 Source Peripheral Map */
537 537
538/* DMA2 Controller registers (0xFFC0 0C00-0xFFC0 0DFF) */ 538/* DMA2 Controller registers (0xFFC0 0C00-0xFFC0 0DFF) */
539#define DMA2_0_CONFIG 0xFFC00C08 /* DMA2 Channel 0 Configuration register */ 539#define DMA2_0_CONFIG 0xFFC00C08 /* DMA2 Channel 0 Configuration register */
@@ -705,61 +705,61 @@
705#define DMA2_11_PERIPHERAL_MAP 0xFFC00EEC /* DMA2 Channel 11 Peripheral Map Register */ 705#define DMA2_11_PERIPHERAL_MAP 0xFFC00EEC /* DMA2 Channel 11 Peripheral Map Register */
706 706
707/* Memory DMA2 Controller registers (0xFFC0 0E80-0xFFC0 0FFF) */ 707/* Memory DMA2 Controller registers (0xFFC0 0E80-0xFFC0 0FFF) */
708#define MDMA_D0_CONFIG 0xFFC00F08 /*MemDMA2 Stream 0 Destination Configuration register */ 708#define MDMA_D2_CONFIG 0xFFC00F08 /*MemDMA2 Stream 0 Destination Configuration register */
709#define MDMA_D0_NEXT_DESC_PTR 0xFFC00F00 /*MemDMA2 Stream 0 Destination Next Descriptor Ptr Reg */ 709#define MDMA_D2_NEXT_DESC_PTR 0xFFC00F00 /*MemDMA2 Stream 0 Destination Next Descriptor Ptr Reg */
710#define MDMA_D0_START_ADDR 0xFFC00F04 /*MemDMA2 Stream 0 Destination Start Address */ 710#define MDMA_D2_START_ADDR 0xFFC00F04 /*MemDMA2 Stream 0 Destination Start Address */
711#define MDMA_D0_X_COUNT 0xFFC00F10 /*MemDMA2 Stream 0 Dest Inner-Loop Count register */ 711#define MDMA_D2_X_COUNT 0xFFC00F10 /*MemDMA2 Stream 0 Dest Inner-Loop Count register */
712#define MDMA_D0_Y_COUNT 0xFFC00F18 /*MemDMA2 Stream 0 Dest Outer-Loop Count register */ 712#define MDMA_D2_Y_COUNT 0xFFC00F18 /*MemDMA2 Stream 0 Dest Outer-Loop Count register */
713#define MDMA_D0_X_MODIFY 0xFFC00F14 /*MemDMA2 Stream 0 Dest Inner-Loop Address-Increment */ 713#define MDMA_D2_X_MODIFY 0xFFC00F14 /*MemDMA2 Stream 0 Dest Inner-Loop Address-Increment */
714#define MDMA_D0_Y_MODIFY 0xFFC00F1C /*MemDMA2 Stream 0 Dest Outer-Loop Address-Increment */ 714#define MDMA_D2_Y_MODIFY 0xFFC00F1C /*MemDMA2 Stream 0 Dest Outer-Loop Address-Increment */
715#define MDMA_D0_CURR_DESC_PTR 0xFFC00F20 /*MemDMA2 Stream 0 Dest Current Descriptor Ptr reg */ 715#define MDMA_D2_CURR_DESC_PTR 0xFFC00F20 /*MemDMA2 Stream 0 Dest Current Descriptor Ptr reg */
716#define MDMA_D0_CURR_ADDR 0xFFC00F24 /*MemDMA2 Stream 0 Destination Current Address */ 716#define MDMA_D2_CURR_ADDR 0xFFC00F24 /*MemDMA2 Stream 0 Destination Current Address */
717#define MDMA_D0_CURR_X_COUNT 0xFFC00F30 /*MemDMA2 Stream 0 Dest Current Inner-Loop Count reg */ 717#define MDMA_D2_CURR_X_COUNT 0xFFC00F30 /*MemDMA2 Stream 0 Dest Current Inner-Loop Count reg */
718#define MDMA_D0_CURR_Y_COUNT 0xFFC00F38 /*MemDMA2 Stream 0 Dest Current Outer-Loop Count reg */ 718#define MDMA_D2_CURR_Y_COUNT 0xFFC00F38 /*MemDMA2 Stream 0 Dest Current Outer-Loop Count reg */
719#define MDMA_D0_IRQ_STATUS 0xFFC00F28 /*MemDMA2 Stream 0 Dest Interrupt/Status Register */ 719#define MDMA_D2_IRQ_STATUS 0xFFC00F28 /*MemDMA2 Stream 0 Dest Interrupt/Status Register */
720#define MDMA_D0_PERIPHERAL_MAP 0xFFC00F2C /*MemDMA2 Stream 0 Destination Peripheral Map register */ 720#define MDMA_D2_PERIPHERAL_MAP 0xFFC00F2C /*MemDMA2 Stream 0 Destination Peripheral Map register */
721 721
722#define MDMA_S0_CONFIG 0xFFC00F48 /*MemDMA2 Stream 0 Source Configuration register */ 722#define MDMA_S2_CONFIG 0xFFC00F48 /*MemDMA2 Stream 0 Source Configuration register */
723#define MDMA_S0_NEXT_DESC_PTR 0xFFC00F40 /*MemDMA2 Stream 0 Source Next Descriptor Ptr Reg */ 723#define MDMA_S2_NEXT_DESC_PTR 0xFFC00F40 /*MemDMA2 Stream 0 Source Next Descriptor Ptr Reg */
724#define MDMA_S0_START_ADDR 0xFFC00F44 /*MemDMA2 Stream 0 Source Start Address */ 724#define MDMA_S2_START_ADDR 0xFFC00F44 /*MemDMA2 Stream 0 Source Start Address */
725#define MDMA_S0_X_COUNT 0xFFC00F50 /*MemDMA2 Stream 0 Source Inner-Loop Count register */ 725#define MDMA_S2_X_COUNT 0xFFC00F50 /*MemDMA2 Stream 0 Source Inner-Loop Count register */
726#define MDMA_S0_Y_COUNT 0xFFC00F58 /*MemDMA2 Stream 0 Source Outer-Loop Count register */ 726#define MDMA_S2_Y_COUNT 0xFFC00F58 /*MemDMA2 Stream 0 Source Outer-Loop Count register */
727#define MDMA_S0_X_MODIFY 0xFFC00F54 /*MemDMA2 Stream 0 Src Inner-Loop Addr-Increment reg */ 727#define MDMA_S2_X_MODIFY 0xFFC00F54 /*MemDMA2 Stream 0 Src Inner-Loop Addr-Increment reg */
728#define MDMA_S0_Y_MODIFY 0xFFC00F5C /*MemDMA2 Stream 0 Src Outer-Loop Addr-Increment reg */ 728#define MDMA_S2_Y_MODIFY 0xFFC00F5C /*MemDMA2 Stream 0 Src Outer-Loop Addr-Increment reg */
729#define MDMA_S0_CURR_DESC_PTR 0xFFC00F60 /*MemDMA2 Stream 0 Source Current Descriptor Ptr reg */ 729#define MDMA_S2_CURR_DESC_PTR 0xFFC00F60 /*MemDMA2 Stream 0 Source Current Descriptor Ptr reg */
730#define MDMA_S0_CURR_ADDR 0xFFC00F64 /*MemDMA2 Stream 0 Source Current Address */ 730#define MDMA_S2_CURR_ADDR 0xFFC00F64 /*MemDMA2 Stream 0 Source Current Address */
731#define MDMA_S0_CURR_X_COUNT 0xFFC00F70 /*MemDMA2 Stream 0 Src Current Inner-Loop Count reg */ 731#define MDMA_S2_CURR_X_COUNT 0xFFC00F70 /*MemDMA2 Stream 0 Src Current Inner-Loop Count reg */
732#define MDMA_S0_CURR_Y_COUNT 0xFFC00F78 /*MemDMA2 Stream 0 Src Current Outer-Loop Count reg */ 732#define MDMA_S2_CURR_Y_COUNT 0xFFC00F78 /*MemDMA2 Stream 0 Src Current Outer-Loop Count reg */
733#define MDMA_S0_IRQ_STATUS 0xFFC00F68 /*MemDMA2 Stream 0 Source Interrupt/Status Register */ 733#define MDMA_S2_IRQ_STATUS 0xFFC00F68 /*MemDMA2 Stream 0 Source Interrupt/Status Register */
734#define MDMA_S0_PERIPHERAL_MAP 0xFFC00F6C /*MemDMA2 Stream 0 Source Peripheral Map register */ 734#define MDMA_S2_PERIPHERAL_MAP 0xFFC00F6C /*MemDMA2 Stream 0 Source Peripheral Map register */
735 735
736#define MDMA_D1_CONFIG 0xFFC00F88 /*MemDMA2 Stream 1 Destination Configuration register */ 736#define MDMA_D3_CONFIG 0xFFC00F88 /*MemDMA2 Stream 1 Destination Configuration register */
737#define MDMA_D1_NEXT_DESC_PTR 0xFFC00F80 /*MemDMA2 Stream 1 Destination Next Descriptor Ptr Reg */ 737#define MDMA_D3_NEXT_DESC_PTR 0xFFC00F80 /*MemDMA2 Stream 1 Destination Next Descriptor Ptr Reg */
738#define MDMA_D1_START_ADDR 0xFFC00F84 /*MemDMA2 Stream 1 Destination Start Address */ 738#define MDMA_D3_START_ADDR 0xFFC00F84 /*MemDMA2 Stream 1 Destination Start Address */
739#define MDMA_D1_X_COUNT 0xFFC00F90 /*MemDMA2 Stream 1 Dest Inner-Loop Count register */ 739#define MDMA_D3_X_COUNT 0xFFC00F90 /*MemDMA2 Stream 1 Dest Inner-Loop Count register */
740#define MDMA_D1_Y_COUNT 0xFFC00F98 /*MemDMA2 Stream 1 Dest Outer-Loop Count register */ 740#define MDMA_D3_Y_COUNT 0xFFC00F98 /*MemDMA2 Stream 1 Dest Outer-Loop Count register */
741#define MDMA_D1_X_MODIFY 0xFFC00F94 /*MemDMA2 Stream 1 Dest Inner-Loop Address-Increment */ 741#define MDMA_D3_X_MODIFY 0xFFC00F94 /*MemDMA2 Stream 1 Dest Inner-Loop Address-Increment */
742#define MDMA_D1_Y_MODIFY 0xFFC00F9C /*MemDMA2 Stream 1 Dest Outer-Loop Address-Increment */ 742#define MDMA_D3_Y_MODIFY 0xFFC00F9C /*MemDMA2 Stream 1 Dest Outer-Loop Address-Increment */
743#define MDMA_D1_CURR_DESC_PTR 0xFFC00FA0 /*MemDMA2 Stream 1 Destination Current Descriptor Ptr */ 743#define MDMA_D3_CURR_DESC_PTR 0xFFC00FA0 /*MemDMA2 Stream 1 Destination Current Descriptor Ptr */
744#define MDMA_D1_CURR_ADDR 0xFFC00FA4 /*MemDMA2 Stream 1 Destination Current Address reg */ 744#define MDMA_D3_CURR_ADDR 0xFFC00FA4 /*MemDMA2 Stream 1 Destination Current Address reg */
745#define MDMA_D1_CURR_X_COUNT 0xFFC00FB0 /*MemDMA2 Stream 1 Dest Current Inner-Loop Count reg */ 745#define MDMA_D3_CURR_X_COUNT 0xFFC00FB0 /*MemDMA2 Stream 1 Dest Current Inner-Loop Count reg */
746#define MDMA_D1_CURR_Y_COUNT 0xFFC00FB8 /*MemDMA2 Stream 1 Dest Current Outer-Loop Count reg */ 746#define MDMA_D3_CURR_Y_COUNT 0xFFC00FB8 /*MemDMA2 Stream 1 Dest Current Outer-Loop Count reg */
747#define MDMA_D1_IRQ_STATUS 0xFFC00FA8 /*MemDMA2 Stream 1 Destination Interrupt/Status Reg */ 747#define MDMA_D3_IRQ_STATUS 0xFFC00FA8 /*MemDMA2 Stream 1 Destination Interrupt/Status Reg */
748#define MDMA_D1_PERIPHERAL_MAP 0xFFC00FAC /*MemDMA2 Stream 1 Destination Peripheral Map register */ 748#define MDMA_D3_PERIPHERAL_MAP 0xFFC00FAC /*MemDMA2 Stream 1 Destination Peripheral Map register */
749 749
750#define MDMA_S1_CONFIG 0xFFC00FC8 /*MemDMA2 Stream 1 Source Configuration register */ 750#define MDMA_S3_CONFIG 0xFFC00FC8 /*MemDMA2 Stream 1 Source Configuration register */
751#define MDMA_S1_NEXT_DESC_PTR 0xFFC00FC0 /*MemDMA2 Stream 1 Source Next Descriptor Ptr Reg */ 751#define MDMA_S3_NEXT_DESC_PTR 0xFFC00FC0 /*MemDMA2 Stream 1 Source Next Descriptor Ptr Reg */
752#define MDMA_S1_START_ADDR 0xFFC00FC4 /*MemDMA2 Stream 1 Source Start Address */ 752#define MDMA_S3_START_ADDR 0xFFC00FC4 /*MemDMA2 Stream 1 Source Start Address */
753#define MDMA_S1_X_COUNT 0xFFC00FD0 /*MemDMA2 Stream 1 Source Inner-Loop Count register */ 753#define MDMA_S3_X_COUNT 0xFFC00FD0 /*MemDMA2 Stream 1 Source Inner-Loop Count register */
754#define MDMA_S1_Y_COUNT 0xFFC00FD8 /*MemDMA2 Stream 1 Source Outer-Loop Count register */ 754#define MDMA_S3_Y_COUNT 0xFFC00FD8 /*MemDMA2 Stream 1 Source Outer-Loop Count register */
755#define MDMA_S1_X_MODIFY 0xFFC00FD4 /*MemDMA2 Stream 1 Src Inner-Loop Address-Increment */ 755#define MDMA_S3_X_MODIFY 0xFFC00FD4 /*MemDMA2 Stream 1 Src Inner-Loop Address-Increment */
756#define MDMA_S1_Y_MODIFY 0xFFC00FDC /*MemDMA2 Stream 1 Source Outer-Loop Address-Increment */ 756#define MDMA_S3_Y_MODIFY 0xFFC00FDC /*MemDMA2 Stream 1 Source Outer-Loop Address-Increment */
757#define MDMA_S1_CURR_DESC_PTR 0xFFC00FE0 /*MemDMA2 Stream 1 Source Current Descriptor Ptr reg */ 757#define MDMA_S3_CURR_DESC_PTR 0xFFC00FE0 /*MemDMA2 Stream 1 Source Current Descriptor Ptr reg */
758#define MDMA_S1_CURR_ADDR 0xFFC00FE4 /*MemDMA2 Stream 1 Source Current Address */ 758#define MDMA_S3_CURR_ADDR 0xFFC00FE4 /*MemDMA2 Stream 1 Source Current Address */
759#define MDMA_S1_CURR_X_COUNT 0xFFC00FF0 /*MemDMA2 Stream 1 Source Current Inner-Loop Count */ 759#define MDMA_S3_CURR_X_COUNT 0xFFC00FF0 /*MemDMA2 Stream 1 Source Current Inner-Loop Count */
760#define MDMA_S1_CURR_Y_COUNT 0xFFC00FF8 /*MemDMA2 Stream 1 Source Current Outer-Loop Count */ 760#define MDMA_S3_CURR_Y_COUNT 0xFFC00FF8 /*MemDMA2 Stream 1 Source Current Outer-Loop Count */
761#define MDMA_S1_IRQ_STATUS 0xFFC00FE8 /*MemDMA2 Stream 1 Source Interrupt/Status Register */ 761#define MDMA_S3_IRQ_STATUS 0xFFC00FE8 /*MemDMA2 Stream 1 Source Interrupt/Status Register */
762#define MDMA_S1_PERIPHERAL_MAP 0xFFC00FEC /*MemDMA2 Stream 1 Source Peripheral Map register */ 762#define MDMA_S3_PERIPHERAL_MAP 0xFFC00FEC /*MemDMA2 Stream 1 Source Peripheral Map register */
763 763
764/* Internal Memory DMA Registers (0xFFC0_1800 - 0xFFC0_19FF) */ 764/* Internal Memory DMA Registers (0xFFC0_1800 - 0xFFC0_19FF) */
765#define IMDMA_D0_CONFIG 0xFFC01808 /*IMDMA Stream 0 Destination Configuration */ 765#define IMDMA_D0_CONFIG 0xFFC01808 /*IMDMA Stream 0 Destination Configuration */
@@ -879,6 +879,13 @@
879#define DLENGTH 0x00003800 /* PPI Data Length */ 879#define DLENGTH 0x00003800 /* PPI Data Length */
880#define DLEN_8 0x0 /* PPI Data Length mask for DLEN=8 */ 880#define DLEN_8 0x0 /* PPI Data Length mask for DLEN=8 */
881#define DLEN(x) (((x-9) & 0x07) << 11) /* PPI Data Length (only works for x=10-->x=16) */ 881#define DLEN(x) (((x-9) & 0x07) << 11) /* PPI Data Length (only works for x=10-->x=16) */
882#define DLEN_10 0x00000800 /* Data Length = 10 Bits */
883#define DLEN_11 0x00001000 /* Data Length = 11 Bits */
884#define DLEN_12 0x00001800 /* Data Length = 12 Bits */
885#define DLEN_13 0x00002000 /* Data Length = 13 Bits */
886#define DLEN_14 0x00002800 /* Data Length = 14 Bits */
887#define DLEN_15 0x00003000 /* Data Length = 15 Bits */
888#define DLEN_16 0x00003800 /* Data Length = 16 Bits */
882#define POL 0x0000C000 /* PPI Signal Polarities */ 889#define POL 0x0000C000 /* PPI Signal Polarities */
883#define POLC 0x4000 /* PPI Clock Polarity */ 890#define POLC 0x4000 /* PPI Clock Polarity */
884#define POLS 0x8000 /* PPI Frame Sync Polarity */ 891#define POLS 0x8000 /* PPI Frame Sync Polarity */
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index e4137297b790..4698a9800522 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -1244,7 +1244,7 @@ ENTRY(_software_trace_buff)
1244 .endr 1244 .endr
1245#endif /* CONFIG_DEBUG_BFIN_HWTRACE_EXPAND */ 1245#endif /* CONFIG_DEBUG_BFIN_HWTRACE_EXPAND */
1246 1246
1247#if CONFIG_EARLY_PRINTK 1247#ifdef CONFIG_EARLY_PRINTK
1248__INIT 1248__INIT
1249ENTRY(_early_trap) 1249ENTRY(_early_trap)
1250 SAVE_ALL_SYS 1250 SAVE_ALL_SYS
@@ -1755,6 +1755,8 @@ ENTRY(_sys_call_table)
1755 .long _sys_syncfs 1755 .long _sys_syncfs
1756 .long _sys_setns 1756 .long _sys_setns
1757 .long _sys_sendmmsg /* 380 */ 1757 .long _sys_sendmmsg /* 380 */
1758 .long _sys_process_vm_readv
1759 .long _sys_process_vm_writev
1758 1760
1759 .rept NR_syscalls-(.-_sys_call_table)/4 1761 .rept NR_syscalls-(.-_sys_call_table)/4
1760 .long _sys_ni_syscall 1762 .long _sys_ni_syscall
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-28 22:05:35 -0500