diff options
Diffstat (limited to 'arch/blackfin')
-rw-r--r-- | arch/blackfin/mach-bf548/boards/cm_bf548.c | 4 | ||||
-rw-r--r-- | arch/blackfin/mach-bf548/boards/ezkit.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/blackfin/mach-bf548/boards/cm_bf548.c b/arch/blackfin/mach-bf548/boards/cm_bf548.c index f5a3c30a41bd..290b6e9ec21e 100644 --- a/arch/blackfin/mach-bf548/boards/cm_bf548.c +++ b/arch/blackfin/mach-bf548/boards/cm_bf548.c | |||
@@ -642,7 +642,7 @@ static struct resource bfin_spi1_resource[] = { | |||
642 | 642 | ||
643 | /* SPI controller data */ | 643 | /* SPI controller data */ |
644 | static struct bfin5xx_spi_master bf54x_spi_master_info0 = { | 644 | static struct bfin5xx_spi_master bf54x_spi_master_info0 = { |
645 | .num_chipselect = 8, | 645 | .num_chipselect = 3, |
646 | .enable_dma = 1, /* master has the ability to do dma transfer */ | 646 | .enable_dma = 1, /* master has the ability to do dma transfer */ |
647 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, | 647 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, |
648 | }; | 648 | }; |
@@ -658,7 +658,7 @@ static struct platform_device bf54x_spi_master0 = { | |||
658 | }; | 658 | }; |
659 | 659 | ||
660 | static struct bfin5xx_spi_master bf54x_spi_master_info1 = { | 660 | static struct bfin5xx_spi_master bf54x_spi_master_info1 = { |
661 | .num_chipselect = 8, | 661 | .num_chipselect = 3, |
662 | .enable_dma = 1, /* master has the ability to do dma transfer */ | 662 | .enable_dma = 1, /* master has the ability to do dma transfer */ |
663 | .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0}, | 663 | .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0}, |
664 | }; | 664 | }; |
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c index e50d136bea70..c66f3801274f 100644 --- a/arch/blackfin/mach-bf548/boards/ezkit.c +++ b/arch/blackfin/mach-bf548/boards/ezkit.c | |||
@@ -783,7 +783,7 @@ static struct resource bfin_spi1_resource[] = { | |||
783 | 783 | ||
784 | /* SPI controller data */ | 784 | /* SPI controller data */ |
785 | static struct bfin5xx_spi_master bf54x_spi_master_info0 = { | 785 | static struct bfin5xx_spi_master bf54x_spi_master_info0 = { |
786 | .num_chipselect = 8, | 786 | .num_chipselect = 3, |
787 | .enable_dma = 1, /* master has the ability to do dma transfer */ | 787 | .enable_dma = 1, /* master has the ability to do dma transfer */ |
788 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, | 788 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, |
789 | }; | 789 | }; |
@@ -799,7 +799,7 @@ static struct platform_device bf54x_spi_master0 = { | |||
799 | }; | 799 | }; |
800 | 800 | ||
801 | static struct bfin5xx_spi_master bf54x_spi_master_info1 = { | 801 | static struct bfin5xx_spi_master bf54x_spi_master_info1 = { |
802 | .num_chipselect = 8, | 802 | .num_chipselect = 3, |
803 | .enable_dma = 1, /* master has the ability to do dma transfer */ | 803 | .enable_dma = 1, /* master has the ability to do dma transfer */ |
804 | .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0}, | 804 | .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0}, |
805 | }; | 805 | }; |