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-rw-r--r--arch/blackfin/Kconfig26
-rw-r--r--arch/blackfin/kernel/cplb-nompu/cplbinit.c10
-rw-r--r--arch/blackfin/kernel/setup.c45
-rw-r--r--arch/blackfin/mach-common/arch_checks.c3
4 files changed, 67 insertions, 17 deletions
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 308bbe291d8f..75bceee9b9a5 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -294,6 +294,11 @@ config BFIN_KERNEL_CLOCK
294 are also not changed, and the Bootloader does 100% of the hardware 294 are also not changed, and the Bootloader does 100% of the hardware
295 configuration. 295 configuration.
296 296
297config MEM_SIZE
298 int "SDRAM Memory Size in MBytes"
299 depends on BFIN_KERNEL_CLOCK
300 default 64
301
297config MEM_ADD_WIDTH 302config MEM_ADD_WIDTH
298 int "Memory Address Width" 303 int "Memory Address Width"
299 depends on BFIN_KERNEL_CLOCK 304 depends on BFIN_KERNEL_CLOCK
@@ -373,6 +378,14 @@ config SCLK_DIV
373 This can be between 1 and 15 378 This can be between 1 and 15
374 System Clock = (PLL frequency) / (this setting) 379 System Clock = (PLL frequency) / (this setting)
375 380
381config MAX_MEM_SIZE
382 int "Max SDRAM Memory Size in MBytes"
383 depends on !BFIN_KERNEL_CLOCK && !MPU
384 default 512
385 help
386 This is the max memory size that the kernel will create CPLB
387 tables for. Your system will not be able to handle any more.
388
376# 389#
377# Max & Min Speeds for various Chips 390# Max & Min Speeds for various Chips
378# 391#
@@ -441,19 +454,6 @@ source kernel/time/Kconfig
441 454
442comment "Memory Setup" 455comment "Memory Setup"
443 456
444config MEM_SIZE
445 int "SDRAM Memory Size in MBytes"
446 default 32 if BFIN533_EZKIT
447 default 64 if BFIN527_EZKIT
448 default 64 if BFIN537_STAMP
449 default 64 if BFIN548_EZKIT
450 default 64 if BFIN561_EZKIT
451 default 128 if BFIN533_STAMP
452 default 64 if PNAV10
453 default 32 if H8606_HVSISTEMAS
454 default 64 if BFIN548_BLUETECHNIX_CM
455 default 64 if BFIN532_IP0X
456
457choice 457choice
458 prompt "DDR SDRAM Chip Type" 458 prompt "DDR SDRAM Chip Type"
459 depends on (BFIN548_EZKIT || BFIN548_BLUETECHNIX_CM) 459 depends on (BFIN548_EZKIT || BFIN548_BLUETECHNIX_CM)
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
index f271f39d5655..917325bfbd84 100644
--- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
@@ -26,6 +26,12 @@
26#include <asm/cplb.h> 26#include <asm/cplb.h>
27#include <asm/cplbinit.h> 27#include <asm/cplbinit.h>
28 28
29#ifdef CONFIG_MAX_MEM_SIZE
30# define CPLB_MEM CONFIG_MAX_MEM_SIZE
31#else
32# define CPLB_MEM CONFIG_MEM_SIZE
33#endif
34
29/* 35/*
30* Number of required data CPLB switchtable entries 36* Number of required data CPLB switchtable entries
31* MEMSIZE / 4 (we mostly install 4M page size CPLBs 37* MEMSIZE / 4 (we mostly install 4M page size CPLBs
@@ -35,7 +41,7 @@
35* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO 41* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
36* 1 for ASYNC Memory 42* 1 for ASYNC Memory
37*/ 43*/
38#define MAX_SWITCH_D_CPLBS (((CONFIG_MEM_SIZE / 4) + 16 + 1 + 1 + 1 \ 44#define MAX_SWITCH_D_CPLBS (((CPLB_MEM / 4) + 16 + 1 + 1 + 1 \
39 + ASYNC_MEMORY_CPLB_COVERAGE) * 2) 45 + ASYNC_MEMORY_CPLB_COVERAGE) * 2)
40 46
41/* 47/*
@@ -46,7 +52,7 @@
46* possibly 1 for L2 Instruction Memory 52* possibly 1 for L2 Instruction Memory
47* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO 53* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
48*/ 54*/
49#define MAX_SWITCH_I_CPLBS (((CONFIG_MEM_SIZE / 4) + 12 + 1 + 1 + 1) * 2) 55#define MAX_SWITCH_I_CPLBS (((CPLB_MEM / 4) + 12 + 1 + 1 + 1) * 2)
50 56
51 57
52u_long icplb_table[MAX_CPLBS + 1]; 58u_long icplb_table[MAX_CPLBS + 1];
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index c2f3e73ba25a..d6668328be72 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -649,6 +649,49 @@ static __init void setup_bootmem_allocator(void)
649 BOOTMEM_DEFAULT); 649 BOOTMEM_DEFAULT);
650} 650}
651 651
652#define EBSZ_TO_MEG(ebsz) \
653({ \
654 int meg = 0; \
655 switch (ebsz & 0xf) { \
656 case 0x1: meg = 16; break; \
657 case 0x3: meg = 32; break; \
658 case 0x5: meg = 64; break; \
659 case 0x7: meg = 128; break; \
660 case 0x9: meg = 256; break; \
661 case 0xb: meg = 512; break; \
662 } \
663 meg; \
664})
665static inline int __init get_mem_size(void)
666{
667#ifdef CONFIG_MEM_SIZE
668 return CONFIG_MEM_SIZE;
669#else
670# if defined(EBIU_SDBCTL)
671# if defined(BF561_FAMILY)
672 int ret = 0;
673 u32 sdbctl = bfin_read_EBIU_SDBCTL();
674 ret += EBSZ_TO_MEG(sdbctl >> 0);
675 ret += EBSZ_TO_MEG(sdbctl >> 8);
676 ret += EBSZ_TO_MEG(sdbctl >> 16);
677 ret += EBSZ_TO_MEG(sdbctl >> 24);
678 return ret;
679# else
680 return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL());
681# endif
682# elif defined(EBIU_DDRCTL1)
683 switch (bfin_read_EBIU_DDRCTL1() & 0xc0000) {
684 case DEVSZ_64: return 64;
685 case DEVSZ_128: return 128;
686 case DEVSZ_256: return 256;
687 case DEVSZ_512: return 512;
688 default: return 0;
689 }
690# endif
691#endif
692 BUG();
693}
694
652void __init setup_arch(char **cmdline_p) 695void __init setup_arch(char **cmdline_p)
653{ 696{
654 unsigned long sclk, cclk; 697 unsigned long sclk, cclk;
@@ -669,7 +712,7 @@ void __init setup_arch(char **cmdline_p)
669 712
670 /* setup memory defaults from the user config */ 713 /* setup memory defaults from the user config */
671 physical_mem_end = 0; 714 physical_mem_end = 0;
672 _ramend = CONFIG_MEM_SIZE * 1024 * 1024; 715 _ramend = get_mem_size() * 1024 * 1024;
673 716
674 memset(&bfin_memmap, 0, sizeof(bfin_memmap)); 717 memset(&bfin_memmap, 0, sizeof(bfin_memmap));
675 718
diff --git a/arch/blackfin/mach-common/arch_checks.c b/arch/blackfin/mach-common/arch_checks.c
index 2f6ce397780f..caaab49e9cfa 100644
--- a/arch/blackfin/mach-common/arch_checks.c
+++ b/arch/blackfin/mach-common/arch_checks.c
@@ -54,7 +54,8 @@
54 54
55#endif /* CONFIG_BFIN_KERNEL_CLOCK */ 55#endif /* CONFIG_BFIN_KERNEL_CLOCK */
56 56
57#ifdef CONFIG_MEM_SIZE
57#if (CONFIG_MEM_SIZE % 4) 58#if (CONFIG_MEM_SIZE % 4)
58#error "SDRAM mem size must be multible of 4MB" 59#error "SDRAM mem size must be multible of 4MB"
59#endif 60#endif
60 61#endif