aboutsummaryrefslogtreecommitdiffstats
path: root/arch/blackfin
diff options
context:
space:
mode:
Diffstat (limited to 'arch/blackfin')
-rw-r--r--arch/blackfin/include/asm/context.S7
-rw-r--r--arch/blackfin/include/asm/cpu.h1
-rw-r--r--arch/blackfin/include/asm/hardirq.h3
-rw-r--r--arch/blackfin/include/asm/processor.h21
-rw-r--r--arch/blackfin/include/asm/thread_info.h2
-rw-r--r--arch/blackfin/kernel/bfin_dma_5xx.c29
-rw-r--r--arch/blackfin/kernel/bfin_gpio.c6
-rw-r--r--arch/blackfin/kernel/cplb-nompu/cplbinit.c23
-rw-r--r--arch/blackfin/kernel/process.c14
-rw-r--r--arch/blackfin/kernel/ptrace.c1
-rw-r--r--arch/blackfin/kernel/setup.c85
-rw-r--r--arch/blackfin/kernel/sys_bfin.c1
-rw-r--r--arch/blackfin/kernel/traps.c43
-rw-r--r--arch/blackfin/lib/lshrdi3.c16
-rw-r--r--arch/blackfin/mach-bf518/boards/ezbrd.c2
-rw-r--r--arch/blackfin/mach-bf518/include/mach/anomaly.h2
-rw-r--r--arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h2
-rw-r--r--arch/blackfin/mach-bf527/boards/cm_bf527.c2
-rw-r--r--arch/blackfin/mach-bf527/boards/ezbrd.c2
-rw-r--r--arch/blackfin/mach-bf527/boards/ezkit.c2
-rw-r--r--arch/blackfin/mach-bf527/include/mach/anomaly.h4
-rw-r--r--arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h2
-rw-r--r--arch/blackfin/mach-bf533/boards/stamp.c2
-rw-r--r--arch/blackfin/mach-bf533/include/mach/anomaly.h1
-rw-r--r--arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h2
-rw-r--r--arch/blackfin/mach-bf537/boards/stamp.c4
-rw-r--r--arch/blackfin/mach-bf537/include/mach/anomaly.h2
-rw-r--r--arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h2
-rw-r--r--arch/blackfin/mach-bf538/include/mach/anomaly.h2
-rw-r--r--arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h2
-rw-r--r--arch/blackfin/mach-bf548/boards/ezkit.c2
-rw-r--r--arch/blackfin/mach-bf548/include/mach/anomaly.h2
-rw-r--r--arch/blackfin/mach-bf561/include/mach/anomaly.h1
-rw-r--r--arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h2
-rw-r--r--arch/blackfin/mach-bf561/include/mach/mem_map.h23
-rw-r--r--arch/blackfin/mach-common/entry.S12
-rw-r--r--arch/blackfin/mach-common/smp.c10
37 files changed, 184 insertions, 155 deletions
diff --git a/arch/blackfin/include/asm/context.S b/arch/blackfin/include/asm/context.S
index 16561ab18b38..f8a664f022b1 100644
--- a/arch/blackfin/include/asm/context.S
+++ b/arch/blackfin/include/asm/context.S
@@ -223,9 +223,10 @@
223 [--sp] = RETN; 223 [--sp] = RETN;
224 [--sp] = RETE; 224 [--sp] = RETE;
225 [--sp] = SEQSTAT; 225 [--sp] = SEQSTAT;
226#ifdef CONFIG_KGDB 226#ifdef CONFIG_DEBUG_KERNEL
227 r1.l = lo(IPEND); 227 p1.l = lo(IPEND);
228 r1.h = hi(IPEND); 228 p1.h = hi(IPEND);
229 r1 = [p1];
229 [--sp] = r1; 230 [--sp] = r1;
230#else 231#else
231 [--sp] = r0; /* Skip IPEND as well. */ 232 [--sp] = r0; /* Skip IPEND as well. */
diff --git a/arch/blackfin/include/asm/cpu.h b/arch/blackfin/include/asm/cpu.h
index 565b8136855e..fadfa82f93b2 100644
--- a/arch/blackfin/include/asm/cpu.h
+++ b/arch/blackfin/include/asm/cpu.h
@@ -32,7 +32,6 @@ struct blackfin_cpudata {
32 struct task_struct *idle; 32 struct task_struct *idle;
33 unsigned int imemctl; 33 unsigned int imemctl;
34 unsigned int dmemctl; 34 unsigned int dmemctl;
35 unsigned long loops_per_jiffy;
36 unsigned long dcache_invld_count; 35 unsigned long dcache_invld_count;
37 unsigned long icache_invld_count; 36 unsigned long icache_invld_count;
38}; 37};
diff --git a/arch/blackfin/include/asm/hardirq.h b/arch/blackfin/include/asm/hardirq.h
index cbd52f86bb9f..0b78b873df51 100644
--- a/arch/blackfin/include/asm/hardirq.h
+++ b/arch/blackfin/include/asm/hardirq.h
@@ -6,6 +6,9 @@
6extern void ack_bad_irq(unsigned int irq); 6extern void ack_bad_irq(unsigned int irq);
7#define ack_bad_irq ack_bad_irq 7#define ack_bad_irq ack_bad_irq
8 8
9/* Define until common code gets sane defaults */
10#define HARDIRQ_BITS 9
11
9#include <asm-generic/hardirq.h> 12#include <asm-generic/hardirq.h>
10 13
11#endif 14#endif
diff --git a/arch/blackfin/include/asm/processor.h b/arch/blackfin/include/asm/processor.h
index d0be99be8308..a36ad8dac068 100644
--- a/arch/blackfin/include/asm/processor.h
+++ b/arch/blackfin/include/asm/processor.h
@@ -105,23 +105,16 @@ static inline uint32_t __pure bfin_revid(void)
105 /* Always use CHIPID, to work around ANOMALY_05000234 */ 105 /* Always use CHIPID, to work around ANOMALY_05000234 */
106 uint32_t revid = (bfin_read_CHIPID() & CHIPID_VERSION) >> 28; 106 uint32_t revid = (bfin_read_CHIPID() & CHIPID_VERSION) >> 28;
107 107
108#ifdef CONFIG_BF52x 108#ifdef _BOOTROM_GET_DXE_ADDRESS_TWI
109 /* ANOMALY_05000357 109 /*
110 * ANOMALY_05000364
110 * Incorrect Revision Number in DSPID Register 111 * Incorrect Revision Number in DSPID Register
111 */ 112 */
112 if (revid == 0) 113 if (ANOMALY_05000364 &&
113 switch (bfin_read16(_BOOTROM_GET_DXE_ADDRESS_TWI)) { 114 bfin_read16(_BOOTROM_GET_DXE_ADDRESS_TWI) == 0x2796)
114 case 0x0010: 115 revid = 1;
115 revid = 0;
116 break;
117 case 0x2796:
118 revid = 1;
119 break;
120 default:
121 revid = 0xFFFF;
122 break;
123 }
124#endif 116#endif
117
125 return revid; 118 return revid;
126} 119}
127 120
diff --git a/arch/blackfin/include/asm/thread_info.h b/arch/blackfin/include/asm/thread_info.h
index 2920087516f2..2bbfdd950afc 100644
--- a/arch/blackfin/include/asm/thread_info.h
+++ b/arch/blackfin/include/asm/thread_info.h
@@ -77,7 +77,7 @@ struct thread_info {
77 .exec_domain = &default_exec_domain, \ 77 .exec_domain = &default_exec_domain, \
78 .flags = 0, \ 78 .flags = 0, \
79 .cpu = 0, \ 79 .cpu = 0, \
80 .preempt_count = 1, \ 80 .preempt_count = INIT_PREEMPT_COUNT, \
81 .restart_block = { \ 81 .restart_block = { \
82 .fn = do_no_restart_syscall, \ 82 .fn = do_no_restart_syscall, \
83 }, \ 83 }, \
diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c
index e0bf8cc06907..9f9b82816652 100644
--- a/arch/blackfin/kernel/bfin_dma_5xx.c
+++ b/arch/blackfin/kernel/bfin_dma_5xx.c
@@ -253,32 +253,31 @@ void __init early_dma_memcpy(void *pdst, const void *psrc, size_t size)
253 BUG_ON(src % 4); 253 BUG_ON(src % 4);
254 BUG_ON(size % 4); 254 BUG_ON(size % 4);
255 255
256 /* Force a sync in case a previous config reset on this channel
257 * occurred. This is needed so subsequent writes to DMA registers
258 * are not spuriously lost/corrupted.
259 */
260 __builtin_bfin_ssync();
261
262 src_ch = 0; 256 src_ch = 0;
263 /* Find an avalible memDMA channel */ 257 /* Find an avalible memDMA channel */
264 while (1) { 258 while (1) {
265 if (!src_ch || src_ch == (struct dma_register *)MDMA_S1_NEXT_DESC_PTR) { 259 if (src_ch == (struct dma_register *)MDMA_S0_NEXT_DESC_PTR) {
266 dst_ch = (struct dma_register *)MDMA_D0_NEXT_DESC_PTR;
267 src_ch = (struct dma_register *)MDMA_S0_NEXT_DESC_PTR;
268 } else {
269 dst_ch = (struct dma_register *)MDMA_D1_NEXT_DESC_PTR; 260 dst_ch = (struct dma_register *)MDMA_D1_NEXT_DESC_PTR;
270 src_ch = (struct dma_register *)MDMA_S1_NEXT_DESC_PTR; 261 src_ch = (struct dma_register *)MDMA_S1_NEXT_DESC_PTR;
262 } else {
263 dst_ch = (struct dma_register *)MDMA_D0_NEXT_DESC_PTR;
264 src_ch = (struct dma_register *)MDMA_S0_NEXT_DESC_PTR;
271 } 265 }
272 266
273 if (!bfin_read16(&src_ch->cfg)) { 267 if (!bfin_read16(&src_ch->cfg))
268 break;
269 else if (bfin_read16(&dst_ch->irq_status) & DMA_DONE) {
270 bfin_write16(&src_ch->cfg, 0);
274 break; 271 break;
275 } else {
276 if (bfin_read16(&src_ch->irq_status) & DMA_DONE)
277 bfin_write16(&src_ch->cfg, 0);
278 } 272 }
279
280 } 273 }
281 274
275 /* Force a sync in case a previous config reset on this channel
276 * occurred. This is needed so subsequent writes to DMA registers
277 * are not spuriously lost/corrupted.
278 */
279 __builtin_bfin_ssync();
280
282 /* Destination */ 281 /* Destination */
283 bfin_write32(&dst_ch->start_addr, dst); 282 bfin_write32(&dst_ch->start_addr, dst);
284 bfin_write16(&dst_ch->x_count, size >> 2); 283 bfin_write16(&dst_ch->x_count, size >> 2);
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c
index beffa00a93c3..6b9446271371 100644
--- a/arch/blackfin/kernel/bfin_gpio.c
+++ b/arch/blackfin/kernel/bfin_gpio.c
@@ -686,14 +686,12 @@ void bfin_gpio_pm_hibernate_restore(void)
686 *port_fer[bank] = gpio_bank_saved[bank].fer; 686 *port_fer[bank] = gpio_bank_saved[bank].fer;
687#endif 687#endif
688 gpio_array[bank]->inen = gpio_bank_saved[bank].inen; 688 gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
689 gpio_array[bank]->data_set = gpio_bank_saved[bank].data
690 & gpio_bank_saved[bank].dir;
689 gpio_array[bank]->dir = gpio_bank_saved[bank].dir; 691 gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
690 gpio_array[bank]->polar = gpio_bank_saved[bank].polar; 692 gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
691 gpio_array[bank]->edge = gpio_bank_saved[bank].edge; 693 gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
692 gpio_array[bank]->both = gpio_bank_saved[bank].both; 694 gpio_array[bank]->both = gpio_bank_saved[bank].both;
693
694 gpio_array[bank]->data_set = gpio_bank_saved[bank].data
695 | gpio_bank_saved[bank].dir;
696
697 gpio_array[bank]->maska = gpio_bank_saved[bank].maska; 695 gpio_array[bank]->maska = gpio_bank_saved[bank].maska;
698 } 696 }
699 AWA_DUMMY_READ(maska); 697 AWA_DUMMY_READ(maska);
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
index d6c067782e63..685f160a5a36 100644
--- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
@@ -72,13 +72,24 @@ void __init generate_cplb_tables_cpu(unsigned int cpu)
72 } 72 }
73 73
74 /* Cover L1 memory. One 4M area for code and data each is enough. */ 74 /* Cover L1 memory. One 4M area for code and data each is enough. */
75 if (L1_DATA_A_LENGTH || L1_DATA_B_LENGTH) { 75 if (cpu == 0) {
76 d_tbl[i_d].addr = L1_DATA_A_START; 76 if (L1_DATA_A_LENGTH || L1_DATA_B_LENGTH) {
77 d_tbl[i_d++].data = L1_DMEMORY | PAGE_SIZE_4MB; 77 d_tbl[i_d].addr = L1_DATA_A_START;
78 d_tbl[i_d++].data = L1_DMEMORY | PAGE_SIZE_4MB;
79 }
80 i_tbl[i_i].addr = L1_CODE_START;
81 i_tbl[i_i++].data = L1_IMEMORY | PAGE_SIZE_4MB;
78 } 82 }
79 i_tbl[i_i].addr = L1_CODE_START; 83#ifdef CONFIG_SMP
80 i_tbl[i_i++].data = L1_IMEMORY | PAGE_SIZE_4MB; 84 else {
81 85 if (L1_DATA_A_LENGTH || L1_DATA_B_LENGTH) {
86 d_tbl[i_d].addr = COREB_L1_DATA_A_START;
87 d_tbl[i_d++].data = L1_DMEMORY | PAGE_SIZE_4MB;
88 }
89 i_tbl[i_i].addr = COREB_L1_CODE_START;
90 i_tbl[i_i++].data = L1_IMEMORY | PAGE_SIZE_4MB;
91 }
92#endif
82 first_switched_dcplb = i_d; 93 first_switched_dcplb = i_d;
83 first_switched_icplb = i_i; 94 first_switched_icplb = i_i;
84 95
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index 79cad0ac5892..9da36bab7ccb 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -361,7 +361,7 @@ static inline
361int in_mem_const(unsigned long addr, unsigned long size, 361int in_mem_const(unsigned long addr, unsigned long size,
362 unsigned long const_addr, unsigned long const_size) 362 unsigned long const_addr, unsigned long const_size)
363{ 363{
364 return in_mem_const_off(addr, 0, size, const_addr, const_size); 364 return in_mem_const_off(addr, size, 0, const_addr, const_size);
365} 365}
366#define IN_ASYNC(bnum, bctlnum) \ 366#define IN_ASYNC(bnum, bctlnum) \
367({ \ 367({ \
@@ -390,13 +390,13 @@ int bfin_mem_access_type(unsigned long addr, unsigned long size)
390 if (in_mem_const(addr, size, L1_DATA_B_START, L1_DATA_B_LENGTH)) 390 if (in_mem_const(addr, size, L1_DATA_B_START, L1_DATA_B_LENGTH))
391 return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA; 391 return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
392#ifdef COREB_L1_CODE_START 392#ifdef COREB_L1_CODE_START
393 if (in_mem_const(addr, size, COREB_L1_CODE_START, L1_CODE_LENGTH)) 393 if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
394 return cpu == 1 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA; 394 return cpu == 1 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA;
395 if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH)) 395 if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
396 return cpu == 1 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT; 396 return cpu == 1 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT;
397 if (in_mem_const(addr, size, COREB_L1_DATA_A_START, L1_DATA_A_LENGTH)) 397 if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
398 return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA; 398 return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
399 if (in_mem_const(addr, size, COREB_L1_DATA_B_START, L1_DATA_B_LENGTH)) 399 if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
400 return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA; 400 return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
401#endif 401#endif
402 if (in_mem_const(addr, size, L2_START, L2_LENGTH)) 402 if (in_mem_const(addr, size, L2_START, L2_LENGTH))
@@ -472,13 +472,13 @@ int _access_ok(unsigned long addr, unsigned long size)
472 if (in_mem_const_off(addr, size, _ebss_b_l1 - _sdata_b_l1, L1_DATA_B_START, L1_DATA_B_LENGTH)) 472 if (in_mem_const_off(addr, size, _ebss_b_l1 - _sdata_b_l1, L1_DATA_B_START, L1_DATA_B_LENGTH))
473 return 1; 473 return 1;
474#ifdef COREB_L1_CODE_START 474#ifdef COREB_L1_CODE_START
475 if (in_mem_const(addr, size, COREB_L1_CODE_START, L1_CODE_LENGTH)) 475 if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
476 return 1; 476 return 1;
477 if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH)) 477 if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
478 return 1; 478 return 1;
479 if (in_mem_const(addr, size, COREB_L1_DATA_A_START, L1_DATA_A_LENGTH)) 479 if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
480 return 1; 480 return 1;
481 if (in_mem_const(addr, size, COREB_L1_DATA_B_START, L1_DATA_B_LENGTH)) 481 if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
482 return 1; 482 return 1;
483#endif 483#endif
484 if (in_mem_const_off(addr, size, _ebss_l2 - _stext_l2, L2_START, L2_LENGTH)) 484 if (in_mem_const_off(addr, size, _ebss_l2 - _stext_l2, L2_START, L2_LENGTH))
diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c
index d76618db50df..6a387eec6b65 100644
--- a/arch/blackfin/kernel/ptrace.c
+++ b/arch/blackfin/kernel/ptrace.c
@@ -31,7 +31,6 @@
31#include <linux/sched.h> 31#include <linux/sched.h>
32#include <linux/mm.h> 32#include <linux/mm.h>
33#include <linux/smp.h> 33#include <linux/smp.h>
34#include <linux/smp_lock.h>
35#include <linux/errno.h> 34#include <linux/errno.h>
36#include <linux/ptrace.h> 35#include <linux/ptrace.h>
37#include <linux/user.h> 36#include <linux/user.h>
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index 298f023bcc09..6225edae488e 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -168,7 +168,6 @@ void __cpuinit bfin_setup_cpudata(unsigned int cpu)
168 struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu); 168 struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu);
169 169
170 cpudata->idle = current; 170 cpudata->idle = current;
171 cpudata->loops_per_jiffy = loops_per_jiffy;
172 cpudata->imemctl = bfin_read_IMEM_CONTROL(); 171 cpudata->imemctl = bfin_read_IMEM_CONTROL();
173 cpudata->dmemctl = bfin_read_DMEM_CONTROL(); 172 cpudata->dmemctl = bfin_read_DMEM_CONTROL();
174} 173}
@@ -408,13 +407,14 @@ static void __init print_memory_map(char *who)
408 bfin_memmap.map[i].addr + bfin_memmap.map[i].size); 407 bfin_memmap.map[i].addr + bfin_memmap.map[i].size);
409 switch (bfin_memmap.map[i].type) { 408 switch (bfin_memmap.map[i].type) {
410 case BFIN_MEMMAP_RAM: 409 case BFIN_MEMMAP_RAM:
411 printk("(usable)\n"); 410 printk(KERN_CONT "(usable)\n");
412 break; 411 break;
413 case BFIN_MEMMAP_RESERVED: 412 case BFIN_MEMMAP_RESERVED:
414 printk("(reserved)\n"); 413 printk(KERN_CONT "(reserved)\n");
415 break; 414 break;
416 default: printk("type %lu\n", bfin_memmap.map[i].type); 415 default:
417 break; 416 printk(KERN_CONT "type %lu\n", bfin_memmap.map[i].type);
417 break;
418 } 418 }
419 } 419 }
420} 420}
@@ -567,17 +567,23 @@ static __init void memory_setup(void)
567# endif /* ANOMALY_05000263 */ 567# endif /* ANOMALY_05000263 */
568# endif /* CONFIG_ROMFS_FS */ 568# endif /* CONFIG_ROMFS_FS */
569 569
570 memory_end -= mtd_size; 570 /* Since the default MTD_UCLINUX has no magic number, we just blindly
571 571 * read 8 past the end of the kernel's image, and look at it.
572 if (mtd_size == 0) { 572 * When no image is attached, mtd_size is set to a random number
573 console_init(); 573 * Do some basic sanity checks before operating on things
574 panic("Don't boot kernel without rootfs attached."); 574 */
575 if (mtd_size == 0 || memory_end <= mtd_size) {
576 pr_emerg("Could not find valid ram mtd attached.\n");
577 } else {
578 memory_end -= mtd_size;
579
580 /* Relocate MTD image to the top of memory after the uncached memory area */
581 uclinux_ram_map.phys = memory_mtd_start = memory_end;
582 uclinux_ram_map.size = mtd_size;
583 pr_info("Found mtd parition at 0x%p, (len=0x%lx), moving to 0x%p\n",
584 _end, mtd_size, (void *)memory_mtd_start);
585 dma_memcpy((void *)uclinux_ram_map.phys, _end, uclinux_ram_map.size);
575 } 586 }
576
577 /* Relocate MTD image to the top of memory after the uncached memory area */
578 uclinux_ram_map.phys = memory_mtd_start = memory_end;
579 uclinux_ram_map.size = mtd_size;
580 dma_memcpy((void *)uclinux_ram_map.phys, _end, uclinux_ram_map.size);
581#endif /* CONFIG_MTD_UCLINUX */ 587#endif /* CONFIG_MTD_UCLINUX */
582 588
583#if (defined(CONFIG_BFIN_EXTMEM_ICACHEABLE) && ANOMALY_05000263) 589#if (defined(CONFIG_BFIN_EXTMEM_ICACHEABLE) && ANOMALY_05000263)
@@ -614,19 +620,19 @@ static __init void memory_setup(void)
614 printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20); 620 printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
615 621
616 printk(KERN_INFO "Memory map:\n" 622 printk(KERN_INFO "Memory map:\n"
617 KERN_INFO " fixedcode = 0x%p-0x%p\n" 623 " fixedcode = 0x%p-0x%p\n"
618 KERN_INFO " text = 0x%p-0x%p\n" 624 " text = 0x%p-0x%p\n"
619 KERN_INFO " rodata = 0x%p-0x%p\n" 625 " rodata = 0x%p-0x%p\n"
620 KERN_INFO " bss = 0x%p-0x%p\n" 626 " bss = 0x%p-0x%p\n"
621 KERN_INFO " data = 0x%p-0x%p\n" 627 " data = 0x%p-0x%p\n"
622 KERN_INFO " stack = 0x%p-0x%p\n" 628 " stack = 0x%p-0x%p\n"
623 KERN_INFO " init = 0x%p-0x%p\n" 629 " init = 0x%p-0x%p\n"
624 KERN_INFO " available = 0x%p-0x%p\n" 630 " available = 0x%p-0x%p\n"
625#ifdef CONFIG_MTD_UCLINUX 631#ifdef CONFIG_MTD_UCLINUX
626 KERN_INFO " rootfs = 0x%p-0x%p\n" 632 " rootfs = 0x%p-0x%p\n"
627#endif 633#endif
628#if DMA_UNCACHED_REGION > 0 634#if DMA_UNCACHED_REGION > 0
629 KERN_INFO " DMA Zone = 0x%p-0x%p\n" 635 " DMA Zone = 0x%p-0x%p\n"
630#endif 636#endif
631 , (void *)FIXED_CODE_START, (void *)FIXED_CODE_END, 637 , (void *)FIXED_CODE_START, (void *)FIXED_CODE_END,
632 _stext, _etext, 638 _stext, _etext,
@@ -859,20 +865,13 @@ void __init setup_arch(char **cmdline_p)
859#endif 865#endif
860 printk(KERN_INFO "Hardware Trace "); 866 printk(KERN_INFO "Hardware Trace ");
861 if (bfin_read_TBUFCTL() & 0x1) 867 if (bfin_read_TBUFCTL() & 0x1)
862 printk("Active "); 868 printk(KERN_CONT "Active ");
863 else 869 else
864 printk("Off "); 870 printk(KERN_CONT "Off ");
865 if (bfin_read_TBUFCTL() & 0x2) 871 if (bfin_read_TBUFCTL() & 0x2)
866 printk("and Enabled\n"); 872 printk(KERN_CONT "and Enabled\n");
867 else 873 else
868 printk("and Disabled\n"); 874 printk(KERN_CONT "and Disabled\n");
869
870#if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
871 /* we need to initialize the Flashrom device here since we might
872 * do things with flash early on in the boot
873 */
874 flash_probe();
875#endif
876 875
877 printk(KERN_INFO "Boot Mode: %i\n", bfin_read_SYSCR() & 0xF); 876 printk(KERN_INFO "Boot Mode: %i\n", bfin_read_SYSCR() & 0xF);
878 877
@@ -937,10 +936,6 @@ void __init setup_arch(char **cmdline_p)
937 CPU, bfin_revid()); 936 CPU, bfin_revid());
938 } 937 }
939 938
940 /* We can't run on BF548-0.1 due to ANOMALY 05000448 */
941 if (bfin_cpuid() == 0x27de && bfin_revid() == 1)
942 panic("You can't run on this processor due to 05000448");
943
944 printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n"); 939 printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
945 940
946 printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n", 941 printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
@@ -1163,9 +1158,9 @@ static int show_cpuinfo(struct seq_file *m, void *v)
1163 sclk/1000000, sclk%1000000); 1158 sclk/1000000, sclk%1000000);
1164 seq_printf(m, "bogomips\t: %lu.%02lu\n" 1159 seq_printf(m, "bogomips\t: %lu.%02lu\n"
1165 "Calibration\t: %lu loops\n", 1160 "Calibration\t: %lu loops\n",
1166 (cpudata->loops_per_jiffy * HZ) / 500000, 1161 (loops_per_jiffy * HZ) / 500000,
1167 ((cpudata->loops_per_jiffy * HZ) / 5000) % 100, 1162 ((loops_per_jiffy * HZ) / 5000) % 100,
1168 (cpudata->loops_per_jiffy * HZ)); 1163 (loops_per_jiffy * HZ));
1169 1164
1170 /* Check Cache configutation */ 1165 /* Check Cache configutation */
1171 switch (cpudata->dmemctl & (1 << DMC0_P | 1 << DMC1_P)) { 1166 switch (cpudata->dmemctl & (1 << DMC0_P | 1 << DMC1_P)) {
diff --git a/arch/blackfin/kernel/sys_bfin.c b/arch/blackfin/kernel/sys_bfin.c
index a8f1329c15a4..3da60fb13ce4 100644
--- a/arch/blackfin/kernel/sys_bfin.c
+++ b/arch/blackfin/kernel/sys_bfin.c
@@ -29,7 +29,6 @@
29 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 29 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
30 */ 30 */
31 31
32#include <linux/smp_lock.h>
33#include <linux/spinlock.h> 32#include <linux/spinlock.h>
34#include <linux/sem.h> 33#include <linux/sem.h>
35#include <linux/msg.h> 34#include <linux/msg.h>
diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c
index 8eeb457ce5d5..bf2b2d1f8ae5 100644
--- a/arch/blackfin/kernel/traps.c
+++ b/arch/blackfin/kernel/traps.c
@@ -212,7 +212,7 @@ asmlinkage void double_fault_c(struct pt_regs *fp)
212 console_verbose(); 212 console_verbose();
213 oops_in_progress = 1; 213 oops_in_progress = 1;
214#ifdef CONFIG_DEBUG_VERBOSE 214#ifdef CONFIG_DEBUG_VERBOSE
215 printk(KERN_EMERG "\n" KERN_EMERG "Double Fault\n"); 215 printk(KERN_EMERG "Double Fault\n");
216#ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT 216#ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
217 if (((long)fp->seqstat & SEQSTAT_EXCAUSE) == VEC_UNCOV) { 217 if (((long)fp->seqstat & SEQSTAT_EXCAUSE) == VEC_UNCOV) {
218 unsigned int cpu = smp_processor_id(); 218 unsigned int cpu = smp_processor_id();
@@ -570,11 +570,12 @@ asmlinkage void trap_c(struct pt_regs *fp)
570 if (kernel_mode_regs(fp) || (current && !current->mm)) { 570 if (kernel_mode_regs(fp) || (current && !current->mm)) {
571 console_verbose(); 571 console_verbose();
572 oops_in_progress = 1; 572 oops_in_progress = 1;
573 if (strerror)
574 verbose_printk(strerror);
575 } 573 }
576 574
577 if (sig != SIGTRAP) { 575 if (sig != SIGTRAP) {
576 if (strerror)
577 verbose_printk(strerror);
578
578 dump_bfin_process(fp); 579 dump_bfin_process(fp);
579 dump_bfin_mem(fp); 580 dump_bfin_mem(fp);
580 show_regs(fp); 581 show_regs(fp);
@@ -583,15 +584,14 @@ asmlinkage void trap_c(struct pt_regs *fp)
583#ifndef CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE 584#ifndef CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE
584 if (trapnr == VEC_CPLB_I_M || trapnr == VEC_CPLB_M) 585 if (trapnr == VEC_CPLB_I_M || trapnr == VEC_CPLB_M)
585 verbose_printk(KERN_NOTICE "No trace since you do not have " 586 verbose_printk(KERN_NOTICE "No trace since you do not have "
586 "CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE enabled\n" 587 "CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE enabled\n\n");
587 KERN_NOTICE "\n");
588 else 588 else
589#endif 589#endif
590 dump_bfin_trace_buffer(); 590 dump_bfin_trace_buffer();
591 591
592 if (oops_in_progress) { 592 if (oops_in_progress) {
593 /* Dump the current kernel stack */ 593 /* Dump the current kernel stack */
594 verbose_printk(KERN_NOTICE "\n" KERN_NOTICE "Kernel Stack\n"); 594 verbose_printk(KERN_NOTICE "Kernel Stack\n");
595 show_stack(current, NULL); 595 show_stack(current, NULL);
596 print_modules(); 596 print_modules();
597#ifndef CONFIG_ACCESS_CHECK 597#ifndef CONFIG_ACCESS_CHECK
@@ -620,7 +620,9 @@ asmlinkage void trap_c(struct pt_regs *fp)
620 force_sig_info(sig, &info, current); 620 force_sig_info(sig, &info, current);
621 } 621 }
622 622
623 if (ANOMALY_05000461 && trapnr == VEC_HWERR && !access_ok(VERIFY_READ, fp->pc, 8)) 623 if ((ANOMALY_05000461 && trapnr == VEC_HWERR && !access_ok(VERIFY_READ, fp->pc, 8)) ||
624 (ANOMALY_05000281 && trapnr == VEC_HWERR) ||
625 (ANOMALY_05000189 && (trapnr == VEC_CPLB_I_VL || trapnr == VEC_CPLB_VL)))
624 fp->pc = SAFE_USER_INSTRUCTION; 626 fp->pc = SAFE_USER_INSTRUCTION;
625 627
626 traps_done: 628 traps_done:
@@ -906,7 +908,7 @@ void show_stack(struct task_struct *task, unsigned long *stack)
906 908
907 ret_addr = 0; 909 ret_addr = 0;
908 if (!j && i % 8 == 0) 910 if (!j && i % 8 == 0)
909 printk("\n" KERN_NOTICE "%p:",addr); 911 printk(KERN_NOTICE "%p:",addr);
910 912
911 /* if it is an odd address, or zero, just skip it */ 913 /* if it is an odd address, or zero, just skip it */
912 if (*addr & 0x1 || !*addr) 914 if (*addr & 0x1 || !*addr)
@@ -996,9 +998,9 @@ void dump_bfin_process(struct pt_regs *fp)
996 998
997 printk(KERN_NOTICE "CPU = %d\n", current_thread_info()->cpu); 999 printk(KERN_NOTICE "CPU = %d\n", current_thread_info()->cpu);
998 if (!((unsigned long)current->mm & 0x3) && (unsigned long)current->mm >= FIXED_CODE_START) 1000 if (!((unsigned long)current->mm & 0x3) && (unsigned long)current->mm >= FIXED_CODE_START)
999 verbose_printk(KERN_NOTICE "TEXT = 0x%p-0x%p DATA = 0x%p-0x%p\n" 1001 verbose_printk(KERN_NOTICE
1000 KERN_NOTICE " BSS = 0x%p-0x%p USER-STACK = 0x%p\n" 1002 "TEXT = 0x%p-0x%p DATA = 0x%p-0x%p\n"
1001 KERN_NOTICE "\n", 1003 " BSS = 0x%p-0x%p USER-STACK = 0x%p\n\n",
1002 (void *)current->mm->start_code, 1004 (void *)current->mm->start_code,
1003 (void *)current->mm->end_code, 1005 (void *)current->mm->end_code,
1004 (void *)current->mm->start_data, 1006 (void *)current->mm->start_data,
@@ -1009,8 +1011,8 @@ void dump_bfin_process(struct pt_regs *fp)
1009 else 1011 else
1010 verbose_printk(KERN_NOTICE "invalid mm\n"); 1012 verbose_printk(KERN_NOTICE "invalid mm\n");
1011 } else 1013 } else
1012 verbose_printk(KERN_NOTICE "\n" KERN_NOTICE 1014 verbose_printk(KERN_NOTICE
1013 "No Valid process in current context\n"); 1015 "No Valid process in current context\n");
1014#endif 1016#endif
1015} 1017}
1016 1018
@@ -1028,7 +1030,7 @@ void dump_bfin_mem(struct pt_regs *fp)
1028 addr < (unsigned short *)((unsigned long)erraddr & ~0xF) + 0x10; 1030 addr < (unsigned short *)((unsigned long)erraddr & ~0xF) + 0x10;
1029 addr++) { 1031 addr++) {
1030 if (!((unsigned long)addr & 0xF)) 1032 if (!((unsigned long)addr & 0xF))
1031 verbose_printk("\n" KERN_NOTICE "0x%p: ", addr); 1033 verbose_printk(KERN_NOTICE "0x%p: ", addr);
1032 1034
1033 if (!get_instruction(&val, addr)) { 1035 if (!get_instruction(&val, addr)) {
1034 val = 0; 1036 val = 0;
@@ -1056,9 +1058,9 @@ void dump_bfin_mem(struct pt_regs *fp)
1056 oops_in_progress)){ 1058 oops_in_progress)){
1057 verbose_printk(KERN_NOTICE "Looks like this was a deferred error - sorry\n"); 1059 verbose_printk(KERN_NOTICE "Looks like this was a deferred error - sorry\n");
1058#ifndef CONFIG_DEBUG_HWERR 1060#ifndef CONFIG_DEBUG_HWERR
1059 verbose_printk(KERN_NOTICE "The remaining message may be meaningless\n" 1061 verbose_printk(KERN_NOTICE
1060 KERN_NOTICE "You should enable CONFIG_DEBUG_HWERR to get a" 1062"The remaining message may be meaningless\n"
1061 " better idea where it came from\n"); 1063"You should enable CONFIG_DEBUG_HWERR to get a better idea where it came from\n");
1062#else 1064#else
1063 /* If we are handling only one peripheral interrupt 1065 /* If we are handling only one peripheral interrupt
1064 * and current mm and pid are valid, and the last error 1066 * and current mm and pid are valid, and the last error
@@ -1114,9 +1116,10 @@ void show_regs(struct pt_regs *fp)
1114 1116
1115 verbose_printk(KERN_NOTICE "%s", linux_banner); 1117 verbose_printk(KERN_NOTICE "%s", linux_banner);
1116 1118
1117 verbose_printk(KERN_NOTICE "\n" KERN_NOTICE "SEQUENCER STATUS:\t\t%s\n", print_tainted()); 1119 verbose_printk(KERN_NOTICE "\nSEQUENCER STATUS:\t\t%s\n",
1120 print_tainted());
1118 verbose_printk(KERN_NOTICE " SEQSTAT: %08lx IPEND: %04lx SYSCFG: %04lx\n", 1121 verbose_printk(KERN_NOTICE " SEQSTAT: %08lx IPEND: %04lx SYSCFG: %04lx\n",
1119 (long)fp->seqstat, fp->ipend, fp->syscfg); 1122 (long)fp->seqstat, fp->ipend, fp->syscfg);
1120 if ((fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR) { 1123 if ((fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR) {
1121 verbose_printk(KERN_NOTICE " HWERRCAUSE: 0x%lx\n", 1124 verbose_printk(KERN_NOTICE " HWERRCAUSE: 0x%lx\n",
1122 (fp->seqstat & SEQSTAT_HWERRCAUSE) >> 14); 1125 (fp->seqstat & SEQSTAT_HWERRCAUSE) >> 14);
@@ -1184,7 +1187,7 @@ unlock:
1184 verbose_printk(KERN_NOTICE "ICPLB_FAULT_ADDR: %s\n", buf); 1187 verbose_printk(KERN_NOTICE "ICPLB_FAULT_ADDR: %s\n", buf);
1185 } 1188 }
1186 1189
1187 verbose_printk(KERN_NOTICE "\n" KERN_NOTICE "PROCESSOR STATE:\n"); 1190 verbose_printk(KERN_NOTICE "PROCESSOR STATE:\n");
1188 verbose_printk(KERN_NOTICE " R0 : %08lx R1 : %08lx R2 : %08lx R3 : %08lx\n", 1191 verbose_printk(KERN_NOTICE " R0 : %08lx R1 : %08lx R2 : %08lx R3 : %08lx\n",
1189 fp->r0, fp->r1, fp->r2, fp->r3); 1192 fp->r0, fp->r1, fp->r2, fp->r3);
1190 verbose_printk(KERN_NOTICE " R4 : %08lx R5 : %08lx R6 : %08lx R7 : %08lx\n", 1193 verbose_printk(KERN_NOTICE " R4 : %08lx R5 : %08lx R6 : %08lx R7 : %08lx\n",
diff --git a/arch/blackfin/lib/lshrdi3.c b/arch/blackfin/lib/lshrdi3.c
index 84b9c5592220..e57bf6fbdf3f 100644
--- a/arch/blackfin/lib/lshrdi3.c
+++ b/arch/blackfin/lib/lshrdi3.c
@@ -27,21 +27,7 @@
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */ 28 */
29 29
30#define BITS_PER_UNIT 8 30#include "gcclib.h"
31
32typedef int SItype __attribute__ ((mode(SI)));
33typedef unsigned int USItype __attribute__ ((mode(SI)));
34typedef int DItype __attribute__ ((mode(DI)));
35typedef int word_type __attribute__ ((mode(__word__)));
36
37struct DIstruct {
38 SItype high, low;
39};
40
41typedef union {
42 struct DIstruct s;
43 DItype ll;
44} DIunion;
45 31
46#ifdef CONFIG_ARITHMETIC_OPS_L1 32#ifdef CONFIG_ARITHMETIC_OPS_L1
47DItype __lshrdi3(DItype u, word_type b)__attribute__((l1_text)); 33DItype __lshrdi3(DItype u, word_type b)__attribute__((l1_text));
diff --git a/arch/blackfin/mach-bf518/boards/ezbrd.c b/arch/blackfin/mach-bf518/boards/ezbrd.c
index d9791106be9f..809be268e42d 100644
--- a/arch/blackfin/mach-bf518/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf518/boards/ezbrd.c
@@ -534,7 +534,7 @@ static struct platform_device i2c_bfin_twi_device = {
534#endif 534#endif
535 535
536static struct i2c_board_info __initdata bfin_i2c_board_info[] = { 536static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
537#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) 537#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
538 { 538 {
539 I2C_BOARD_INFO("pcf8574_lcd", 0x22), 539 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
540 }, 540 },
diff --git a/arch/blackfin/mach-bf518/include/mach/anomaly.h b/arch/blackfin/mach-bf518/include/mach/anomaly.h
index 426e064062a0..753ed810e1c6 100644
--- a/arch/blackfin/mach-bf518/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf518/include/mach/anomaly.h
@@ -82,6 +82,7 @@
82#define ANOMALY_05000179 (0) 82#define ANOMALY_05000179 (0)
83#define ANOMALY_05000182 (0) 83#define ANOMALY_05000182 (0)
84#define ANOMALY_05000183 (0) 84#define ANOMALY_05000183 (0)
85#define ANOMALY_05000189 (0)
85#define ANOMALY_05000198 (0) 86#define ANOMALY_05000198 (0)
86#define ANOMALY_05000202 (0) 87#define ANOMALY_05000202 (0)
87#define ANOMALY_05000215 (0) 88#define ANOMALY_05000215 (0)
@@ -117,6 +118,7 @@
117#define ANOMALY_05000357 (0) 118#define ANOMALY_05000357 (0)
118#define ANOMALY_05000362 (1) 119#define ANOMALY_05000362 (1)
119#define ANOMALY_05000363 (0) 120#define ANOMALY_05000363 (0)
121#define ANOMALY_05000364 (0)
120#define ANOMALY_05000371 (0) 122#define ANOMALY_05000371 (0)
121#define ANOMALY_05000380 (0) 123#define ANOMALY_05000380 (0)
122#define ANOMALY_05000386 (0) 124#define ANOMALY_05000386 (0)
diff --git a/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h
index 0fb2ce5d840e..dbade93395eb 100644
--- a/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h
@@ -53,7 +53,7 @@
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) 53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) 54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55 55
56#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin)) 56#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1) 57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0) 58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) 59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
diff --git a/arch/blackfin/mach-bf527/boards/cm_bf527.c b/arch/blackfin/mach-bf527/boards/cm_bf527.c
index f4867ce0c618..b09484f538f4 100644
--- a/arch/blackfin/mach-bf527/boards/cm_bf527.c
+++ b/arch/blackfin/mach-bf527/boards/cm_bf527.c
@@ -793,7 +793,7 @@ static struct platform_device i2c_bfin_twi_device = {
793#endif 793#endif
794 794
795static struct i2c_board_info __initdata bfin_i2c_board_info[] = { 795static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
796#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) 796#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
797 { 797 {
798 I2C_BOARD_INFO("pcf8574_lcd", 0x22), 798 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
799 .type = "pcf8574_lcd", 799 .type = "pcf8574_lcd",
diff --git a/arch/blackfin/mach-bf527/boards/ezbrd.c b/arch/blackfin/mach-bf527/boards/ezbrd.c
index b2f30f06b73e..2ad68cd10ae6 100644
--- a/arch/blackfin/mach-bf527/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf527/boards/ezbrd.c
@@ -591,7 +591,7 @@ static struct platform_device i2c_bfin_twi_device = {
591#endif 591#endif
592 592
593static struct i2c_board_info __initdata bfin_i2c_board_info[] = { 593static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
594#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) 594#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
595 { 595 {
596 I2C_BOARD_INFO("pcf8574_lcd", 0x22), 596 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
597 }, 597 },
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index 799a1d1fa890..75e563d3f9d4 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -858,7 +858,7 @@ static struct platform_device i2c_bfin_twi_device = {
858#endif 858#endif
859 859
860static struct i2c_board_info __initdata bfin_i2c_board_info[] = { 860static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
861#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) 861#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
862 { 862 {
863 I2C_BOARD_INFO("pcf8574_lcd", 0x22), 863 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
864 }, 864 },
diff --git a/arch/blackfin/mach-bf527/include/mach/anomaly.h b/arch/blackfin/mach-bf527/include/mach/anomaly.h
index 0d63f7406168..c438ca89d8c9 100644
--- a/arch/blackfin/mach-bf527/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf527/include/mach/anomaly.h
@@ -176,6 +176,8 @@
176#define ANOMALY_05000443 (1) 176#define ANOMALY_05000443 (1)
177/* The WURESET Bit in the SYSCR Register is not Functional */ 177/* The WURESET Bit in the SYSCR Register is not Functional */
178#define ANOMALY_05000445 (1) 178#define ANOMALY_05000445 (1)
179/* USB DMA Short Packet Data Corruption */
180#define ANOMALY_05000450 (1)
179/* BCODE_QUICKBOOT, BCODE_ALLBOOT, and BCODE_FULLBOOT Settings in SYSCR Register Not Functional */ 181/* BCODE_QUICKBOOT, BCODE_ALLBOOT, and BCODE_FULLBOOT Settings in SYSCR Register Not Functional */
180#define ANOMALY_05000451 (1) 182#define ANOMALY_05000451 (1)
181/* Incorrect Default Hysteresis Setting for RESET, NMI, and BMODE Signals */ 183/* Incorrect Default Hysteresis Setting for RESET, NMI, and BMODE Signals */
@@ -201,6 +203,7 @@
201#define ANOMALY_05000179 (0) 203#define ANOMALY_05000179 (0)
202#define ANOMALY_05000182 (0) 204#define ANOMALY_05000182 (0)
203#define ANOMALY_05000183 (0) 205#define ANOMALY_05000183 (0)
206#define ANOMALY_05000189 (0)
204#define ANOMALY_05000198 (0) 207#define ANOMALY_05000198 (0)
205#define ANOMALY_05000202 (0) 208#define ANOMALY_05000202 (0)
206#define ANOMALY_05000215 (0) 209#define ANOMALY_05000215 (0)
@@ -238,6 +241,5 @@
238#define ANOMALY_05000412 (0) 241#define ANOMALY_05000412 (0)
239#define ANOMALY_05000447 (0) 242#define ANOMALY_05000447 (0)
240#define ANOMALY_05000448 (0) 243#define ANOMALY_05000448 (0)
241#define ANOMALY_05000450 (0)
242 244
243#endif 245#endif
diff --git a/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
index a625659dd67f..ebd6cebc1fbc 100644
--- a/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
@@ -53,7 +53,7 @@
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) 53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) 54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55 55
56#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin)) 56#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1) 57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0) 58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) 59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c
index a68ade8a3ca2..3d743ccaff6a 100644
--- a/arch/blackfin/mach-bf533/boards/stamp.c
+++ b/arch/blackfin/mach-bf533/boards/stamp.c
@@ -453,7 +453,7 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
453 .irq = 39, 453 .irq = 39,
454 }, 454 },
455#endif 455#endif
456#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) 456#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
457 { 457 {
458 I2C_BOARD_INFO("pcf8574_lcd", 0x22), 458 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
459 }, 459 },
diff --git a/arch/blackfin/mach-bf533/include/mach/anomaly.h b/arch/blackfin/mach-bf533/include/mach/anomaly.h
index 70a0ad69c610..cd83db2fb1a1 100644
--- a/arch/blackfin/mach-bf533/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf533/include/mach/anomaly.h
@@ -335,6 +335,7 @@
335#define ANOMALY_05000323 (0) 335#define ANOMALY_05000323 (0)
336#define ANOMALY_05000353 (1) 336#define ANOMALY_05000353 (1)
337#define ANOMALY_05000362 (1) 337#define ANOMALY_05000362 (1)
338#define ANOMALY_05000364 (0)
338#define ANOMALY_05000380 (0) 339#define ANOMALY_05000380 (0)
339#define ANOMALY_05000386 (1) 340#define ANOMALY_05000386 (1)
340#define ANOMALY_05000389 (0) 341#define ANOMALY_05000389 (0)
diff --git a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
index a3789d7ccf8c..4062e24e759b 100644
--- a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
@@ -53,7 +53,7 @@
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) 53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) 54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55 55
56#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin)) 56#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1) 57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0) 58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) 59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index c1f76dd2c4ed..bd656907b8c0 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -1313,10 +1313,10 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
1313#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE) 1313#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
1314 { 1314 {
1315 I2C_BOARD_INFO("ad7142_joystick", 0x2C), 1315 I2C_BOARD_INFO("ad7142_joystick", 0x2C),
1316 .irq = IRQ_PF5, 1316 .irq = IRQ_PG5,
1317 }, 1317 },
1318#endif 1318#endif
1319#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) 1319#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
1320 { 1320 {
1321 I2C_BOARD_INFO("pcf8574_lcd", 0x22), 1321 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
1322 }, 1322 },
diff --git a/arch/blackfin/mach-bf537/include/mach/anomaly.h b/arch/blackfin/mach-bf537/include/mach/anomaly.h
index 57c128cc3b64..e66aa131f517 100644
--- a/arch/blackfin/mach-bf537/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf537/include/mach/anomaly.h
@@ -167,6 +167,7 @@
167#define ANOMALY_05000179 (0) 167#define ANOMALY_05000179 (0)
168#define ANOMALY_05000182 (0) 168#define ANOMALY_05000182 (0)
169#define ANOMALY_05000183 (0) 169#define ANOMALY_05000183 (0)
170#define ANOMALY_05000189 (0)
170#define ANOMALY_05000198 (0) 171#define ANOMALY_05000198 (0)
171#define ANOMALY_05000202 (0) 172#define ANOMALY_05000202 (0)
172#define ANOMALY_05000215 (0) 173#define ANOMALY_05000215 (0)
@@ -186,6 +187,7 @@
186#define ANOMALY_05000353 (1) 187#define ANOMALY_05000353 (1)
187#define ANOMALY_05000362 (1) 188#define ANOMALY_05000362 (1)
188#define ANOMALY_05000363 (0) 189#define ANOMALY_05000363 (0)
190#define ANOMALY_05000364 (0)
189#define ANOMALY_05000380 (0) 191#define ANOMALY_05000380 (0)
190#define ANOMALY_05000386 (1) 192#define ANOMALY_05000386 (1)
191#define ANOMALY_05000389 (0) 193#define ANOMALY_05000389 (0)
diff --git a/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h
index b86662fb9de7..e95d54f9af6c 100644
--- a/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h
@@ -53,7 +53,7 @@
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) 53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) 54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55 55
56#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin)) 56#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1) 57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0) 58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) 59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
diff --git a/arch/blackfin/mach-bf538/include/mach/anomaly.h b/arch/blackfin/mach-bf538/include/mach/anomaly.h
index c97acdf85cd3..451cf8a82a42 100644
--- a/arch/blackfin/mach-bf538/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf538/include/mach/anomaly.h
@@ -137,6 +137,7 @@
137#define ANOMALY_05000158 (0) 137#define ANOMALY_05000158 (0)
138#define ANOMALY_05000171 (0) 138#define ANOMALY_05000171 (0)
139#define ANOMALY_05000182 (0) 139#define ANOMALY_05000182 (0)
140#define ANOMALY_05000189 (0)
140#define ANOMALY_05000198 (0) 141#define ANOMALY_05000198 (0)
141#define ANOMALY_05000202 (0) 142#define ANOMALY_05000202 (0)
142#define ANOMALY_05000215 (0) 143#define ANOMALY_05000215 (0)
@@ -160,6 +161,7 @@
160#define ANOMALY_05000353 (1) 161#define ANOMALY_05000353 (1)
161#define ANOMALY_05000362 (1) 162#define ANOMALY_05000362 (1)
162#define ANOMALY_05000363 (0) 163#define ANOMALY_05000363 (0)
164#define ANOMALY_05000364 (0)
163#define ANOMALY_05000380 (0) 165#define ANOMALY_05000380 (0)
164#define ANOMALY_05000386 (1) 166#define ANOMALY_05000386 (1)
165#define ANOMALY_05000389 (0) 167#define ANOMALY_05000389 (0)
diff --git a/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h
index c536551eb4b8..999f239fe1a6 100644
--- a/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h
@@ -53,7 +53,7 @@
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) 53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) 54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55 55
56#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin)) 56#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1) 57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0) 58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) 59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index 81f5b95cc361..dc0dd9b2bcef 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -864,7 +864,7 @@ static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
864 864
865#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */ 865#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
866static struct i2c_board_info __initdata bfin_i2c_board_info1[] = { 866static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
867#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) 867#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
868 { 868 {
869 I2C_BOARD_INFO("pcf8574_lcd", 0x22), 869 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
870 }, 870 },
diff --git a/arch/blackfin/mach-bf548/include/mach/anomaly.h b/arch/blackfin/mach-bf548/include/mach/anomaly.h
index 18a4cd24f673..cd040fe0bc5c 100644
--- a/arch/blackfin/mach-bf548/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf548/include/mach/anomaly.h
@@ -195,6 +195,7 @@
195#define ANOMALY_05000179 (0) 195#define ANOMALY_05000179 (0)
196#define ANOMALY_05000182 (0) 196#define ANOMALY_05000182 (0)
197#define ANOMALY_05000183 (0) 197#define ANOMALY_05000183 (0)
198#define ANOMALY_05000189 (0)
198#define ANOMALY_05000198 (0) 199#define ANOMALY_05000198 (0)
199#define ANOMALY_05000202 (0) 200#define ANOMALY_05000202 (0)
200#define ANOMALY_05000215 (0) 201#define ANOMALY_05000215 (0)
@@ -226,6 +227,7 @@
226#define ANOMALY_05000323 (0) 227#define ANOMALY_05000323 (0)
227#define ANOMALY_05000362 (1) 228#define ANOMALY_05000362 (1)
228#define ANOMALY_05000363 (0) 229#define ANOMALY_05000363 (0)
230#define ANOMALY_05000364 (0)
229#define ANOMALY_05000380 (0) 231#define ANOMALY_05000380 (0)
230#define ANOMALY_05000400 (0) 232#define ANOMALY_05000400 (0)
231#define ANOMALY_05000412 (0) 233#define ANOMALY_05000412 (0)
diff --git a/arch/blackfin/mach-bf561/include/mach/anomaly.h b/arch/blackfin/mach-bf561/include/mach/anomaly.h
index 94b8e277f09d..a5312b2d267e 100644
--- a/arch/blackfin/mach-bf561/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf561/include/mach/anomaly.h
@@ -288,6 +288,7 @@
288#define ANOMALY_05000273 (0) 288#define ANOMALY_05000273 (0)
289#define ANOMALY_05000311 (0) 289#define ANOMALY_05000311 (0)
290#define ANOMALY_05000353 (1) 290#define ANOMALY_05000353 (1)
291#define ANOMALY_05000364 (0)
291#define ANOMALY_05000380 (0) 292#define ANOMALY_05000380 (0)
292#define ANOMALY_05000386 (1) 293#define ANOMALY_05000386 (1)
293#define ANOMALY_05000389 (0) 294#define ANOMALY_05000389 (0)
diff --git a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h
index a1b50878553f..fd5e8878b8c4 100644
--- a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h
@@ -53,7 +53,7 @@
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) 53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) 54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55 55
56#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin)) 56#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1) 57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0) 58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) 59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
diff --git a/arch/blackfin/mach-bf561/include/mach/mem_map.h b/arch/blackfin/mach-bf561/include/mach/mem_map.h
index a63e15c86d90..5b96ea549a04 100644
--- a/arch/blackfin/mach-bf561/include/mach/mem_map.h
+++ b/arch/blackfin/mach-bf561/include/mach/mem_map.h
@@ -37,7 +37,6 @@
37 37
38/* Memory Map for ADSP-BF561 processors */ 38/* Memory Map for ADSP-BF561 processors */
39 39
40#ifdef CONFIG_BF561
41#define COREA_L1_CODE_START 0xFFA00000 40#define COREA_L1_CODE_START 0xFFA00000
42#define COREA_L1_DATA_A_START 0xFF800000 41#define COREA_L1_DATA_A_START 0xFF800000
43#define COREA_L1_DATA_B_START 0xFF900000 42#define COREA_L1_DATA_B_START 0xFF900000
@@ -74,6 +73,28 @@
74#define BFIN_DCACHESIZE (0*1024) 73#define BFIN_DCACHESIZE (0*1024)
75#define BFIN_DSUPBANKS 0 74#define BFIN_DSUPBANKS 0
76#endif /*CONFIG_BFIN_DCACHE*/ 75#endif /*CONFIG_BFIN_DCACHE*/
76
77/*
78 * If we are in SMP mode, then the cache settings of Core B will match
79 * the settings of Core A. If we aren't, then we assume Core B is not
80 * using any cache. This allows the rest of the kernel to work with
81 * the core in either mode as we are only loading user code into it and
82 * it is the user's problem to make sure they aren't doing something
83 * stupid there.
84 *
85 * Note that we treat the L1 code region as a contiguous blob to make
86 * the rest of the kernel simpler. Easier to check one region than a
87 * bunch of small ones. Again, possible misbehavior here is the fault
88 * of the user -- don't try to use memory that doesn't exist.
89 */
90#ifdef CONFIG_SMP
91# define COREB_L1_CODE_LENGTH L1_CODE_LENGTH
92# define COREB_L1_DATA_A_LENGTH L1_DATA_A_LENGTH
93# define COREB_L1_DATA_B_LENGTH L1_DATA_B_LENGTH
94#else
95# define COREB_L1_CODE_LENGTH 0x14000
96# define COREB_L1_DATA_A_LENGTH 0x8000
97# define COREB_L1_DATA_B_LENGTH 0x8000
77#endif 98#endif
78 99
79/* Level 2 Memory */ 100/* Level 2 Memory */
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index 5a4e7c7fd92c..fb1795d5be2a 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -218,7 +218,7 @@ ENTRY(_ex_single_step)
218 /* Single stepping only a single instruction, so clear the trace 218 /* Single stepping only a single instruction, so clear the trace
219 * bit here. */ 219 * bit here. */
220 r7 = syscfg; 220 r7 = syscfg;
221 bitclr (r7, 0); 221 bitclr (r7, SYSCFG_SSSTEP_P);
222 syscfg = R7; 222 syscfg = R7;
223 jump _ex_trap_c; 223 jump _ex_trap_c;
224 224
@@ -251,7 +251,7 @@ ENTRY(_ex_single_step)
251 if !cc jump _bfin_return_from_exception; 251 if !cc jump _bfin_return_from_exception;
252 252
253 r7 = syscfg; 253 r7 = syscfg;
254 bitclr (r7, 0); 254 bitclr (r7, SYSCFG_SSSTEP_P); /* Turn off single step */
255 syscfg = R7; 255 syscfg = R7;
256 256
257 /* Fall through to _bfin_return_from_exception. */ 257 /* Fall through to _bfin_return_from_exception. */
@@ -342,9 +342,11 @@ ENTRY(_ex_trap_c)
342 r6 = retx; 342 r6 = retx;
343 [p5 + PDA_RETX] = r6; 343 [p5 + PDA_RETX] = r6;
344#endif 344#endif
345 /* Save the state of single stepping */
345 r6 = SYSCFG; 346 r6 = SYSCFG;
346 [p5 + PDA_SYSCFG] = r6; 347 [p5 + PDA_SYSCFG] = r6;
347 BITCLR(r6, 0); 348 /* Clear it while we handle the exception in IRQ5 mode */
349 BITCLR(r6, SYSCFG_SSSTEP_P);
348 SYSCFG = r6; 350 SYSCFG = r6;
349 351
350 /* Disable all interrupts, but make sure level 5 is enabled so 352 /* Disable all interrupts, but make sure level 5 is enabled so
@@ -367,7 +369,7 @@ ENDPROC(_ex_trap_c)
367 * exception. This is a unrecoverable event, so crash. 369 * exception. This is a unrecoverable event, so crash.
368 * Note: this cannot be ENTRY() as we jump here with "if cc jump" ... 370 * Note: this cannot be ENTRY() as we jump here with "if cc jump" ...
369 */ 371 */
370_double_fault: 372ENTRY(_double_fault)
371 /* Turn caches & protection off, to ensure we don't get any more 373 /* Turn caches & protection off, to ensure we don't get any more
372 * double exceptions 374 * double exceptions
373 */ 375 */
@@ -872,7 +874,7 @@ ENTRY(_ret_from_exception)
872 raise 15; /* raise evt15 to do signal or reschedule */ 874 raise 15; /* raise evt15 to do signal or reschedule */
8734: 8754:
874 r0 = syscfg; 876 r0 = syscfg;
875 bitclr(r0, 0); 877 bitclr(r0, SYSCFG_SSSTEP_P); /* Turn off single step */
876 syscfg = r0; 878 syscfg = r0;
8775: 8795:
878 rts; 880 rts;
diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c
index 61840059dfac..349ee3f5466a 100644
--- a/arch/blackfin/mach-common/smp.c
+++ b/arch/blackfin/mach-common/smp.c
@@ -211,6 +211,8 @@ int smp_call_function(void (*func)(void *info), void *info, int wait)
211 return 0; 211 return 0;
212 212
213 msg = kmalloc(sizeof(*msg), GFP_ATOMIC); 213 msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
214 if (!msg)
215 return -ENOMEM;
214 INIT_LIST_HEAD(&msg->list); 216 INIT_LIST_HEAD(&msg->list);
215 msg->call_struct.func = func; 217 msg->call_struct.func = func;
216 msg->call_struct.info = info; 218 msg->call_struct.info = info;
@@ -252,6 +254,8 @@ int smp_call_function_single(int cpuid, void (*func) (void *info), void *info,
252 cpu_set(cpu, callmap); 254 cpu_set(cpu, callmap);
253 255
254 msg = kmalloc(sizeof(*msg), GFP_ATOMIC); 256 msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
257 if (!msg)
258 return -ENOMEM;
255 INIT_LIST_HEAD(&msg->list); 259 INIT_LIST_HEAD(&msg->list);
256 msg->call_struct.func = func; 260 msg->call_struct.func = func;
257 msg->call_struct.info = info; 261 msg->call_struct.info = info;
@@ -287,6 +291,8 @@ void smp_send_reschedule(int cpu)
287 return; 291 return;
288 292
289 msg = kmalloc(sizeof(*msg), GFP_ATOMIC); 293 msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
294 if (!msg)
295 return;
290 memset(msg, 0, sizeof(msg)); 296 memset(msg, 0, sizeof(msg));
291 INIT_LIST_HEAD(&msg->list); 297 INIT_LIST_HEAD(&msg->list);
292 msg->type = BFIN_IPI_RESCHEDULE; 298 msg->type = BFIN_IPI_RESCHEDULE;
@@ -314,6 +320,8 @@ void smp_send_stop(void)
314 return; 320 return;
315 321
316 msg = kmalloc(sizeof(*msg), GFP_ATOMIC); 322 msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
323 if (!msg)
324 return;
317 memset(msg, 0, sizeof(msg)); 325 memset(msg, 0, sizeof(msg));
318 INIT_LIST_HEAD(&msg->list); 326 INIT_LIST_HEAD(&msg->list);
319 msg->type = BFIN_IPI_CPU_STOP; 327 msg->type = BFIN_IPI_CPU_STOP;
@@ -450,7 +458,7 @@ void __init smp_cpus_done(unsigned int max_cpus)
450 unsigned int cpu; 458 unsigned int cpu;
451 459
452 for_each_online_cpu(cpu) 460 for_each_online_cpu(cpu)
453 bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy; 461 bogosum += loops_per_jiffy;
454 462
455 printk(KERN_INFO "SMP: Total of %d processors activated " 463 printk(KERN_INFO "SMP: Total of %d processors activated "
456 "(%lu.%02lu BogoMIPS).\n", 464 "(%lu.%02lu BogoMIPS).\n",