aboutsummaryrefslogtreecommitdiffstats
path: root/arch/blackfin/mach-common
diff options
context:
space:
mode:
Diffstat (limited to 'arch/blackfin/mach-common')
-rw-r--r--arch/blackfin/mach-common/arch_checks.c2
-rw-r--r--arch/blackfin/mach-common/cache.S18
2 files changed, 13 insertions, 7 deletions
diff --git a/arch/blackfin/mach-common/arch_checks.c b/arch/blackfin/mach-common/arch_checks.c
index bceb98126c21..d8643fdd0fcf 100644
--- a/arch/blackfin/mach-common/arch_checks.c
+++ b/arch/blackfin/mach-common/arch_checks.c
@@ -61,6 +61,6 @@
61# error "Anomaly 05000220 does not allow you to use Write Back cache with L2 or External Memory" 61# error "Anomaly 05000220 does not allow you to use Write Back cache with L2 or External Memory"
62#endif 62#endif
63 63
64#if ANOMALY_05000491 && !defined(CONFIG_CACHE_FLUSH_L1) 64#if ANOMALY_05000491 && !defined(CONFIG_ICACHE_FLUSH_L1)
65# error You need IFLUSH in L1 inst while Anomaly 05000491 applies 65# error You need IFLUSH in L1 inst while Anomaly 05000491 applies
66#endif 66#endif
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S
index ab4a925a443e..85aadeb76658 100644
--- a/arch/blackfin/mach-common/cache.S
+++ b/arch/blackfin/mach-common/cache.S
@@ -11,12 +11,6 @@
11#include <asm/cache.h> 11#include <asm/cache.h>
12#include <asm/page.h> 12#include <asm/page.h>
13 13
14#ifdef CONFIG_CACHE_FLUSH_L1
15.section .l1.text
16#else
17.text
18#endif
19
20/* 05000443 - IFLUSH cannot be last instruction in hardware loop */ 14/* 05000443 - IFLUSH cannot be last instruction in hardware loop */
21#if ANOMALY_05000443 15#if ANOMALY_05000443
22# define BROK_FLUSH_INST "IFLUSH" 16# define BROK_FLUSH_INST "IFLUSH"
@@ -68,11 +62,23 @@
68 RTS; 62 RTS;
69.endm 63.endm
70 64
65#ifdef CONFIG_ICACHE_FLUSH_L1
66.section .l1.text
67#else
68.text
69#endif
70
71/* Invalidate all instruction cache lines assocoiated with this memory area */ 71/* Invalidate all instruction cache lines assocoiated with this memory area */
72ENTRY(_blackfin_icache_flush_range) 72ENTRY(_blackfin_icache_flush_range)
73 do_flush IFLUSH 73 do_flush IFLUSH
74ENDPROC(_blackfin_icache_flush_range) 74ENDPROC(_blackfin_icache_flush_range)
75 75
76#ifdef CONFIG_DCACHE_FLUSH_L1
77.section .l1.text
78#else
79.text
80#endif
81
76/* Throw away all D-cached data in specified region without any obligation to 82/* Throw away all D-cached data in specified region without any obligation to
77 * write them back. Since the Blackfin ISA does not have an "invalidate" 83 * write them back. Since the Blackfin ISA does not have an "invalidate"
78 * instruction, we use flush/invalidate. Perhaps as a speed optimization we 84 * instruction, we use flush/invalidate. Perhaps as a speed optimization we