3 files changed, 53 insertions, 37 deletions

diff --git a/arch/blackfin/mach-common/cacheinit.S b/arch/blackfin/mach-common/cacheinit.S
index 9d475623b724..5be6b975ae4a 100644
--- a/arch/blackfin/mach-common/cacheinit.S
+++ b/arch/blackfin/mach-common/cacheinit.S
@@ -60,6 +60,9 @@ ENDPROC(_bfin_write_IMEM_CONTROL)
 
 #if defined(CONFIG_BLKFIN_DCACHE)
 ENTRY(_bfin_write_DMEM_CONTROL)
+        P0.l = (DMEM_CONTROL & 0xFFFF);
+        P0.h = (DMEM_CONTROL >> 16);
+
         CLI R1;
         SSYNC;          /* SSYNC required before writing to DMEM_CONTROL. */
         .align 8;
diff --git a/arch/blackfin/mach-common/ints-priority-dc.c b/arch/blackfin/mach-common/ints-priority-dc.c
index 6b9fd03ce835..660f881b620a 100644
--- a/arch/blackfin/mach-common/ints-priority-dc.c
+++ b/arch/blackfin/mach-common/ints-priority-dc.c
@@ -358,26 +358,10 @@ static void bf561_demux_gpio_irq(unsigned int inta_irq,
 
 #endif                          /* CONFIG_IRQCHIP_DEMUX_GPIO */
 
-/*
- * This function should be called during kernel startup to initialize
- * the BFin IRQ handling routines.
- */
-int __init init_arch_irq(void)
+void __init init_exception_vectors(void)
 {
-        int irq;
-        unsigned long ilat = 0;
-        /*  Disable all the peripheral intrs  - page 4-29 HW Ref manual */
-        bfin_write_SICA_IMASK0(SIC_UNMASK_ALL);
-        bfin_write_SICA_IMASK1(SIC_UNMASK_ALL);
         SSYNC();
 
-        bfin_write_SICA_IWR0(IWR_ENABLE_ALL);
-        bfin_write_SICA_IWR1(IWR_ENABLE_ALL);
-
-        local_irq_disable();
-
-        init_exception_buff();
-
 #ifndef CONFIG_KGDB
         bfin_write_EVT0(evt_emulation);
 #endif
@@ -395,6 +379,27 @@ int __init init_arch_irq(void)
         bfin_write_EVT14(evt14_softirq);
         bfin_write_EVT15(evt_system_call);
         CSYNC();
+}
+
+/*
+ * This function should be called during kernel startup to initialize
+ * the BFin IRQ handling routines.
+ */
+int __init init_arch_irq(void)
+{
+        int irq;
+        unsigned long ilat = 0;
+        /*  Disable all the peripheral intrs  - page 4-29 HW Ref manual */
+        bfin_write_SICA_IMASK0(SIC_UNMASK_ALL);
+        bfin_write_SICA_IMASK1(SIC_UNMASK_ALL);
+        SSYNC();
+
+        bfin_write_SICA_IWR0(IWR_ENABLE_ALL);
+        bfin_write_SICA_IWR1(IWR_ENABLE_ALL);
+
+        local_irq_disable();
+
+        init_exception_buff();
 
         for (irq = 0; irq <= SYS_IRQS; irq++) {
                 if (irq <= IRQ_CORETMR)
diff --git a/arch/blackfin/mach-common/ints-priority-sc.c b/arch/blackfin/mach-common/ints-priority-sc.c
index 28a878c3577a..4708023fe716 100644
--- a/arch/blackfin/mach-common/ints-priority-sc.c
+++ b/arch/blackfin/mach-common/ints-priority-sc.c
@@ -579,8 +579,12 @@ static unsigned int bfin_gpio_irq_startup(unsigned int irq)
         u16 gpionr = irq - IRQ_PA0;
         u8 pint_val = irq2pint_lut[irq - SYS_IRQS];
 
-        if (pint_val == IRQ_NOT_AVAIL)
+        if (pint_val == IRQ_NOT_AVAIL) {
+                printk(KERN_ERR
+                "GPIO IRQ %d :Not in PINT Assign table "
+                "Reconfigure Interrupt to Port Assignemt\n", irq);
                 return -ENODEV;
+        }
 
         if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
                 ret = gpio_request(gpionr, NULL);
@@ -713,6 +717,29 @@ static void bfin_demux_gpio_irq(unsigned int intb_irq,
 }
 #endif                          /* CONFIG_IRQCHIP_DEMUX_GPIO */
 
+void __init init_exception_vectors(void)
+{
+        SSYNC();
+
+#ifndef CONFIG_KGDB
+        bfin_write_EVT0(evt_emulation);
+#endif
+        bfin_write_EVT2(evt_evt2);
+        bfin_write_EVT3(trap);
+        bfin_write_EVT5(evt_ivhw);
+        bfin_write_EVT6(evt_timer);
+        bfin_write_EVT7(evt_evt7);
+        bfin_write_EVT8(evt_evt8);
+        bfin_write_EVT9(evt_evt9);
+        bfin_write_EVT10(evt_evt10);
+        bfin_write_EVT11(evt_evt11);
+        bfin_write_EVT12(evt_evt12);
+        bfin_write_EVT13(evt_evt13);
+        bfin_write_EVT14(evt14_softirq);
+        bfin_write_EVT15(evt_system_call);
+        CSYNC();
+}
+
 /*
  * This function should be called during kernel startup to initialize
  * the BFin IRQ handling routines.
@@ -733,29 +760,10 @@ int __init init_arch_irq(void)
         bfin_write_SIC_IMASK(SIC_UNMASK_ALL);
         bfin_write_SIC_IWR(IWR_ENABLE_ALL);
 #endif
-
         SSYNC();
 
         local_irq_disable();
 
-#ifndef CONFIG_KGDB
-        bfin_write_EVT0(evt_emulation);
-#endif
-        bfin_write_EVT2(evt_evt2);
-        bfin_write_EVT3(trap);
-        bfin_write_EVT5(evt_ivhw);
-        bfin_write_EVT6(evt_timer);
-        bfin_write_EVT7(evt_evt7);
-        bfin_write_EVT8(evt_evt8);
-        bfin_write_EVT9(evt_evt9);
-        bfin_write_EVT10(evt_evt10);
-        bfin_write_EVT11(evt_evt11);
-        bfin_write_EVT12(evt_evt12);
-        bfin_write_EVT13(evt_evt13);
-        bfin_write_EVT14(evt14_softirq);
-        bfin_write_EVT15(evt_system_call);
-        CSYNC();
-
 #if defined(CONFIG_IRQCHIP_DEMUX_GPIO) && defined(CONFIG_BF54x)
 #ifdef CONFIG_PINTx_REASSIGN
         pint[0]->assign = CONFIG_PINT0_ASSIGN;