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-rw-r--r--arch/blackfin/mach-common/cache.S8
-rw-r--r--arch/blackfin/mach-common/cpufreq.c14
-rw-r--r--arch/blackfin/mach-common/entry.S2
3 files changed, 14 insertions, 10 deletions
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S
index db532181fbde..a028e9450419 100644
--- a/arch/blackfin/mach-common/cache.S
+++ b/arch/blackfin/mach-common/cache.S
@@ -25,9 +25,13 @@
25 */ 25 */
26.macro do_flush flushins:req optflushins optnopins label 26.macro do_flush flushins:req optflushins optnopins label
27 27
28 R2 = -L1_CACHE_BYTES;
29
30 /* start = (start & -L1_CACHE_BYTES) */
31 R0 = R0 & R2;
32
28 /* end = ((end - 1) & -L1_CACHE_BYTES) + L1_CACHE_BYTES; */ 33 /* end = ((end - 1) & -L1_CACHE_BYTES) + L1_CACHE_BYTES; */
29 R1 += -1; 34 R1 += -1;
30 R2 = -L1_CACHE_BYTES;
31 R1 = R1 & R2; 35 R1 = R1 & R2;
32 R1 += L1_CACHE_BYTES; 36 R1 += L1_CACHE_BYTES;
33 37
@@ -63,7 +67,7 @@ ENDPROC(_blackfin_icache_flush_range)
63 67
64/* Flush all cache lines assocoiated with this area of memory. */ 68/* Flush all cache lines assocoiated with this area of memory. */
65ENTRY(_blackfin_icache_dcache_flush_range) 69ENTRY(_blackfin_icache_dcache_flush_range)
66 do_flush IFLUSH, FLUSH 70 do_flush FLUSH, IFLUSH
67ENDPROC(_blackfin_icache_dcache_flush_range) 71ENDPROC(_blackfin_icache_dcache_flush_range)
68 72
69/* Throw away all D-cached data in specified region without any obligation to 73/* Throw away all D-cached data in specified region without any obligation to
diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c
index c22c47b60127..dda5443b37ed 100644
--- a/arch/blackfin/mach-common/cpufreq.c
+++ b/arch/blackfin/mach-common/cpufreq.c
@@ -72,13 +72,13 @@ unsigned int __bfin_cycles_mod;
72 72
73/**************************************************************************/ 73/**************************************************************************/
74 74
75static unsigned int bfin_getfreq(unsigned int cpu) 75static unsigned int bfin_getfreq_khz(unsigned int cpu)
76{ 76{
77 /* The driver only support single cpu */ 77 /* The driver only support single cpu */
78 if (cpu != 0) 78 if (cpu != 0)
79 return -1; 79 return -1;
80 80
81 return get_cclk(); 81 return get_cclk() / 1000;
82} 82}
83 83
84 84
@@ -96,7 +96,7 @@ static int bfin_target(struct cpufreq_policy *policy,
96 96
97 cclk_hz = bfin_freq_table[index].frequency; 97 cclk_hz = bfin_freq_table[index].frequency;
98 98
99 freqs.old = bfin_getfreq(0); 99 freqs.old = bfin_getfreq_khz(0);
100 freqs.new = cclk_hz; 100 freqs.new = cclk_hz;
101 freqs.cpu = 0; 101 freqs.cpu = 0;
102 102
@@ -137,8 +137,8 @@ static int __init __bfin_cpu_init(struct cpufreq_policy *policy)
137 if (policy->cpu != 0) 137 if (policy->cpu != 0)
138 return -EINVAL; 138 return -EINVAL;
139 139
140 cclk = get_cclk(); 140 cclk = get_cclk() / 1000;
141 sclk = get_sclk(); 141 sclk = get_sclk() / 1000;
142 142
143#if ANOMALY_05000273 || (!defined(CONFIG_BF54x) && defined(CONFIG_BFIN_DCACHE)) 143#if ANOMALY_05000273 || (!defined(CONFIG_BF54x) && defined(CONFIG_BFIN_DCACHE))
144 min_cclk = sclk * 2; 144 min_cclk = sclk * 2;
@@ -152,7 +152,7 @@ static int __init __bfin_cpu_init(struct cpufreq_policy *policy)
152 dpm_state_table[index].csel = csel << 4; /* Shift now into PLL_DIV bitpos */ 152 dpm_state_table[index].csel = csel << 4; /* Shift now into PLL_DIV bitpos */
153 dpm_state_table[index].tscale = (TIME_SCALE / (1 << csel)) - 1; 153 dpm_state_table[index].tscale = (TIME_SCALE / (1 << csel)) - 1;
154 154
155 pr_debug("cpufreq: freq:%d csel:%d tscale:%d\n", 155 pr_debug("cpufreq: freq:%d csel:0x%x tscale:%d\n",
156 bfin_freq_table[index].frequency, 156 bfin_freq_table[index].frequency,
157 dpm_state_table[index].csel, 157 dpm_state_table[index].csel,
158 dpm_state_table[index].tscale); 158 dpm_state_table[index].tscale);
@@ -173,7 +173,7 @@ static struct freq_attr *bfin_freq_attr[] = {
173static struct cpufreq_driver bfin_driver = { 173static struct cpufreq_driver bfin_driver = {
174 .verify = bfin_verify_speed, 174 .verify = bfin_verify_speed,
175 .target = bfin_target, 175 .target = bfin_target,
176 .get = bfin_getfreq, 176 .get = bfin_getfreq_khz,
177 .init = __bfin_cpu_init, 177 .init = __bfin_cpu_init,
178 .name = "bfin cpufreq", 178 .name = "bfin cpufreq",
179 .owner = THIS_MODULE, 179 .owner = THIS_MODULE,
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index c13fa8da28c7..bde6dc4e2614 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -277,7 +277,7 @@ ENTRY(_bfin_return_from_exception)
277 p5.h = hi(ILAT); 277 p5.h = hi(ILAT);
278 r6 = [p5]; 278 r6 = [p5];
279 r7 = 0x20; /* Did I just cause anther HW error? */ 279 r7 = 0x20; /* Did I just cause anther HW error? */
280 r7 = r7 & r1; 280 r6 = r7 & r6;
281 CC = R7 == R6; 281 CC = R7 == R6;
282 if CC JUMP _double_fault; 282 if CC JUMP _double_fault;
283#endif 283#endif