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-rw-r--r--arch/blackfin/mach-common/ints-priority.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 1c8c4c7245c3..eaece5f84e42 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -132,8 +132,8 @@ static void bfin_ack_noop(unsigned int irq)
132static void bfin_core_mask_irq(unsigned int irq) 132static void bfin_core_mask_irq(unsigned int irq)
133{ 133{
134 bfin_irq_flags &= ~(1 << irq); 134 bfin_irq_flags &= ~(1 << irq);
135 if (!irqs_disabled_hw()) 135 if (!hard_irqs_disabled())
136 local_irq_enable_hw(); 136 hard_local_irq_enable();
137} 137}
138 138
139static void bfin_core_unmask_irq(unsigned int irq) 139static void bfin_core_unmask_irq(unsigned int irq)
@@ -148,8 +148,8 @@ static void bfin_core_unmask_irq(unsigned int irq)
148 * local_irq_enable just does "STI bfin_irq_flags", so it's exactly 148 * local_irq_enable just does "STI bfin_irq_flags", so it's exactly
149 * what we need. 149 * what we need.
150 */ 150 */
151 if (!irqs_disabled_hw()) 151 if (!hard_irqs_disabled())
152 local_irq_enable_hw(); 152 hard_local_irq_enable();
153 return; 153 return;
154} 154}
155 155
@@ -158,12 +158,12 @@ static void bfin_internal_mask_irq(unsigned int irq)
158 unsigned long flags; 158 unsigned long flags;
159 159
160#ifdef CONFIG_BF53x 160#ifdef CONFIG_BF53x
161 local_irq_save_hw(flags); 161 flags = hard_local_irq_save();
162 bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() & 162 bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() &
163 ~(1 << SIC_SYSIRQ(irq))); 163 ~(1 << SIC_SYSIRQ(irq)));
164#else 164#else
165 unsigned mask_bank, mask_bit; 165 unsigned mask_bank, mask_bit;
166 local_irq_save_hw(flags); 166 flags = hard_local_irq_save();
167 mask_bank = SIC_SYSIRQ(irq) / 32; 167 mask_bank = SIC_SYSIRQ(irq) / 32;
168 mask_bit = SIC_SYSIRQ(irq) % 32; 168 mask_bit = SIC_SYSIRQ(irq) % 32;
169 bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) & 169 bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) &
@@ -173,7 +173,7 @@ static void bfin_internal_mask_irq(unsigned int irq)
173 ~(1 << mask_bit)); 173 ~(1 << mask_bit));
174#endif 174#endif
175#endif 175#endif
176 local_irq_restore_hw(flags); 176 hard_local_irq_restore(flags);
177} 177}
178 178
179#ifdef CONFIG_SMP 179#ifdef CONFIG_SMP
@@ -186,12 +186,12 @@ static void bfin_internal_unmask_irq(unsigned int irq)
186 unsigned long flags; 186 unsigned long flags;
187 187
188#ifdef CONFIG_BF53x 188#ifdef CONFIG_BF53x
189 local_irq_save_hw(flags); 189 flags = hard_local_irq_save();
190 bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() | 190 bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() |
191 (1 << SIC_SYSIRQ(irq))); 191 (1 << SIC_SYSIRQ(irq)));
192#else 192#else
193 unsigned mask_bank, mask_bit; 193 unsigned mask_bank, mask_bit;
194 local_irq_save_hw(flags); 194 flags = hard_local_irq_save();
195 mask_bank = SIC_SYSIRQ(irq) / 32; 195 mask_bank = SIC_SYSIRQ(irq) / 32;
196 mask_bit = SIC_SYSIRQ(irq) % 32; 196 mask_bit = SIC_SYSIRQ(irq) % 32;
197#ifdef CONFIG_SMP 197#ifdef CONFIG_SMP
@@ -207,7 +207,7 @@ static void bfin_internal_unmask_irq(unsigned int irq)
207 (1 << mask_bit)); 207 (1 << mask_bit));
208#endif 208#endif
209#endif 209#endif
210 local_irq_restore_hw(flags); 210 hard_local_irq_restore(flags);
211} 211}
212 212
213#ifdef CONFIG_SMP 213#ifdef CONFIG_SMP
@@ -264,7 +264,7 @@ int bfin_internal_set_wake(unsigned int irq, unsigned int state)
264 break; 264 break;
265 } 265 }
266 266
267 local_irq_save_hw(flags); 267 flags = hard_local_irq_save();
268 268
269 if (state) { 269 if (state) {
270 bfin_sic_iwr[bank] |= (1 << bit); 270 bfin_sic_iwr[bank] |= (1 << bit);
@@ -275,7 +275,7 @@ int bfin_internal_set_wake(unsigned int irq, unsigned int state)
275 vr_wakeup &= ~wakeup; 275 vr_wakeup &= ~wakeup;
276 } 276 }
277 277
278 local_irq_restore_hw(flags); 278 hard_local_irq_restore(flags);
279 279
280 return 0; 280 return 0;
281} 281}