diff options
Diffstat (limited to 'arch/blackfin/mach-common/ints-priority.c')
-rw-r--r-- | arch/blackfin/mach-common/ints-priority.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index 1bba6030dce9..202494568c6c 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c | |||
@@ -1101,10 +1101,9 @@ int __init init_arch_irq(void) | |||
1101 | IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 | | 1101 | IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 | |
1102 | IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; | 1102 | IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; |
1103 | 1103 | ||
1104 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) \ | 1104 | #ifdef SIC_IWR0 |
1105 | || defined(BF538_FAMILY) || defined(CONFIG_BF51x) | ||
1106 | bfin_write_SIC_IWR0(IWR_DISABLE_ALL); | 1105 | bfin_write_SIC_IWR0(IWR_DISABLE_ALL); |
1107 | #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x) | 1106 | # ifdef SIC_IWR1 |
1108 | /* BF52x/BF51x system reset does not properly reset SIC_IWR1 which | 1107 | /* BF52x/BF51x system reset does not properly reset SIC_IWR1 which |
1109 | * will screw up the bootrom as it relies on MDMA0/1 waking it | 1108 | * will screw up the bootrom as it relies on MDMA0/1 waking it |
1110 | * up from IDLE instructions. See this report for more info: | 1109 | * up from IDLE instructions. See this report for more info: |
@@ -1114,10 +1113,8 @@ int __init init_arch_irq(void) | |||
1114 | bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11)); | 1113 | bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11)); |
1115 | else | 1114 | else |
1116 | bfin_write_SIC_IWR1(IWR_DISABLE_ALL); | 1115 | bfin_write_SIC_IWR1(IWR_DISABLE_ALL); |
1117 | #else | 1116 | # endif |
1118 | bfin_write_SIC_IWR1(IWR_DISABLE_ALL); | 1117 | # ifdef SIC_IWR2 |
1119 | #endif | ||
1120 | # ifdef CONFIG_BF54x | ||
1121 | bfin_write_SIC_IWR2(IWR_DISABLE_ALL); | 1118 | bfin_write_SIC_IWR2(IWR_DISABLE_ALL); |
1122 | # endif | 1119 | # endif |
1123 | #else | 1120 | #else |