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-rw-r--r--arch/blackfin/mach-common/dpmc.S137
1 files changed, 2 insertions, 135 deletions
diff --git a/arch/blackfin/mach-common/dpmc.S b/arch/blackfin/mach-common/dpmc.S
index b80ddd8b232d..9d45aa3265b1 100644
--- a/arch/blackfin/mach-common/dpmc.S
+++ b/arch/blackfin/mach-common/dpmc.S
@@ -31,140 +31,6 @@
31#include <asm/blackfin.h> 31#include <asm/blackfin.h>
32#include <asm/mach/irq.h> 32#include <asm/mach/irq.h>
33 33
34.text
35
36ENTRY(_unmask_wdog_wakeup_evt)
37 [--SP] = ( R7:0, P5:0 );
38#if defined(CONFIG_BF561)
39 P0.H = hi(SICA_IWR1);
40 P0.L = lo(SICA_IWR1);
41#elif defined(CONFIG_BF54x) || defined(CONFIG_BF52x)
42 P0.h = HI(SIC_IWR0);
43 P0.l = LO(SIC_IWR0);
44#else
45 P0.h = HI(SIC_IWR);
46 P0.l = LO(SIC_IWR);
47#endif
48 R7 = [P0];
49#if defined(CONFIG_BF561)
50 BITSET(R7, 27);
51#else
52 BITSET(R7,(IRQ_WATCH - IVG7));
53#endif
54 [P0] = R7;
55 SSYNC;
56
57 ( R7:0, P5:0 ) = [SP++];
58 RTS;
59
60.LWRITE_TO_STAT:
61 /* When watch dog timer is enabled, a write to STAT will load the
62 * contents of CNT to STAT
63 */
64 R7 = 0x0000(z);
65#if defined(CONFIG_BF561)
66 P0.h = HI(WDOGA_STAT);
67 P0.l = LO(WDOGA_STAT);
68#else
69 P0.h = HI(WDOG_STAT);
70 P0.l = LO(WDOG_STAT);
71#endif
72 [P0] = R7;
73 SSYNC;
74 JUMP .LSKIP_WRITE_TO_STAT;
75
76ENTRY(_program_wdog_timer)
77 [--SP] = ( R7:0, P5:0 );
78#if defined(CONFIG_BF561)
79 P0.h = HI(WDOGA_CNT);
80 P0.l = LO(WDOGA_CNT);
81#else
82 P0.h = HI(WDOG_CNT);
83 P0.l = LO(WDOG_CNT);
84#endif
85 [P0] = R0;
86 SSYNC;
87
88#if defined(CONFIG_BF561)
89 P0.h = HI(WDOGA_CTL);
90 P0.l = LO(WDOGA_CTL);
91#else
92 P0.h = HI(WDOG_CTL);
93 P0.l = LO(WDOG_CTL);
94#endif
95 R7 = W[P0](Z);
96 CC = BITTST(R7,1);
97 if !CC JUMP .LWRITE_TO_STAT;
98 CC = BITTST(R7,2);
99 if !CC JUMP .LWRITE_TO_STAT;
100
101.LSKIP_WRITE_TO_STAT:
102#if defined(CONFIG_BF561)
103 P0.h = HI(WDOGA_CTL);
104 P0.l = LO(WDOGA_CTL);
105#else
106 P0.h = HI(WDOG_CTL);
107 P0.l = LO(WDOG_CTL);
108#endif
109 R7 = W[P0](Z);
110 BITCLR(R7,1); /* Enable GP event */
111 BITSET(R7,2);
112 W[P0] = R7.L;
113 SSYNC;
114 NOP;
115
116 R7 = W[P0](Z);
117 BITCLR(R7,4); /* Enable the wdog counter */
118 W[P0] = R7.L;
119 SSYNC;
120
121 ( R7:0, P5:0 ) = [SP++];
122 RTS;
123
124ENTRY(_clear_wdog_wakeup_evt)
125 [--SP] = ( R7:0, P5:0 );
126
127#if defined(CONFIG_BF561)
128 P0.h = HI(WDOGA_CTL);
129 P0.l = LO(WDOGA_CTL);
130#else
131 P0.h = HI(WDOG_CTL);
132 P0.l = LO(WDOG_CTL);
133#endif
134 R7 = 0x0AD6(Z);
135 W[P0] = R7.L;
136 SSYNC;
137
138 R7 = W[P0](Z);
139 BITSET(R7,15);
140 W[P0] = R7.L;
141 SSYNC;
142
143 R7 = W[P0](Z);
144 BITSET(R7,1);
145 BITSET(R7,2);
146 W[P0] = R7.L;
147 SSYNC;
148
149 ( R7:0, P5:0 ) = [SP++];
150 RTS;
151
152ENTRY(_disable_wdog_timer)
153 [--SP] = ( R7:0, P5:0 );
154#if defined(CONFIG_BF561)
155 P0.h = HI(WDOGA_CTL);
156 P0.l = LO(WDOGA_CTL);
157#else
158 P0.h = HI(WDOG_CTL);
159 P0.l = LO(WDOG_CTL);
160#endif
161 R7 = 0xAD6(Z);
162 W[P0] = R7.L;
163 SSYNC;
164 ( R7:0, P5:0 ) = [SP++];
165 RTS;
166
167#if !defined(CONFIG_BF561)
168 34
169.section .l1.text 35.section .l1.text
170 36
@@ -459,10 +325,12 @@ ENTRY(_set_sic_iwr)
459 RTS; 325 RTS;
460 326
461ENTRY(_set_rtc_istat) 327ENTRY(_set_rtc_istat)
328#ifndef CONFIG_BF561
462 P0.H = hi(RTC_ISTAT); 329 P0.H = hi(RTC_ISTAT);
463 P0.L = lo(RTC_ISTAT); 330 P0.L = lo(RTC_ISTAT);
464 w[P0] = R0.L; 331 w[P0] = R0.L;
465 SSYNC; 332 SSYNC;
333#endif
466 RTS; 334 RTS;
467 335
468ENTRY(_test_pll_locked) 336ENTRY(_test_pll_locked)
@@ -473,4 +341,3 @@ ENTRY(_test_pll_locked)
473 CC = BITTST(R0,5); 341 CC = BITTST(R0,5);
474 IF !CC JUMP 1b; 342 IF !CC JUMP 1b;
475 RTS; 343 RTS;
476#endif