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-rw-r--r--arch/blackfin/mach-bf561/boards/cm_bf561.c8
-rw-r--r--arch/blackfin/mach-bf561/boards/ezkit.c52
-rw-r--r--arch/blackfin/mach-bf561/head.S275
-rw-r--r--arch/blackfin/mach-bf561/ints-priority.c2
4 files changed, 10 insertions, 327 deletions
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c
index 466ef5929a25..8f40990eea2f 100644
--- a/arch/blackfin/mach-bf561/boards/cm_bf561.c
+++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c
@@ -54,16 +54,16 @@ const char bfin_board_name[] = "Bluetechnix CM BF561";
54#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 54#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
55static struct mtd_partition bfin_spi_flash_partitions[] = { 55static struct mtd_partition bfin_spi_flash_partitions[] = {
56 { 56 {
57 .name = "bootloader", 57 .name = "bootloader(spi)",
58 .size = 0x00020000, 58 .size = 0x00020000,
59 .offset = 0, 59 .offset = 0,
60 .mask_flags = MTD_CAP_ROM 60 .mask_flags = MTD_CAP_ROM
61 }, { 61 }, {
62 .name = "kernel", 62 .name = "linux kernel(spi)",
63 .size = 0xe0000, 63 .size = 0xe0000,
64 .offset = 0x20000 64 .offset = 0x20000
65 }, { 65 }, {
66 .name = "file system", 66 .name = "file system(spi)",
67 .size = 0x700000, 67 .size = 0x700000,
68 .offset = 0x00100000, 68 .offset = 0x00100000,
69 } 69 }
@@ -306,7 +306,7 @@ static struct platform_device bfin_sir_device = {
306#endif 306#endif
307 307
308#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) 308#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
309#define PATA_INT 119 309#define PATA_INT IRQ_PF46
310 310
311static struct pata_platform_info bfin_pata_platform_data = { 311static struct pata_platform_info bfin_pata_platform_data = {
312 .ioport_shift = 2, 312 .ioport_shift = 2,
diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c
index bc6feded8569..50b4cdceccfe 100644
--- a/arch/blackfin/mach-bf561/boards/ezkit.c
+++ b/arch/blackfin/mach-bf561/boards/ezkit.c
@@ -35,7 +35,6 @@
35#include <linux/spi/spi.h> 35#include <linux/spi/spi.h>
36#include <linux/irq.h> 36#include <linux/irq.h>
37#include <linux/interrupt.h> 37#include <linux/interrupt.h>
38#include <linux/ata_platform.h>
39#include <asm/dma.h> 38#include <asm/dma.h>
40#include <asm/bfin5xx_spi.h> 39#include <asm/bfin5xx_spi.h>
41#include <asm/portmux.h> 40#include <asm/portmux.h>
@@ -243,15 +242,15 @@ static struct platform_device bfin_sir_device = {
243#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) 242#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
244static struct mtd_partition ezkit_partitions[] = { 243static struct mtd_partition ezkit_partitions[] = {
245 { 244 {
246 .name = "Bootloader", 245 .name = "bootloader(nor)",
247 .size = 0x40000, 246 .size = 0x40000,
248 .offset = 0, 247 .offset = 0,
249 }, { 248 }, {
250 .name = "Kernel", 249 .name = "linux kernel(nor)",
251 .size = 0x1C0000, 250 .size = 0x1C0000,
252 .offset = MTDPART_OFS_APPEND, 251 .offset = MTDPART_OFS_APPEND,
253 }, { 252 }, {
254 .name = "RootFS", 253 .name = "file system(nor)",
255 .size = MTDPART_SIZ_FULL, 254 .size = MTDPART_SIZ_FULL,
256 .offset = MTDPART_OFS_APPEND, 255 .offset = MTDPART_OFS_APPEND,
257 } 256 }
@@ -350,43 +349,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
350#endif 349#endif
351}; 350};
352 351
353#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
354#define PATA_INT 55
355
356static struct pata_platform_info bfin_pata_platform_data = {
357 .ioport_shift = 1,
358 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
359};
360
361static struct resource bfin_pata_resources[] = {
362 {
363 .start = 0x20314020,
364 .end = 0x2031403F,
365 .flags = IORESOURCE_MEM,
366 },
367 {
368 .start = 0x2031401C,
369 .end = 0x2031401F,
370 .flags = IORESOURCE_MEM,
371 },
372 {
373 .start = PATA_INT,
374 .end = PATA_INT,
375 .flags = IORESOURCE_IRQ,
376 },
377};
378
379static struct platform_device bfin_pata_device = {
380 .name = "pata_platform",
381 .id = -1,
382 .num_resources = ARRAY_SIZE(bfin_pata_resources),
383 .resource = bfin_pata_resources,
384 .dev = {
385 .platform_data = &bfin_pata_platform_data,
386 }
387};
388#endif
389
390#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 352#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
391#include <linux/input.h> 353#include <linux/input.h>
392#include <linux/gpio_keys.h> 354#include <linux/gpio_keys.h>
@@ -499,10 +461,6 @@ static struct platform_device *ezkit_devices[] __initdata = {
499 &bfin_sir_device, 461 &bfin_sir_device,
500#endif 462#endif
501 463
502#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
503 &bfin_pata_device,
504#endif
505
506#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 464#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
507 &bfin_device_gpiokeys, 465 &bfin_device_gpiokeys,
508#endif 466#endif
@@ -538,10 +496,6 @@ static int __init ezkit_init(void)
538#endif 496#endif
539 497
540 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); 498 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
541
542#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
543 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
544#endif
545 return 0; 499 return 0;
546} 500}
547 501
diff --git a/arch/blackfin/mach-bf561/head.S b/arch/blackfin/mach-bf561/head.S
index cf1a2dff01e7..c7a81e34703d 100644
--- a/arch/blackfin/mach-bf561/head.S
+++ b/arch/blackfin/mach-bf561/head.S
@@ -30,284 +30,13 @@
30#include <linux/linkage.h> 30#include <linux/linkage.h>
31#include <linux/init.h> 31#include <linux/init.h>
32#include <asm/blackfin.h> 32#include <asm/blackfin.h>
33#include <asm/trace.h> 33#ifdef CONFIG_BFIN_KERNEL_CLOCK
34
35#if CONFIG_BFIN_KERNEL_CLOCK
36#include <asm/mach-common/clocks.h> 34#include <asm/mach-common/clocks.h>
37#include <asm/mach/mem_init.h> 35#include <asm/mach/mem_init.h>
38#endif 36#endif
39 37
40.extern ___bss_stop
41.extern ___bss_start
42.extern _bf53x_relocate_l1_mem
43
44#define INITIAL_STACK 0xFFB01000
45
46__INIT
47
48ENTRY(__start)
49 /* R0: argument of command line string, passed from uboot, save it */
50 R7 = R0;
51 /* Enable Cycle Counter and Nesting Of Interrupts */
52#ifdef CONFIG_BFIN_SCRATCH_REG_CYCLES
53 R0 = SYSCFG_SNEN;
54#else
55 R0 = SYSCFG_SNEN | SYSCFG_CCEN;
56#endif
57 SYSCFG = R0;
58 R0 = 0;
59
60 /* Clear Out All the data and pointer Registers */
61 R1 = R0;
62 R2 = R0;
63 R3 = R0;
64 R4 = R0;
65 R5 = R0;
66 R6 = R0;
67
68 P0 = R0;
69 P1 = R0;
70 P2 = R0;
71 P3 = R0;
72 P4 = R0;
73 P5 = R0;
74
75 LC0 = r0;
76 LC1 = r0;
77 L0 = r0;
78 L1 = r0;
79 L2 = r0;
80 L3 = r0;
81
82 /* Clear Out All the DAG Registers */
83 B0 = r0;
84 B1 = r0;
85 B2 = r0;
86 B3 = r0;
87
88 I0 = r0;
89 I1 = r0;
90 I2 = r0;
91 I3 = r0;
92
93 M0 = r0;
94 M1 = r0;
95 M2 = r0;
96 M3 = r0;
97
98 trace_buffer_init(p0,r0);
99 P0 = R1;
100 R0 = R1;
101
102 /* Turn off the icache */
103 p0.l = LO(IMEM_CONTROL);
104 p0.h = HI(IMEM_CONTROL);
105 R1 = [p0];
106 R0 = ~ENICPLB;
107 R0 = R0 & R1;
108
109#if ANOMALY_05000125
110 CLI R2;
111 SSYNC;
112#endif
113 [p0] = R0;
114 SSYNC;
115#if ANOMALY_05000125
116 STI R2;
117#endif
118
119 /* Turn off the dcache */
120 p0.l = LO(DMEM_CONTROL);
121 p0.h = HI(DMEM_CONTROL);
122 R1 = [p0];
123 R0 = ~ENDCPLB;
124 R0 = R0 & R1;
125
126 /* Anomaly 05000125 */
127#if ANOMALY_05000125
128 CLI R2;
129 SSYNC;
130#endif
131 [p0] = R0;
132 SSYNC;
133#if ANOMALY_05000125
134 STI R2;
135#endif
136
137 /* Initialise UART - when booting from u-boot, the UART is not disabled
138 * so if we dont initalize here, our serial console gets hosed */
139 p0.h = hi(BFIN_UART_LCR);
140 p0.l = lo(BFIN_UART_LCR);
141 r0 = 0x0(Z);
142 w[p0] = r0.L; /* To enable DLL writes */
143 ssync;
144
145 p0.h = hi(BFIN_UART_DLL);
146 p0.l = lo(BFIN_UART_DLL);
147 r0 = 0x0(Z);
148 w[p0] = r0.L;
149 ssync;
150
151 p0.h = hi(BFIN_UART_DLH);
152 p0.l = lo(BFIN_UART_DLH);
153 r0 = 0x00(Z);
154 w[p0] = r0.L;
155 ssync;
156
157 p0.h = hi(BFIN_UART_GCTL);
158 p0.l = lo(BFIN_UART_GCTL);
159 r0 = 0x0(Z);
160 w[p0] = r0.L; /* To enable UART clock */
161 ssync;
162
163 /* Initialize stack pointer */
164 sp.l = lo(INITIAL_STACK);
165 sp.h = hi(INITIAL_STACK);
166 fp = sp;
167 usp = sp;
168
169#ifdef CONFIG_EARLY_PRINTK
170 SP += -12;
171 call _init_early_exception_vectors;
172 SP += 12;
173#endif
174
175 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
176 call _bf53x_relocate_l1_mem;
177#if CONFIG_BFIN_KERNEL_CLOCK
178 call _start_dma_code;
179#endif
180
181 /* Code for initializing Async memory banks */
182
183 p2.h = hi(EBIU_AMBCTL1);
184 p2.l = lo(EBIU_AMBCTL1);
185 r0.h = hi(AMBCTL1VAL);
186 r0.l = lo(AMBCTL1VAL);
187 [p2] = r0;
188 ssync;
189
190 p2.h = hi(EBIU_AMBCTL0);
191 p2.l = lo(EBIU_AMBCTL0);
192 r0.h = hi(AMBCTL0VAL);
193 r0.l = lo(AMBCTL0VAL);
194 [p2] = r0;
195 ssync;
196
197 p2.h = hi(EBIU_AMGCTL);
198 p2.l = lo(EBIU_AMGCTL);
199 r0 = AMGCTLVAL;
200 w[p2] = r0;
201 ssync;
202
203 /* This section keeps the processor in supervisor mode
204 * during kernel boot. Switches to user mode at end of boot.
205 * See page 3-9 of Hardware Reference manual for documentation.
206 */
207
208 /* EVT15 = _real_start */
209
210 p0.l = lo(EVT15);
211 p0.h = hi(EVT15);
212 p1.l = _real_start;
213 p1.h = _real_start;
214 [p0] = p1;
215 csync;
216
217 p0.l = lo(IMASK);
218 p0.h = hi(IMASK);
219 p1.l = IMASK_IVG15;
220 p1.h = 0x0;
221 [p0] = p1;
222 csync;
223
224 raise 15;
225 p0.l = .LWAIT_HERE;
226 p0.h = .LWAIT_HERE;
227 reti = p0;
228#if ANOMALY_05000281
229 nop; nop; nop;
230#endif
231 rti;
232
233.LWAIT_HERE:
234 jump .LWAIT_HERE;
235ENDPROC(__start)
236
237ENTRY(_real_start)
238 [ -- sp ] = reti;
239 p0.l = lo(WDOGA_CTL);
240 p0.h = hi(WDOGA_CTL);
241 r0 = 0xAD6(z);
242 w[p0] = r0; /* watchdog off for now */
243 ssync;
244
245 /* Code update for BSS size == 0
246 * Zero out the bss region.
247 */
248
249 p1.l = ___bss_start;
250 p1.h = ___bss_start;
251 p2.l = ___bss_stop;
252 p2.h = ___bss_stop;
253 r0 = 0;
254 p2 -= p1;
255 lsetup (.L_clear_bss, .L_clear_bss) lc0 = p2;
256.L_clear_bss:
257 B[p1++] = r0;
258
259 /* In case there is a NULL pointer reference
260 * Zero out region before stext
261 */
262
263 p1.l = 0x0;
264 p1.h = 0x0;
265 r0.l = __stext;
266 r0.h = __stext;
267 r0 = r0 >> 1;
268 p2 = r0;
269 r0 = 0;
270 lsetup (.L_clear_zero, .L_clear_zero) lc0 = p2;
271.L_clear_zero:
272 W[p1++] = r0;
273
274 /* pass the uboot arguments to the global value command line */
275 R0 = R7;
276 call _cmdline_init;
277
278 p1.l = __rambase;
279 p1.h = __rambase;
280 r0.l = __sdata;
281 r0.h = __sdata;
282 [p1] = r0;
283
284 p1.l = __ramstart;
285 p1.h = __ramstart;
286 p3.l = ___bss_stop;
287 p3.h = ___bss_stop;
288
289 r1 = p3;
290 [p1] = r1;
291
292 /*
293 * load the current thread pointer and stack
294 */
295 r1.l = _init_thread_union;
296 r1.h = _init_thread_union;
297
298 r2.l = 0x2000;
299 r2.h = 0x0000;
300 r1 = r1 + r2;
301 sp = r1;
302 usp = sp;
303 fp = sp;
304 jump.l _start_kernel;
305ENDPROC(_real_start)
306
307__FINIT
308
309.section .l1.text 38.section .l1.text
310#if CONFIG_BFIN_KERNEL_CLOCK 39#ifdef CONFIG_BFIN_KERNEL_CLOCK
311ENTRY(_start_dma_code) 40ENTRY(_start_dma_code)
312 p0.h = hi(SICA_IWR0); 41 p0.h = hi(SICA_IWR0);
313 p0.l = lo(SICA_IWR0); 42 p0.l = lo(SICA_IWR0);
diff --git a/arch/blackfin/mach-bf561/ints-priority.c b/arch/blackfin/mach-bf561/ints-priority.c
index 09b541b0f7c2..9d2f23344720 100644
--- a/arch/blackfin/mach-bf561/ints-priority.c
+++ b/arch/blackfin/mach-bf561/ints-priority.c
@@ -31,7 +31,7 @@
31#include <linux/irq.h> 31#include <linux/irq.h>
32#include <asm/blackfin.h> 32#include <asm/blackfin.h>
33 33
34void program_IAR(void) 34void __init program_IAR(void)
35{ 35{
36 /* Program the IAR0 Register with the configured priority */ 36 /* Program the IAR0 Register with the configured priority */
37 bfin_write_SICA_IAR0(((CONFIG_IRQ_PLL_WAKEUP - 7) << IRQ_PLL_WAKEUP_POS) | 37 bfin_write_SICA_IAR0(((CONFIG_IRQ_PLL_WAKEUP - 7) << IRQ_PLL_WAKEUP_POS) |