4 files changed, 140 insertions, 67 deletions

diff --git a/arch/blackfin/mach-bf561/boards/Makefile b/arch/blackfin/mach-bf561/boards/Makefile
index 886edc739ab4..495a1cf9d452 100644
--- a/arch/blackfin/mach-bf561/boards/Makefile
+++ b/arch/blackfin/mach-bf561/boards/Makefile
@@ -3,5 +3,6 @@
 #
 
 obj-$(CONFIG_GENERIC_BOARD)            += generic_board.o
-obj-$(CONFIG_BFIN561_EZKIT)            += ezkit.o
 obj-$(CONFIG_BFIN561_BLUETECHNIX_CM)   += cm_bf561.o
+obj-$(CONFIG_BFIN561_EZKIT)            += ezkit.o
+obj-$(CONFIG_BFIN561_TEPLA)            += tepla.o
diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c
index 14eb4f9a68ea..9720b5c307ab 100644
--- a/arch/blackfin/mach-bf561/boards/ezkit.c
+++ b/arch/blackfin/mach-bf561/boards/ezkit.c
@@ -32,12 +32,61 @@
 #include <linux/spi/spi.h>
 #include <asm/irq.h>
 #include <asm/bfin5xx_spi.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
 
 /*
  * Name the Board for the /proc/cpuinfo
  */
 char *bfin_board_name = "ADDS-BF561-EZKIT";
 
+#define ISP1761_BASE       0x2C0F0000
+#define ISP1761_IRQ        IRQ_PF10
+
+#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
+static struct resource bfin_isp1761_resources[] = {
+        [0] = {
+                .name   = "isp1761-regs",
+                .start  = ISP1761_BASE + 0x00000000,
+                .end    = ISP1761_BASE + 0x000fffff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = ISP1761_IRQ,
+                .end    = ISP1761_IRQ,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device bfin_isp1761_device = {
+        .name           = "isp1761",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(bfin_isp1761_resources),
+        .resource       = bfin_isp1761_resources,
+};
+
+static struct platform_device *bfin_isp1761_devices[] = {
+        &bfin_isp1761_device,
+};
+
+int __init bfin_isp1761_init(void)
+{
+        unsigned int num_devices=ARRAY_SIZE(bfin_isp1761_devices);
+
+        printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
+        set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING);
+
+        return platform_add_devices(bfin_isp1761_devices, num_devices);
+}
+
+void __exit bfin_isp1761_exit(void)
+{
+        platform_device_unregister(&bfin_isp1761_device);
+}
+
+arch_initcall(bfin_isp1761_init);
+#endif
+
 /*
  *  USB-LAN EzExtender board
  *  Driver needs to know address, irq and flag pin.
@@ -135,13 +184,18 @@ static int __init ezkit_init(void)
 {
         int ret;
 
-        printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
-        ret = platform_add_devices(ezkit_devices,
-                 ARRAY_SIZE(ezkit_devices));
+        printk(KERN_INFO "%s(): registering device resources\n", __func__);
+
+        ret = platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
         if (ret < 0)
                 return ret;
-        return spi_register_board_info(bfin_spi_board_info,
-                                ARRAY_SIZE(bfin_spi_board_info));
+
+#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
+        bfin_write_FIO0_DIR(bfin_read_FIO0_DIR() | (1 << 12));
+        SSYNC();
+#endif
+
+        return spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 }
 
 arch_initcall(ezkit_init);
diff --git a/arch/blackfin/mach-bf561/boards/tepla.c b/arch/blackfin/mach-bf561/boards/tepla.c
new file mode 100644
index 000000000000..db308c7ccabb
--- /dev/null
+++ b/arch/blackfin/mach-bf561/boards/tepla.c
@@ -0,0 +1,61 @@
+/*
+ *  File: arch/blackfin/mach-bf561/tepla.c
+ *
+ *  Copyright 2004-2007 Analog Devices Inc.
+ *  Only SMSC91C1111 was registered, may do more later.
+ *
+ *  Copyright 2005 National ICT Australia (NICTA), Aidan Williams <aidan@nicta.com.au>
+ *  Thanks to Jamey Hicks.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ */
+
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <asm/irq.h>
+
+char *bfin_board_name = "Tepla-BF561";
+
+/*
+ *  Driver needs to know address, irq and flag pin.
+ */
+static struct resource smc91x_resources[] = {
+        {
+                .start  = 0x2C000300,
+                .end    = 0x2C000320,
+                .flags  = IORESOURCE_MEM,
+        },{
+                .start  = IRQ_PROG_INTB,
+                .end    = IRQ_PROG_INTB,
+                .flags  = IORESOURCE_IRQ|IORESOURCE_IRQ_HIGHLEVEL,
+        },{
+                /*
+                 *  denotes the flag pin and is used directly if
+                 *  CONFIG_IRQCHIP_DEMUX_GPIO is defined.
+                 */
+                .start  = IRQ_PF7,
+                .end    = IRQ_PF7,
+                .flags  = IORESOURCE_IRQ|IORESOURCE_IRQ_HIGHLEVEL,
+        },
+};
+
+static struct platform_device smc91x_device = {
+        .name          = "smc91x",
+        .id            = 0,
+        .num_resources = ARRAY_SIZE(smc91x_resources),
+        .resource      = smc91x_resources,
+};
+
+static struct platform_device *tepla_devices[] __initdata = {
+        &smc91x_device,
+};
+
+static int __init tepla_init(void)
+{
+        printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
+        return platform_add_devices(tepla_devices, ARRAY_SIZE(tepla_devices));
+}
+
+arch_initcall(tepla_init);
diff --git a/arch/blackfin/mach-bf561/head.S b/arch/blackfin/mach-bf561/head.S
index 7bca478526b9..ad9187a866a5 100644
--- a/arch/blackfin/mach-bf561/head.S
+++ b/arch/blackfin/mach-bf561/head.S
@@ -127,7 +127,8 @@ ENTRY(__stext)
         STI R2;
 #endif
 
-        /* Initialise UART*/
+        /* Initialise UART - when booting from u-boot, the UART is not disabled
+         * so if we dont initalize here, our serial console gets hosed */
         p0.h = hi(UART_LCR);
         p0.l = lo(UART_LCR);
         r0 = 0x0(Z);
@@ -414,12 +415,6 @@ ENTRY(_bfin_reset)
         w[p0] = r0.l;
 #endif
 
-        /* Clear the bits 13-15 in SWRST if they werent cleared */
-        p0.h = hi(SICA_SWRST);
-        p0.l = lo(SICA_SWRST);
-        csync;
-        r0.l = w[p0];
-
         /* Clear the IMASK register */
         p0.h = hi(IMASK);
         p0.l = lo(IMASK);
@@ -433,68 +428,30 @@ ENTRY(_bfin_reset)
         [p0] = r0;
         SSYNC;
 
-        /* Disable the WDOG TIMER */
-        p0.h = hi(WDOGA_CTL);
-        p0.l = lo(WDOGA_CTL);
-        r0.l = 0xAD6;
-        w[p0] = r0.l;
-        SSYNC;
-
-        /* Clear the sticky bit incase it is already set */
-        p0.h = hi(WDOGA_CTL);
-        p0.l = lo(WDOGA_CTL);
-        r0.l = 0x8AD6;
-        w[p0] = r0.l;
+        /* make sure SYSCR is set to use BMODE */
+        P0.h = hi(SICA_SYSCR);
+        P0.l = lo(SICA_SYSCR);
+        R0.l = 0x20;
+        W[P0] = R0.l;
         SSYNC;
 
-        /* Program the count value */
-        R0.l = 0x100;
-        R0.h = 0x0;
-        P0.h = hi(WDOGA_CNT);
-        P0.l = lo(WDOGA_CNT);
-        [P0] = R0;
+        /* issue a system soft reset */
+        P1.h = hi(SICA_SWRST);
+        P1.l = lo(SICA_SWRST);
+        R1.l = 0x0007;
+        W[P1] = R1;
         SSYNC;
 
-        /* Program WDOG_STAT if necessary */
-        P0.h = hi(WDOGA_CTL);
-        P0.l = lo(WDOGA_CTL);
-        R0 = W[P0](Z);
-        CC = BITTST(R0,1);
-        if !CC JUMP .LWRITESTAT;
-        CC = BITTST(R0,2);
-        if !CC JUMP .LWRITESTAT;
-        JUMP .LSKIP_WRITE;
-
-.LWRITESTAT:
-        /* When watch dog timer is enabled,
-         * a write to STAT will load the contents of CNT to STAT
-         */
-        R0 = 0x0000(z);
-        P0.h = hi(WDOGA_STAT);
-        P0.l = lo(WDOGA_STAT)
-        [P0] = R0;
-        SSYNC;
-
-.LSKIP_WRITE:
-        /* Enable the reset event */
-        P0.h = hi(WDOGA_CTL);
-        P0.l = lo(WDOGA_CTL);
-        R0 = W[P0](Z);
-        BITCLR(R0,1);
-        BITCLR(R0,2);
-        W[P0] = R0.L;
-        SSYNC;
-        NOP;
-
-        /* Enable the wdog counter */
-        R0 = W[P0](Z);
-        BITCLR(R0,4);
-        W[P0] = R0.L;
+        /* clear system soft reset */
+        R0.l = 0x0000;
+        W[P0] = R0;
         SSYNC;
 
-        IDLE;
+        /* issue core reset */
+        raise 1;
 
         RTS;
+ENDPROC(_bfin_reset)
 
 .data